drivers/gpu/drm/msm/adreno/a6xx_gmu.h

113

struct a6xx_hfi_queue queues[2];

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1298

struct a6xx_hfi_queue *queue = &gmu->queues[i];

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

1011

struct a6xx_hfi_queue *queue = &gmu->queues[i];

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

1027

static void a6xx_hfi_queue_init(struct a6xx_hfi_queue *queue,

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

146

struct a6xx_hfi_queue *queue = &gmu->queues[HFI_RESPONSE_QUEUE];

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

209

struct a6xx_hfi_queue *queue = &gmu->queues[HFI_COMMAND_QUEUE];

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

32

struct a6xx_hfi_queue *queue, u32 *data, u32 dwords)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

70

struct a6xx_hfi_queue *queue, u32 *data, u32 dwords)