drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1039

static void a6xx_gmu_irq_disable(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1048

static void a6xx_gmu_rpmh_off(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1086

static void a6xx_gmu_force_off(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1133

static void a6xx_gmu_set_initial_freq(struct msm_gpu *gpu, struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1147

static void a6xx_gmu_set_initial_bw(struct msm_gpu *gpu, struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1164

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1256

bool a6xx_gmu_isidle(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

126

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1272

static void a6xx_gmu_shutdown(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1343

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1376

static void a6xx_gmu_memory_free(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1391

static int a6xx_gmu_memory_alloc(struct a6xx_gmu *gmu, struct a6xx_gmu_bo *bo,

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1432

static int a6xx_gmu_memory_probe(struct drm_device *drm, struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1463

struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1698

static int a6xx_gmu_rpmh_votes_init(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1797

static int a6xx_gmu_pwrlevels_probe(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1840

static int a6xx_gmu_acd_probe(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1910

static int a6xx_gmu_clocks_probe(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1928

static int a6xx_gmu_get_irq(struct a6xx_gmu *gmu, struct platform_device *pdev,

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1949

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1977

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

2024

struct a6xx_gmu *gmu = container_of(nb, struct a6xx_gmu, pd_nb);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

2059

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

21

static void a6xx_gmu_fault(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

2145

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

220

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

225

static bool a6xx_gmu_check_idle_level(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

251

int a6xx_gmu_wait_for_idle(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

256

static int a6xx_gmu_start(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

298

static int a6xx_gmu_hfi_start(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

358

int a6xx_gmu_set_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

39

struct a6xx_gmu *gmu = data;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

423

void a6xx_gmu_clear_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

447

int a6xx_sptprac_enable(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

472

void a6xx_sptprac_disable(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

494

static int a6xx_gmu_gfx_rail_on(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

511

static void a6xx_gemnoc_workaround(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

529

static int a6xx_gmu_notify_slumber(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

572

static int a6xx_rpmh_start(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

602

static void a6xx_rpmh_stop(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

63

struct a6xx_gmu *gmu = data;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

633

static void a6xx_gmu_rpmh_init(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

766

static void a6xx_gmu_power_config(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

78

bool a6xx_gmu_sptprac_is_on(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

828

static int a6xx_gmu_fw_load(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

893

static int a6xx_gmu_fw_start(struct a6xx_gmu *gmu, unsigned int state)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

94

bool a6xx_gmu_gx_is_on(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

137

static inline u32 gmu_read(struct a6xx_gmu *gmu, u32 offset)

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

143

static inline void gmu_write(struct a6xx_gmu *gmu, u32 offset, u32 value)

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

149

gmu_write_bulk(struct a6xx_gmu *gmu, u32 offset, const u32 *data, u32 size)

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

155

static inline void gmu_rmw(struct a6xx_gmu *gmu, u32 reg, u32 mask, u32 or)

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

164

static inline u64 gmu_read64(struct a6xx_gmu *gmu, u32 lo, u32 hi)

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

181

static inline u32 gmu_read_rscc(struct a6xx_gmu *gmu, u32 offset)

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

186

static inline void gmu_write_rscc(struct a6xx_gmu *gmu, u32 offset, u32 value)

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

228

void a6xx_hfi_init(struct a6xx_gmu *gmu);

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

229

int a6xx_hfi_start(struct a6xx_gmu *gmu, int boot_state);

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

230

void a6xx_hfi_stop(struct a6xx_gmu *gmu);

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

231

int a6xx_hfi_send_prep_slumber(struct a6xx_gmu *gmu);

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

232

int a6xx_hfi_set_freq(struct a6xx_gmu *gmu, u32 perf_index, u32 bw_index);

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

234

bool a6xx_gmu_gx_is_on(struct a6xx_gmu *gmu);

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

235

bool a6xx_gmu_sptprac_is_on(struct a6xx_gmu *gmu);

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

236

void a6xx_sptprac_disable(struct a6xx_gmu *gmu);

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

237

int a6xx_sptprac_enable(struct a6xx_gmu *gmu);

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1251

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1633

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1950

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2296

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2382

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

54

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

629

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

264

int a6xx_gmu_wait_for_idle(struct a6xx_gmu *gmu);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

266

bool a6xx_gmu_isidle(struct a6xx_gmu *gmu);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

268

int a6xx_gmu_set_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

269

void a6xx_gmu_clear_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

92

struct a6xx_gmu gmu;

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1198

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1292

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

1006

void a6xx_hfi_stop(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

105

static int a6xx_hfi_wait_for_msg_interrupt(struct a6xx_gmu *gmu, u32 id, u32 seqnum)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

1054

void a6xx_hfi_init(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

143

static int a6xx_hfi_wait_for_ack(struct a6xx_gmu *gmu, u32 id, u32 seqnum,

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

206

static int a6xx_hfi_send_msg(struct a6xx_gmu *gmu, int id,

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

229

static int a6xx_hfi_send_gmu_init(struct a6xx_gmu *gmu, int boot_state)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

241

static int a6xx_hfi_get_fw_version(struct a6xx_gmu *gmu, u32 *version)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

252

static int a6xx_hfi_send_perf_table_v1(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

274

static int a8xx_hfi_send_perf_table(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

31

static int a6xx_hfi_queue_read(struct a6xx_gmu *gmu,

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

321

static int a6xx_hfi_send_perf_table(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

349

static void a6xx_generate_bw_table(const struct a6xx_info *info, struct a6xx_gmu *gmu,

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

69

static int a6xx_hfi_queue_write(struct a6xx_gmu *gmu,

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

791

static int a6xx_hfi_send_bw_table(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

837

static int a6xx_hfi_feature_ctrl_msg(struct a6xx_gmu *gmu, u32 feature, u32 enable, u32 data)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

851

static int a6xx_hfi_enable_ifpc(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

861

static int a6xx_hfi_enable_acd(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

886

static int a6xx_hfi_send_test(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

894

static int a6xx_hfi_send_start(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

902

static int a6xx_hfi_send_core_fw_start(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

910

int a6xx_hfi_set_freq(struct a6xx_gmu *gmu, u32 freq_index, u32 bw_index)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

922

int a6xx_hfi_send_prep_slumber(struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

932

static int a6xx_hfi_start_v1(struct a6xx_gmu *gmu, int boot_state)

drivers/gpu/drm/msm/adreno/a6xx_hfi.c

967

int a6xx_hfi_start(struct a6xx_gmu *gmu, int boot_state)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

190

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

508

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

740

struct a6xx_gmu *gmu = &a6xx_gpu->gmu;