Symbol: __reg
arch/sparc/kernel/iommu.c
35
#define iommu_read(__reg) \
arch/sparc/kernel/iommu.c
39
: "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
arch/sparc/kernel/iommu.c
43
#define iommu_write(__reg, __val) \
arch/sparc/kernel/iommu.c
46
: "r" (__val), "r" (__reg), \
arch/sparc/kernel/prom_irqtrans.c
319
#define schizo_read(__reg) \
arch/sparc/kernel/prom_irqtrans.c
323
: "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
arch/sparc/kernel/prom_irqtrans.c
327
#define schizo_write(__reg, __val) \
arch/sparc/kernel/prom_irqtrans.c
330
: "r" (__val), "r" (__reg), \
arch/sparc/kernel/prom_irqtrans.c
85
#define sabre_read(__reg) \
arch/sparc/kernel/prom_irqtrans.c
89
: "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
drivers/clk/microchip/clk-pic32mzda.c
27
#define DECLARE_PERIPHERAL_CLOCK(__clk_name, __reg, __flags) \
drivers/clk/microchip/clk-pic32mzda.c
29
.ctrl_reg = (__reg), \
drivers/clk/microchip/clk-pic32mzda.c
41
#define DECLARE_REFO_CLOCK(__clkid, __reg) \
drivers/clk/microchip/clk-pic32mzda.c
43
.ctrl_reg = (__reg), \
drivers/clk/mvebu/armada-37xx-periph.c
133
.reg = __reg(CLK_DIS), \
drivers/clk/mvebu/armada-37xx-periph.c
142
.reg = __reg(TBG_SEL), \
drivers/clk/mvebu/armada-37xx-periph.c
152
.reg1 = __reg(_reg1), \
drivers/clk/mvebu/armada-37xx-periph.c
153
.reg2 = __reg(_reg2), \
drivers/clk/mvebu/armada-37xx-periph.c
163
.reg = __reg(_reg), \
drivers/clk/mvebu/armada-37xx-periph.c
173
.reg_mux = __reg(TBG_SEL), \
drivers/clk/mvebu/armada-37xx-periph.c
176
.reg_div = __reg(_reg), \
drivers/fsi/fsi-master-hub.c
200
__be32 __reg;
drivers/fsi/fsi-master-hub.c
203
rc = fsi_device_read(fsi_dev, FSI_MVER, &__reg, sizeof(__reg));
drivers/fsi/fsi-master-hub.c
207
reg = be32_to_cpu(__reg);
drivers/gpu/drm/armada/armada_crtc.h
20
struct armada_regs *__reg = _r; \
drivers/gpu/drm/armada/armada_crtc.h
21
__reg[_i].offset = _o; \
drivers/gpu/drm/armada/armada_crtc.h
22
__reg[_i].mask = ~(_m); \
drivers/gpu/drm/armada/armada_crtc.h
23
__reg[_i].val = _v; \
drivers/gpu/drm/i915/display/intel_dkl_phy_regs.h
25
#define DKL_REG_TC_PORT(__reg) \
drivers/gpu/drm/i915/display/intel_dkl_phy_regs.h
26
(TC_PORT_1 + ((__reg).reg - _DKL_PHY1_BASE) / (_DKL_PHY2_BASE - _DKL_PHY1_BASE))
drivers/gpu/drm/i915/display/intel_dkl_phy_regs.h
29
#define DKL_REG_MMIO(__reg) _MMIO((__reg).reg)
drivers/gpu/drm/i915/intel_uncore.c
934
u32 __reg = (reg); \
drivers/gpu/drm/i915/intel_uncore.c
935
__reg < 0x40000 || __reg >= 0x116000; \
drivers/gpu/drm/xe/regs/xe_reg_defs.h
130
.__reg = XE_REG_INITIALIZER(r_, ##__VA_ARGS__, .mcr = 1) \
drivers/gpu/drm/xe/regs/xe_reg_defs.h
73
struct xe_reg __reg;
drivers/gpu/drm/xe/xe_gt.c
313
struct xe_reg_mcr reg = { .__reg.raw = entry->reg.raw };
drivers/gpu/drm/xe/xe_gt_mcr.c
53
return reg_mcr.__reg;
drivers/gpu/drm/xe/xe_guc_capture.c
384
ext->reg = XE_REG(extlist->reg.__reg.addr);
drivers/gpu/drm/xe/xe_reg_sr.c
163
return (const struct xe_reg_mcr){.__reg.raw = reg.raw };
drivers/hwmon/adt7411.c
181
#define ADT7411_BIT_ATTR(__name, __reg, __bit) \
drivers/hwmon/adt7411.c
183
adt7411_set_bit, __bit, __reg)
drivers/media/dvb-frontends/stv090x_priv.h
37
#define STV090x_READ_DEMOD(__state, __reg) (( \
drivers/media/dvb-frontends/stv090x_priv.h
39
stv090x_read_reg(__state, STV090x_P2_##__reg) : \
drivers/media/dvb-frontends/stv090x_priv.h
40
stv090x_read_reg(__state, STV090x_P1_##__reg))
drivers/media/dvb-frontends/stv090x_priv.h
42
#define STV090x_WRITE_DEMOD(__state, __reg, __data) (( \
drivers/media/dvb-frontends/stv090x_priv.h
44
stv090x_write_reg(__state, STV090x_P2_##__reg, __data) :\
drivers/media/dvb-frontends/stv090x_priv.h
45
stv090x_write_reg(__state, STV090x_P1_##__reg, __data))
drivers/media/platform/samsung/s3c-camif/camif-regs.h
159
#define CISTATUS_FRAMECNT(__reg) (((__reg) >> 26) & 0x3)
drivers/mmc/host/dw_mmc.h
456
#define mci_fifo_readw(__reg) __raw_readw(__reg)
drivers/mmc/host/dw_mmc.h
457
#define mci_fifo_readl(__reg) __raw_readl(__reg)
drivers/mmc/host/dw_mmc.h
458
#define mci_fifo_readq(__reg) __raw_readq(__reg)
drivers/mmc/host/dw_mmc.h
460
#define mci_fifo_writew(__value, __reg) __raw_writew(__reg, __value)
drivers/mmc/host/dw_mmc.h
461
#define mci_fifo_writel(__value, __reg) __raw_writel(__reg, __value)
drivers/mmc/host/dw_mmc.h
462
#define mci_fifo_writeq(__value, __reg) __raw_writeq(__reg, __value)
drivers/mmc/host/dw_mmc.h
496
#define __raw_writeq(__value, __reg) \
drivers/mmc/host/dw_mmc.h
497
(*(volatile u64 __force *)(__reg) = (__value))
drivers/mmc/host/dw_mmc.h
498
#define __raw_readq(__reg) (*(volatile u64 __force *)(__reg))
drivers/net/ethernet/cadence/macb.h
841
#define macb_or_gem_writel(__bp, __reg, __value) \
drivers/net/ethernet/cadence/macb.h
844
gem_writel((__bp), __reg, __value); \
drivers/net/ethernet/cadence/macb.h
846
macb_writel((__bp), __reg, __value); \
drivers/net/ethernet/cadence/macb.h
849
#define macb_or_gem_readl(__bp, __reg) \
drivers/net/ethernet/cadence/macb.h
853
__v = gem_readl((__bp), __reg); \
drivers/net/ethernet/cadence/macb.h
855
__v = macb_readl((__bp), __reg); \
drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c
175
u32 __reg = 0; \
drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c
177
BUILD_BUG_ON(sizeof((map).reg) != sizeof(__reg)); \
drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c
179
SET_FIELD(__reg, QM_RF_PQ_MAP_PQ_VALID, 1); \
drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c
180
SET_FIELD(__reg, QM_RF_PQ_MAP_RL_VALID, \
drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c
182
SET_FIELD(__reg, QM_RF_PQ_MAP_VP_PQ_ID, (vp_pq_id)); \
drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c
183
SET_FIELD(__reg, QM_RF_PQ_MAP_RL_ID, (rl_id)); \
drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c
184
SET_FIELD(__reg, QM_RF_PQ_MAP_VOQ, (ext_voq)); \
drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c
185
SET_FIELD(__reg, QM_RF_PQ_MAP_WRR_WEIGHT_GROUP, \
drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c
189
__reg); \
drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c
190
(map).reg = cpu_to_le32(__reg); \
drivers/net/ethernet/smsc/smc91x.h
35
unsigned int __reg = (r); \
drivers/net/ethernet/smsc/smc91x.h
36
SMC_outb(__val16, a, __reg); \
drivers/net/ethernet/smsc/smc91x.h
37
SMC_outb(__val16 >> 8, a, __reg + (1 << SMC_IO_SHIFT)); \
drivers/net/ethernet/smsc/smc91x.h
43
unsigned int __reg = r; \
drivers/net/ethernet/smsc/smc91x.h
44
__val16 = SMC_inb(a, __reg); \
drivers/net/ethernet/smsc/smc91x.h
45
__val16 |= SMC_inb(a, __reg + (1 << SMC_IO_SHIFT)) << 8; \
drivers/net/ethernet/sun/sunhme.c
208
#define hme_write32(__hp, __reg, __val) \
drivers/net/ethernet/sun/sunhme.c
209
((__hp)->write32((__reg), (__val)))
drivers/net/ethernet/sun/sunhme.c
210
#define hme_read32(__hp, __reg) \
drivers/net/ethernet/sun/sunhme.c
211
((__hp)->read32(__reg))
drivers/net/ethernet/sun/sunhme.c
221
#define hme_write32(__hp, __reg, __val) \
drivers/net/ethernet/sun/sunhme.c
222
sbus_writel((__val), (__reg))
drivers/net/ethernet/sun/sunhme.c
223
#define hme_read32(__hp, __reg) \
drivers/net/ethernet/sun/sunhme.c
224
sbus_readl(__reg)
drivers/net/ethernet/sun/sunhme.c
238
#define hme_write32(__hp, __reg, __val) \
drivers/net/ethernet/sun/sunhme.c
239
writel((__val), (__reg))
drivers/net/ethernet/sun/sunhme.c
240
#define hme_read32(__hp, __reg) \
drivers/net/ethernet/sun/sunhme.c
241
readl(__reg)
drivers/net/wireless/ralink/rt2x00/rt2400pci.c
40
#define WAIT_FOR_BBP(__dev, __reg) \
drivers/net/wireless/ralink/rt2x00/rt2400pci.c
41
rt2x00mmio_regbusy_read((__dev), BBPCSR, BBPCSR_BUSY, (__reg))
drivers/net/wireless/ralink/rt2x00/rt2400pci.c
42
#define WAIT_FOR_RF(__dev, __reg) \
drivers/net/wireless/ralink/rt2x00/rt2400pci.c
43
rt2x00mmio_regbusy_read((__dev), RFCSR, RFCSR_BUSY, (__reg))
drivers/net/wireless/ralink/rt2x00/rt2500pci.c
40
#define WAIT_FOR_BBP(__dev, __reg) \
drivers/net/wireless/ralink/rt2x00/rt2500pci.c
41
rt2x00mmio_regbusy_read((__dev), BBPCSR, BBPCSR_BUSY, (__reg))
drivers/net/wireless/ralink/rt2x00/rt2500pci.c
42
#define WAIT_FOR_RF(__dev, __reg) \
drivers/net/wireless/ralink/rt2x00/rt2500pci.c
43
rt2x00mmio_regbusy_read((__dev), RFCSR, RFCSR_BUSY, (__reg))
drivers/net/wireless/ralink/rt2x00/rt2500usb.c
117
#define WAIT_FOR_BBP(__dev, __reg) \
drivers/net/wireless/ralink/rt2x00/rt2500usb.c
118
rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg))
drivers/net/wireless/ralink/rt2x00/rt2500usb.c
119
#define WAIT_FOR_RF(__dev, __reg) \
drivers/net/wireless/ralink/rt2x00/rt2500usb.c
120
rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg))
drivers/net/wireless/ralink/rt2x00/rt2800lib.c
53
#define WAIT_FOR_BBP(__dev, __reg) \
drivers/net/wireless/ralink/rt2x00/rt2800lib.c
54
rt2800_regbusy_read((__dev), BBP_CSR_CFG, BBP_CSR_CFG_BUSY, (__reg))
drivers/net/wireless/ralink/rt2x00/rt2800lib.c
55
#define WAIT_FOR_RFCSR(__dev, __reg) \
drivers/net/wireless/ralink/rt2x00/rt2800lib.c
56
rt2800_regbusy_read((__dev), RF_CSR_CFG, RF_CSR_CFG_BUSY, (__reg))
drivers/net/wireless/ralink/rt2x00/rt2800lib.c
57
#define WAIT_FOR_RFCSR_MT7620(__dev, __reg) \
drivers/net/wireless/ralink/rt2x00/rt2800lib.c
59
(__reg))
drivers/net/wireless/ralink/rt2x00/rt2800lib.c
60
#define WAIT_FOR_RF(__dev, __reg) \
drivers/net/wireless/ralink/rt2x00/rt2800lib.c
61
rt2800_regbusy_read((__dev), RF_CSR_CFG0, RF_CSR_CFG0_BUSY, (__reg))
drivers/net/wireless/ralink/rt2x00/rt2800lib.c
62
#define WAIT_FOR_MCU(__dev, __reg) \
drivers/net/wireless/ralink/rt2x00/rt2800lib.c
64
H2M_MAILBOX_CSR_OWNER, (__reg))
drivers/net/wireless/ralink/rt2x00/rt2x00reg.h
235
#define SET_FIELD(__reg, __type, __field, __value)\
drivers/net/wireless/ralink/rt2x00/rt2x00reg.h
238
*(__reg) &= ~((__field).bit_mask); \
drivers/net/wireless/ralink/rt2x00/rt2x00reg.h
239
*(__reg) |= ((__value) << \
drivers/net/wireless/ralink/rt2x00/rt2x00reg.h
244
#define GET_FIELD(__reg, __type, __field) \
drivers/net/wireless/ralink/rt2x00/rt2x00reg.h
247
((__reg) & ((__field).bit_mask)) >> \
drivers/net/wireless/ralink/rt2x00/rt2x00reg.h
251
#define rt2x00_set_field32(__reg, __field, __value) \
drivers/net/wireless/ralink/rt2x00/rt2x00reg.h
252
SET_FIELD(__reg, struct rt2x00_field32, __field, __value)
drivers/net/wireless/ralink/rt2x00/rt2x00reg.h
253
#define rt2x00_get_field32(__reg, __field) \
drivers/net/wireless/ralink/rt2x00/rt2x00reg.h
254
GET_FIELD(__reg, struct rt2x00_field32, __field)
drivers/net/wireless/ralink/rt2x00/rt2x00reg.h
256
#define rt2x00_set_field16(__reg, __field, __value) \
drivers/net/wireless/ralink/rt2x00/rt2x00reg.h
257
SET_FIELD(__reg, struct rt2x00_field16, __field, __value)
drivers/net/wireless/ralink/rt2x00/rt2x00reg.h
258
#define rt2x00_get_field16(__reg, __field) \
drivers/net/wireless/ralink/rt2x00/rt2x00reg.h
259
GET_FIELD(__reg, struct rt2x00_field16, __field)
drivers/net/wireless/ralink/rt2x00/rt2x00reg.h
261
#define rt2x00_set_field8(__reg, __field, __value) \
drivers/net/wireless/ralink/rt2x00/rt2x00reg.h
262
SET_FIELD(__reg, struct rt2x00_field8, __field, __value)
drivers/net/wireless/ralink/rt2x00/rt2x00reg.h
263
#define rt2x00_get_field8(__reg, __field) \
drivers/net/wireless/ralink/rt2x00/rt2x00reg.h
264
GET_FIELD(__reg, struct rt2x00_field8, __field)
drivers/net/wireless/ralink/rt2x00/rt61pci.c
46
#define WAIT_FOR_BBP(__dev, __reg) \
drivers/net/wireless/ralink/rt2x00/rt61pci.c
47
rt2x00mmio_regbusy_read((__dev), PHY_CSR3, PHY_CSR3_BUSY, (__reg))
drivers/net/wireless/ralink/rt2x00/rt61pci.c
48
#define WAIT_FOR_RF(__dev, __reg) \
drivers/net/wireless/ralink/rt2x00/rt61pci.c
49
rt2x00mmio_regbusy_read((__dev), PHY_CSR4, PHY_CSR4_BUSY, (__reg))
drivers/net/wireless/ralink/rt2x00/rt61pci.c
50
#define WAIT_FOR_MCU(__dev, __reg) \
drivers/net/wireless/ralink/rt2x00/rt61pci.c
52
H2M_MAILBOX_CSR_OWNER, (__reg))
drivers/net/wireless/ralink/rt2x00/rt73usb.c
47
#define WAIT_FOR_BBP(__dev, __reg) \
drivers/net/wireless/ralink/rt2x00/rt73usb.c
48
rt2x00usb_regbusy_read((__dev), PHY_CSR3, PHY_CSR3_BUSY, (__reg))
drivers/net/wireless/ralink/rt2x00/rt73usb.c
49
#define WAIT_FOR_RF(__dev, __reg) \
drivers/net/wireless/ralink/rt2x00/rt73usb.c
50
rt2x00usb_regbusy_read((__dev), PHY_CSR4, PHY_CSR4_BUSY, (__reg))
drivers/pinctrl/spear/pinctrl-plgpio.c
667
#define plgpio_prepare_reg(__reg, _off, _mask, _tmp) \
drivers/pinctrl/spear/pinctrl-plgpio.c
669
regmap_read(plgpio->regmap, plgpio->regs.__reg + _off, &_tmp); \
drivers/pinctrl/spear/pinctrl-plgpio.c
671
plgpio->csave_regs[i].__reg = \
drivers/pinctrl/spear/pinctrl-plgpio.c
672
_tmp | (plgpio->csave_regs[i].__reg & _mask); \
drivers/pmdomain/amlogic/meson-ee-pwrc.c
129
#define VPU_MEMPD(__reg) \
drivers/pmdomain/amlogic/meson-ee-pwrc.c
130
{ __reg, GENMASK(1, 0) }, \
drivers/pmdomain/amlogic/meson-ee-pwrc.c
131
{ __reg, GENMASK(3, 2) }, \
drivers/pmdomain/amlogic/meson-ee-pwrc.c
132
{ __reg, GENMASK(5, 4) }, \
drivers/pmdomain/amlogic/meson-ee-pwrc.c
133
{ __reg, GENMASK(7, 6) }, \
drivers/pmdomain/amlogic/meson-ee-pwrc.c
134
{ __reg, GENMASK(9, 8) }, \
drivers/pmdomain/amlogic/meson-ee-pwrc.c
135
{ __reg, GENMASK(11, 10) }, \
drivers/pmdomain/amlogic/meson-ee-pwrc.c
136
{ __reg, GENMASK(13, 12) }, \
drivers/pmdomain/amlogic/meson-ee-pwrc.c
137
{ __reg, GENMASK(15, 14) }, \
drivers/pmdomain/amlogic/meson-ee-pwrc.c
138
{ __reg, GENMASK(17, 16) }, \
drivers/pmdomain/amlogic/meson-ee-pwrc.c
139
{ __reg, GENMASK(19, 18) }, \
drivers/pmdomain/amlogic/meson-ee-pwrc.c
140
{ __reg, GENMASK(21, 20) }, \
drivers/pmdomain/amlogic/meson-ee-pwrc.c
141
{ __reg, GENMASK(23, 22) }, \
drivers/pmdomain/amlogic/meson-ee-pwrc.c
142
{ __reg, GENMASK(25, 24) }, \
drivers/pmdomain/amlogic/meson-ee-pwrc.c
143
{ __reg, GENMASK(27, 26) }, \
drivers/pmdomain/amlogic/meson-ee-pwrc.c
144
{ __reg, GENMASK(29, 28) }, \
drivers/pmdomain/amlogic/meson-ee-pwrc.c
145
{ __reg, GENMASK(31, 30) }
drivers/pmdomain/amlogic/meson-ee-pwrc.c
147
#define VPU_HHI_MEMPD(__reg) \
drivers/pmdomain/amlogic/meson-ee-pwrc.c
148
{ __reg, BIT(8) }, \
drivers/pmdomain/amlogic/meson-ee-pwrc.c
149
{ __reg, BIT(9) }, \
drivers/pmdomain/amlogic/meson-ee-pwrc.c
150
{ __reg, BIT(10) }, \
drivers/pmdomain/amlogic/meson-ee-pwrc.c
151
{ __reg, BIT(11) }, \
drivers/pmdomain/amlogic/meson-ee-pwrc.c
152
{ __reg, BIT(12) }, \
drivers/pmdomain/amlogic/meson-ee-pwrc.c
153
{ __reg, BIT(13) }, \
drivers/pmdomain/amlogic/meson-ee-pwrc.c
154
{ __reg, BIT(14) }, \
drivers/pmdomain/amlogic/meson-ee-pwrc.c
155
{ __reg, BIT(15) }
drivers/thermal/mediatek/lvts_thermal.c
201
#define LVTS_DEBUG_FS_REGS(__reg) \
drivers/thermal/mediatek/lvts_thermal.c
203
.name = __stringify(__reg), \
drivers/thermal/mediatek/lvts_thermal.c
204
.offset = __reg(0), \
include/linux/bitfield.h
273
typeof(__mask) __reg = (reg); \
include/linux/bitfield.h
276
(__reg & __mask) >> __shift; \
include/linux/bpf_verifier.h
560
#define bpf_for_each_reg_in_vstate_mask(__vst, __state, __reg, __stack, __mask, __expr) \
include/linux/bpf_verifier.h
570
__reg = &___regs[___j]; \
include/linux/bpf_verifier.h
573
bpf_for_each_spilled_reg(___j, __state, __reg, __mask) { \
include/linux/bpf_verifier.h
574
if (!__reg) \
include/linux/bpf_verifier.h
580
bpf_for_each_spilled_stack_arg(___j, __state, __reg) { \
include/linux/bpf_verifier.h
581
if (!__reg) \
include/linux/bpf_verifier.h
590
#define bpf_for_each_reg_in_vstate(__vst, __state, __reg, __expr) \
include/linux/bpf_verifier.h
594
bpf_for_each_reg_in_vstate_mask(__vst, __state, __reg, ___stack,\
include/net/netfilter/nf_tables_offload.h
101
#define NFT_OFFLOAD_MATCH_EXACT(__key, __base, __field, __len, __reg) \
include/net/netfilter/nf_tables_offload.h
102
NFT_OFFLOAD_MATCH(__key, __base, __field, __len, __reg) \
include/net/netfilter/nf_tables_offload.h
103
memset(&(__reg)->mask, 0xff, (__reg)->len);
include/net/netfilter/nf_tables_offload.h
89
#define NFT_OFFLOAD_MATCH_FLAGS(__key, __base, __field, __len, __reg, __flags) \
include/net/netfilter/nf_tables_offload.h
90
(__reg)->base_offset = \
include/net/netfilter/nf_tables_offload.h
92
(__reg)->offset = \
include/net/netfilter/nf_tables_offload.h
94
(__reg)->len = __len; \
include/net/netfilter/nf_tables_offload.h
95
(__reg)->key = __key; \
include/net/netfilter/nf_tables_offload.h
96
(__reg)->flags = __flags;
include/net/netfilter/nf_tables_offload.h
98
#define NFT_OFFLOAD_MATCH(__key, __base, __field, __len, __reg) \
include/net/netfilter/nf_tables_offload.h
99
NFT_OFFLOAD_MATCH_FLAGS(__key, __base, __field, __len, __reg, 0)
tools/testing/selftests/kvm/include/x86/processor.h
339
#define KVM_X86_PMU_FEATURE(__reg, __bit) \
tools/testing/selftests/kvm/include/x86/processor.h
342
.f = KVM_X86_CPU_FEATURE(0xa, 0, __reg, __bit), \
tools/testing/selftests/kvm/include/x86/processor.h
345
kvm_static_assert(KVM_CPUID_##__reg == KVM_CPUID_EBX || \
tools/testing/selftests/kvm/include/x86/processor.h
346
KVM_CPUID_##__reg == KVM_CPUID_ECX); \