arch/arm/include/asm/glue-proc.h

251

#define cpu_reset __glue(CPU_NAME,_reset)

arch/arm/mach-omap2/omap_hwmod.c

2420

r = _reset(oh);

arch/mips/include/asm/sgi/ioc.h

156

u8 _reset[3];

drivers/memory/tegra/tegra20.c

251

#define TEGRA20_MC_RESET(_name, _control, _status, _reset, _bit) \

drivers/memory/tegra/tegra20.c

257

.reset = _reset, \

include/linux/soc/mediatek/mtk_wed.h

277

#define mtk_wed_device_tx_ring_setup(_dev, _ring, _regs, _reset) \

include/linux/soc/mediatek/mtk_wed.h

278

(_dev)->ops->tx_ring_setup(_dev, _ring, _regs, _reset)

include/linux/soc/mediatek/mtk_wed.h

289

#define mtk_wed_device_rx_ring_setup(_dev, _ring, _regs, _reset) \

include/linux/soc/mediatek/mtk_wed.h

290

(_dev)->ops->rx_ring_setup(_dev, _ring, _regs, _reset)

include/linux/soc/mediatek/mtk_wed.h

299

#define mtk_wed_device_start_hw_rro(_dev, _mask, _reset) \

include/linux/soc/mediatek/mtk_wed.h

300

(_dev)->ops->start_hw_rro(_dev, _mask, _reset)

include/linux/soc/mediatek/mtk_wed.h

315

#define mtk_wed_device_tx_ring_setup(_dev, _ring, _regs, _reset) -ENODEV

include/linux/soc/mediatek/mtk_wed.h

321

#define mtk_wed_device_rx_ring_setup(_dev, _ring, _regs, _reset) -ENODEV

include/linux/soc/mediatek/mtk_wed.h

327

#define mtk_wed_device_start_hw_rro(_dev, _mask, _reset) do {} while (0)