__phy_write
__phy_write(phydev, 0x1e, extpage);
__phy_write(phydev, 0x05, parm);
__phy_write(phydev, 0x13, parm);
__phy_write(phydev, regs->reg, regs->val);
ret = __phy_write(phydev, AIR_BPBUS_MODE, AIR_BPBUS_MODE_ADDR_INCR);
ret = __phy_write(phydev, AIR_BPBUS_WR_ADDR_HIGH,
ret = __phy_write(phydev, AIR_BPBUS_WR_ADDR_LOW,
ret = __phy_write(phydev, AIR_BPBUS_WR_DATA_HIGH, val);
ret = __phy_write(phydev, AIR_BPBUS_WR_DATA_LOW, val);
ret = __phy_write(phydev, AIR_BPBUS_WR_ADDR_HIGH,
ret = __phy_write(phydev, AIR_BPBUS_WR_ADDR_LOW,
ret = __phy_write(phydev, AIR_BPBUS_WR_DATA_HIGH,
ret = __phy_write(phydev, AIR_BPBUS_WR_DATA_LOW,
return __phy_write(phydev, AIR_EXT_PAGE_ACCESS, page);
ret = __phy_write(phydev, AIR_BPBUS_MODE, AIR_BPBUS_MODE_ADDR_FIXED);
ret = __phy_write(phydev, AIR_BPBUS_RD_ADDR_HIGH,
ret = __phy_write(phydev, AIR_BPBUS_RD_ADDR_LOW,
ret = __phy_write(phydev, AIR_BPBUS_MODE, AIR_BPBUS_MODE_ADDR_FIXED);
ret = __phy_write(phydev, AIR_BPBUS_WR_ADDR_HIGH,
ret = __phy_write(phydev, AIR_BPBUS_WR_ADDR_LOW,
ret = __phy_write(phydev, AIR_BPBUS_WR_DATA_HIGH,
ret = __phy_write(phydev, AIR_BPBUS_WR_DATA_LOW,
ret = __phy_write(phydev, AIR_BPBUS_MODE, AIR_BPBUS_MODE_ADDR_FIXED);
ret = __phy_write(phydev, AIR_BPBUS_RD_ADDR_HIGH,
ret = __phy_write(phydev, AIR_BPBUS_RD_ADDR_LOW,
rc = __phy_write(phydev, MII_BCM54XX_EXP_SEL, reg);
val = __phy_write(phydev, MII_BCM54XX_RDB_ADDR, rdb);
ret = __phy_write(phydev, MII_BCM54XX_RDB_ADDR, rdb);
return __phy_write(phydev, MII_BCM54XX_EXP_DATA, val);
return __phy_write(phydev, MII_BCM54XX_RDB_DATA, val);
ret = __phy_write(phydev, MII_BCM54XX_RDB_ADDR, rdb);
return __phy_write(phydev, MII_BCM54XX_RDB_DATA, new);
val = __phy_write(phydev, MII_BCM54XX_EXP_SEL, reg);
__phy_write(phydev, MII_BCM54XX_EXP_SEL, 0);
ret = __phy_write(phydev, MII_BCM54XX_EXP_SEL, reg);
return __phy_write(phydev, MII_BCM54XX_EXP_DATA, new);
ret = __phy_write(dev, location, v);
ret = __phy_write(phydev, MII_BCM7XXX_SHD_2_ADDR_CTRL, shd);
ret = __phy_write(phydev, MII_BCM7XXX_SHD_2_ADDR_CTRL, shd);
__phy_write(phydev, MII_BCM7XXX_SHD_2_CTRL_STAT, val);
err = __phy_write(phydev, MII_BRCM_FET_BRCMTEST, reg);
err2 = __phy_write(phydev, MII_BRCM_FET_BRCMTEST, brcmtest);
err = __phy_write(phydev, MII_BRCM_FET_BRCMTEST, reg);
err2 = __phy_write(phydev, MII_BRCM_FET_BRCMTEST, brcmtest);
return __phy_write(phydev, IP101G_PAGE_CONTROL, page);
err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE,
err = __phy_write(phydev, MII_VCT5_CTRL, reg);
err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, reg);
ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
ret = __phy_write(phydev, reg, val);
__phy_write(phydev, 0x10, tr_cmd);
__phy_write(phydev, 0x11, tr_data & 0xffff);
__phy_write(phydev, 0x12, tr_data >> 16);
return __phy_write(phydev, MTK_EXT_PAGE_ACCESS, page);
__phy_write(phydev, LAN_EXT_PAGE_ACCESS_CONTROL, page);
__phy_write(phydev, LAN_EXT_PAGE_ACCESS_ADDRESS_DATA, addr);
__phy_write(phydev, LAN_EXT_PAGE_ACCESS_CONTROL,
__phy_write(phydev, LAN_EXT_PAGE_ACCESS_CONTROL, page);
__phy_write(phydev, LAN_EXT_PAGE_ACCESS_ADDRESS_DATA, addr);
__phy_write(phydev, LAN_EXT_PAGE_ACCESS_CONTROL,
val = __phy_write(phydev, LAN_EXT_PAGE_ACCESS_ADDRESS_DATA, val);
__phy_write(phydev, LAN_EXT_PAGE_ACCESS_CONTROL, page);
__phy_write(phydev, LAN_EXT_PAGE_ACCESS_ADDRESS_DATA, addr);
__phy_write(phydev, LAN_EXT_PAGE_ACCESS_CONTROL,
return __phy_write(phydev, LAN88XX_EXT_PAGE_ACCESS, page);
ret = __phy_write(phydev, LAN88XX_EXT_PAGE_TR_LOW_DATA,
ret = __phy_write(phydev, LAN88XX_EXT_PAGE_TR_HIGH_DATA,
ret = __phy_write(phydev, LAN88XX_EXT_PAGE_TR_CR, buf);
ret = __phy_write(phydev, YTPHY_PAGE_SELECT, regnum);
ret = __phy_write(phydev, YTPHY_PAGE_SELECT, regnum);
return __phy_write(phydev, YTPHY_PAGE_DATA, val);
ret = __phy_write(phydev, YTPHY_PAGE_SELECT, regnum);
return __phy_write(phydev, YT8511_PAGE_SELECT, page);
ret = __phy_write(phydev, YT8511_PAGE_SELECT, YT8511_EXT_DELAY_DRIVE);
ret = __phy_write(phydev, YT8511_PAGE_SELECT, YT8511_EXT_SLEEP_CTRL);
__phy_write(phydev, MSCC_EXT_PAGE_MACSEC_20,
__phy_write(phydev, MSCC_EXT_PAGE_MACSEC_19,
__phy_write(phydev, MSCC_EXT_PAGE_MACSEC_20,
__phy_write(phydev, MSCC_EXT_PAGE_MACSEC_17, (u16)val);
__phy_write(phydev, MSCC_EXT_PAGE_MACSEC_18, (u16)(val >> 16));
__phy_write(phydev, MSCC_EXT_PAGE_MACSEC_19,
return __phy_write(phydev, MSCC_EXT_PAGE_ACCESS, page);
__phy_write(phydev, MSCC_EXT_PAGE_ACCESS, MSCC_PHY_PAGE_EXTENDED);
__phy_write(phydev, MSCC_EXT_PAGE_ACCESS, MSCC_PHY_PAGE_STANDARD);
__phy_write(phydev, MSCC_PHY_WOL_LOWER_MAC_ADDR, pwd[0]);
__phy_write(phydev, MSCC_PHY_WOL_MID_MAC_ADDR, pwd[1]);
__phy_write(phydev, MSCC_PHY_WOL_UPPER_MAC_ADDR, pwd[2]);
__phy_write(phydev, MSCC_PHY_WOL_LOWER_MAC_ADDR, 0);
__phy_write(phydev, MSCC_PHY_WOL_MID_MAC_ADDR, 0);
__phy_write(phydev, MSCC_PHY_WOL_UPPER_MAC_ADDR, 0);
__phy_write(phydev, MSCC_PHY_WOL_LOWER_PASSWD, pwd[0]);
__phy_write(phydev, MSCC_PHY_WOL_MID_PASSWD, pwd[1]);
__phy_write(phydev, MSCC_PHY_WOL_UPPER_PASSWD, pwd[2]);
__phy_write(phydev, MSCC_PHY_WOL_LOWER_PASSWD, 0);
__phy_write(phydev, MSCC_PHY_WOL_MID_PASSWD, 0);
__phy_write(phydev, MSCC_PHY_WOL_UPPER_PASSWD, 0);
__phy_write(phydev, MSCC_PHY_WOL_MAC_CONTROL, reg_val);
__phy_write(phydev, MSCC_PHY_TR_MSB, val >> 16);
__phy_write(phydev, MSCC_PHY_TR_LSB, val & GENMASK(15, 0));
__phy_write(phydev, MSCC_PHY_TR_CNTL, TR_WRITE | TR_ADDR(addr));
ret = __phy_write(phydev, MXL86110_EXTD_REG_ADDR_OFFSET, regnum);
return __phy_write(phydev, MXL86110_EXTD_REG_ADDR_DATA, val);
ret = __phy_write(phydev, MXL86110_EXTD_REG_ADDR_OFFSET, regnum);
ret = __phy_write(phydev, MXL86110_EXTD_REG_ADDR_OFFSET, regnum);
ret = __phy_write(phydev, regnum, val);
ret = __phy_write(phydev, RTL821x_PAGE_SELECT, page);
ret = __phy_write(phydev, RTL821x_PAGE_SELECT, oldpage);
return __phy_write(phydev, RTL822X_VND2_TO_C22_REG(reg), val);
ret = __phy_write(phydev, RTL821x_PAGE_SELECT, page);
write_ret = __phy_write(phydev, RTL822X_VND2_TO_PAGE_REG(reg), val);
ret = __phy_write(phydev, RTL821x_PAGE_SELECT, oldpage);
__phy_write(phydev, MII_MMD_CTRL, MDIO_MMD_PCS);
__phy_write(phydev, MII_MMD_DATA, MDIO_PCS_EEE_ABLE);
__phy_write(phydev, MII_MMD_CTRL, MDIO_MMD_PCS | MII_MMD_CTRL_NOINCR);
return __phy_write(phydev, RTL821x_PAGE_SELECT, page);
ret = __phy_write(phydev, RTL821x_EXT_PAGE_SELECT, ext_page);
ret = __phy_write(phydev, RTL821x_EXT_PAGE_SELECT, ext_page);
__phy_write(dev, RTL8211F_PHYSICAL_ADDR_WORD0, mac_addr[1] << 8 | (mac_addr[0]));
__phy_write(dev, RTL8211F_PHYSICAL_ADDR_WORD1, mac_addr[3] << 8 | (mac_addr[2]));
__phy_write(dev, RTL8211F_PHYSICAL_ADDR_WORD2, mac_addr[5] << 8 | (mac_addr[4]));
__phy_write(dev, RTL8211F_WOL_SETTINGS_EVENTS, RTL8211F_WOL_EVENT_MAGIC);
__phy_write(dev, RTL8211F_WOL_RST_RMSQ, RTL8211F_WOL_RMSQ);
__phy_write(dev, RTL8211F_WOL_SETTINGS_EVENTS, 0);
return __phy_write(phydev, VSC73XX_EXT_PAGE_ACCESS, page);
__phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_MARVELL_WOL_PAGE);
__phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_MARVELL_COPPER_PAGE);
__phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_MARVELL_WOL_PAGE);