arch/arm64/include/asm/kvm_emulate.h

199

(__vcpu_sys_reg(vcpu, HCR_EL2) & HCR_E2H));

arch/arm64/include/asm/kvm_emulate.h

234

hcr = __vcpu_sys_reg(vcpu, HCR_EL2);

arch/arm64/include/asm/kvm_emulate.h

266

(__vcpu_sys_reg(vcpu, HCRX_EL2) & HCRX_EL2_TMEA);

arch/arm64/include/asm/kvm_emulate.h

324

u64 hcr_el2 = __vcpu_sys_reg(vcpu, HCR_EL2);

arch/arm64/include/asm/kvm_emulate.h

506

return __vcpu_sys_reg(vcpu, MPIDR_EL1) & MPIDR_HWID_BITMASK;

arch/arm64/include/asm/kvm_emulate.h

620

u64 cptr = __vcpu_sys_reg(vcpu, CPTR_EL2);

arch/arm64/include/asm/kvm_host.h

1415

(!!(__vcpu_sys_reg(vcpu, OSLSR_EL1) & OSLSR_EL1_OSLK))

arch/arm64/kvm/arch_timer.c

73

return __vcpu_sys_reg(vcpu, CNTV_CTL_EL0);

arch/arm64/kvm/arch_timer.c

75

return __vcpu_sys_reg(vcpu, CNTP_CTL_EL0);

arch/arm64/kvm/arch_timer.c

77

return __vcpu_sys_reg(vcpu, CNTHV_CTL_EL2);

arch/arm64/kvm/arch_timer.c

79

return __vcpu_sys_reg(vcpu, CNTHP_CTL_EL2);

arch/arm64/kvm/arch_timer.c

825

u64 val = __vcpu_sys_reg(vcpu, CNTHCTL_EL2);

arch/arm64/kvm/arch_timer.c

92

return __vcpu_sys_reg(vcpu, CNTV_CVAL_EL0);

arch/arm64/kvm/arch_timer.c

94

return __vcpu_sys_reg(vcpu, CNTP_CVAL_EL0);

arch/arm64/kvm/arch_timer.c

96

return __vcpu_sys_reg(vcpu, CNTHV_CVAL_EL2);

arch/arm64/kvm/arch_timer.c

98

return __vcpu_sys_reg(vcpu, CNTHP_CVAL_EL2);

arch/arm64/kvm/arm.c

589

val = __vcpu_sys_reg(vcpu, HCR_EL2);

arch/arm64/kvm/at.c

104

!(__vcpu_sys_reg(vcpu, HCRX_EL2) & HCRX_EL2_TCR2En))

arch/arm64/kvm/at.c

148

hcr = __vcpu_sys_reg(vcpu, HCR_EL2);

arch/arm64/kvm/at.c

803

if (__vcpu_sys_reg(vcpu, HCR_EL2) & HCR_FWB) {

arch/arm64/kvm/at.c

857

if ((__vcpu_sys_reg(vcpu, HCR_EL2) & HCR_CD) &&

arch/arm64/kvm/at.c

889

(__vcpu_sys_reg(vcpu, HCR_EL2) & HCR_DC)) {

arch/arm64/kvm/config.c

1583

u64 nested = __vcpu_sys_reg(vcpu, reg);

arch/arm64/kvm/emulate-nested.c

2396

val = __vcpu_sys_reg(vcpu, tb->index);

arch/arm64/kvm/emulate-nested.c

2455

val = __vcpu_sys_reg(vcpu, sr);

arch/arm64/kvm/emulate-nested.c

2548

tmp = __vcpu_sys_reg(vcpu, HCRX_EL2);

arch/arm64/kvm/emulate-nested.c

2630

(__vcpu_sys_reg(vcpu, reg) & control_bit)) {

arch/arm64/kvm/emulate-nested.c

2723

elr = __vcpu_sys_reg(vcpu, ELR_EL2);

arch/arm64/kvm/emulate-nested.c

2845

!(__vcpu_sys_reg(vcpu, HCR_EL2) & HCR_IMO))

arch/arm64/kvm/emulate-nested.c

2860

if (__vcpu_sys_reg(vcpu, SCTLR2_EL2) & SCTLR2_EL1_EASE)

arch/arm64/kvm/emulate-nested.c

500

u64 val = __vcpu_sys_reg(vcpu, CNTHCTL_EL2);

arch/arm64/kvm/emulate-nested.c

528

val = __vcpu_sys_reg(vcpu, HCR_EL2);

arch/arm64/kvm/emulate-nested.c

535

!(__vcpu_sys_reg(vcpu, CNTHCTL_EL2) & CNTHCTL_EL1NVPCT))

arch/arm64/kvm/emulate-nested.c

544

!(__vcpu_sys_reg(vcpu, CNTHCTL_EL2) & CNTHCTL_EL1NVVCT))

arch/arm64/kvm/emulate-nested.c

552

u64 val = __vcpu_sys_reg(vcpu, CPTR_EL2);

arch/arm64/kvm/handle_exit.c

320

u64 hcrx = __vcpu_sys_reg(vcpu, HCRX_EL2);

arch/arm64/kvm/handle_exit.c

354

fwd &= (__vcpu_sys_reg(vcpu, HFGITR2_EL2) & HFGITR2_EL2_TSBCSYNC);

arch/arm64/kvm/handle_exit.c

358

fwd &= (__vcpu_sys_reg(vcpu, HFGITR_EL2) & HFGITR_EL2_PSBCSYNC);

arch/arm64/kvm/hyp/exception.c

28

return __vcpu_sys_reg(vcpu, reg);

arch/arm64/kvm/hyp/include/hyp/switch.h

321

u64 val = __vcpu_sys_reg(vcpu, HCRX_EL2);

arch/arm64/kvm/hyp/include/hyp/switch.h

379

vsesr = __vcpu_sys_reg(vcpu, VSESR_EL2);

arch/arm64/kvm/hyp/include/hyp/switch.h

449

sve_cond_update_zcr_vq(__vcpu_sys_reg(vcpu, ZCR_EL2), SYS_ZCR_EL2);

arch/arm64/kvm/hyp/include/hyp/switch.h

451

write_sysreg_el1(__vcpu_sys_reg(vcpu, vcpu_sve_zcr_elx(vcpu)), SYS_ZCR);

arch/arm64/kvm/hyp/include/hyp/switch.h

475

zcr_el2 = __vcpu_sys_reg(vcpu, ZCR_EL2);

arch/arm64/kvm/hyp/include/hyp/switch.h

481

zcr_el1 = __vcpu_sys_reg(vcpu, vcpu_sve_zcr_elx(vcpu));

arch/arm64/kvm/hyp/include/hyp/switch.h

597

write_sysreg_s(__vcpu_sys_reg(vcpu, FPMR), SYS_FPMR);

arch/arm64/kvm/hyp/include/hyp/switch.h

601

write_sysreg(__vcpu_sys_reg(vcpu, FPEXC32_EL2), fpexc32_el2);

arch/arm64/kvm/hyp/include/hyp/switch.h

712

val = __vcpu_sys_reg(vcpu, CNTHCTL_EL2);

arch/arm64/kvm/hyp/include/hyp/switch.h

726

val = __vcpu_sys_reg(vcpu, CNTHCTL_EL2);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

370

write_sysreg(__vcpu_sys_reg(vcpu, DACR32_EL2), dacr32_el2);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

371

write_sysreg(__vcpu_sys_reg(vcpu, IFSR32_EL2), ifsr32_el2);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

374

write_sysreg(__vcpu_sys_reg(vcpu, DBGVCR32_EL2), dbgvcr32_el2);

arch/arm64/kvm/hyp/vgic-v3-sr.c

1080

ich_hcr = __vcpu_sys_reg(vcpu, ICH_HCR_EL2);

arch/arm64/kvm/hyp/vgic-v3-sr.c

1085

(__vcpu_sys_reg(vcpu, HFGRTR_EL2) & HFGRTR_EL2_ICC_IGRPENn_EL1))

arch/arm64/kvm/hyp/vgic-v3-sr.c

1089

(__vcpu_sys_reg(vcpu, HFGWTR_EL2) & HFGWTR_EL2_ICC_IGRPENn_EL1))

arch/arm64/kvm/hyp/vgic-v3-sr.c

1106

(__vcpu_sys_reg(vcpu, HFGRTR_EL2) & HFGRTR_EL2_ICC_IGRPENn_EL1))

arch/arm64/kvm/hyp/vgic-v3-sr.c

1110

(__vcpu_sys_reg(vcpu, HFGWTR_EL2) & HFGWTR_EL2_ICC_IGRPENn_EL1))

arch/arm64/kvm/hyp/vhe/switch.c

129

val = __vcpu_sys_reg(vcpu, CNTP_CVAL_EL0);

arch/arm64/kvm/hyp/vhe/switch.c

131

val = __vcpu_sys_reg(vcpu, CNTHP_CVAL_EL2);

arch/arm64/kvm/hyp/vhe/switch.c

242

cval = __vcpu_sys_reg(vcpu, CNTP_CVAL_EL0);

arch/arm64/kvm/hyp/vhe/switch.c

243

ctl = __vcpu_sys_reg(vcpu, CNTP_CTL_EL0);

arch/arm64/kvm/hyp/vhe/switch.c

247

cval = __vcpu_sys_reg(vcpu, CNTV_CVAL_EL0);

arch/arm64/kvm/hyp/vhe/switch.c

248

ctl = __vcpu_sys_reg(vcpu, CNTV_CTL_EL0);

arch/arm64/kvm/hyp/vhe/switch.c

289

val = __vcpu_sys_reg(vcpu, CNTP_CVAL_EL0);

arch/arm64/kvm/hyp/vhe/switch.c

298

val = __vcpu_sys_reg(vcpu, CNTP_CVAL_EL0);

arch/arm64/kvm/hyp/vhe/switch.c

315

val = __vcpu_sys_reg(vcpu, CNTV_CVAL_EL0);

arch/arm64/kvm/hyp/vhe/switch.c

321

val = __vcpu_sys_reg(vcpu, CNTV_CVAL_EL0);

arch/arm64/kvm/hyp/vhe/switch.c

352

if ((__vcpu_sys_reg(vcpu, HCR_EL2) & HCR_NV) ||

arch/arm64/kvm/hyp/vhe/switch.c

353

(__vcpu_sys_reg(vcpu, HFGITR_EL2) & HFGITR_EL2_ERET))

arch/arm64/kvm/hyp/vhe/switch.c

450

vcpu_set_reg(vcpu, rt, __vcpu_sys_reg(vcpu, CPTR_EL2));

arch/arm64/kvm/hyp/vhe/switch.c

87

guest_hcr = __vcpu_sys_reg(vcpu, HCR_EL2);

arch/arm64/kvm/hyp/vhe/switch.c

92

va |= __vcpu_sys_reg(vcpu, VNCR_EL2) & GENMASK(PAGE_SHIFT - 1, 0);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

105

write_sysreg_el1(__vcpu_sys_reg(vcpu, SCTLR_EL2), SYS_SCTLR);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

106

write_sysreg_el1(__vcpu_sys_reg(vcpu, CPTR_EL2), SYS_CPACR);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

107

write_sysreg_el1(__vcpu_sys_reg(vcpu, TTBR0_EL2), SYS_TTBR0);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

108

write_sysreg_el1(__vcpu_sys_reg(vcpu, TTBR1_EL2), SYS_TTBR1);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

109

write_sysreg_el1(__vcpu_sys_reg(vcpu, TCR_EL2), SYS_TCR);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

110

write_sysreg_el1(__vcpu_sys_reg(vcpu, CNTHCTL_EL2), SYS_CNTKCTL);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

116

val = translate_sctlr_el2_to_sctlr_el1(__vcpu_sys_reg(vcpu, SCTLR_EL2));

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

118

val = translate_cptr_el2_to_cpacr_el1(__vcpu_sys_reg(vcpu, CPTR_EL2));

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

120

val = translate_ttbr0_el2_to_ttbr0_el1(__vcpu_sys_reg(vcpu, TTBR0_EL2));

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

122

val = translate_tcr_el2_to_tcr_el1(__vcpu_sys_reg(vcpu, TCR_EL2));

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

127

write_sysreg_el1(__vcpu_sys_reg(vcpu, TCR2_EL2), SYS_TCR2);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

130

write_sysreg_el1(__vcpu_sys_reg(vcpu, PIR_EL2), SYS_PIR);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

131

write_sysreg_el1(__vcpu_sys_reg(vcpu, PIRE0_EL2), SYS_PIRE0);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

135

write_sysreg_el1(__vcpu_sys_reg(vcpu, POR_EL2), SYS_POR);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

138

write_sysreg_el1(__vcpu_sys_reg(vcpu, ESR_EL2), SYS_ESR);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

139

write_sysreg_el1(__vcpu_sys_reg(vcpu, AFSR0_EL2), SYS_AFSR0);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

140

write_sysreg_el1(__vcpu_sys_reg(vcpu, AFSR1_EL2), SYS_AFSR1);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

141

write_sysreg_el1(__vcpu_sys_reg(vcpu, FAR_EL2), SYS_FAR);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

142

write_sysreg(__vcpu_sys_reg(vcpu, SP_EL2), sp_el1);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

143

write_sysreg_el1(__vcpu_sys_reg(vcpu, ELR_EL2), SYS_ELR);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

144

write_sysreg_el1(__vcpu_sys_reg(vcpu, SPSR_EL2), SYS_SPSR);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

147

write_sysreg_el1(__vcpu_sys_reg(vcpu, SCTLR2_EL2), SYS_SCTLR2);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

90

write_sysreg(__vcpu_sys_reg(vcpu, PAR_EL1), par_el1);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

91

write_sysreg(__vcpu_sys_reg(vcpu, TPIDR_EL1), tpidr_el1);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

94

write_sysreg(__vcpu_sys_reg(vcpu, MPIDR_EL1), vmpidr_el2);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

95

write_sysreg_el1(__vcpu_sys_reg(vcpu, MAIR_EL2), SYS_MAIR);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

96

write_sysreg_el1(__vcpu_sys_reg(vcpu, VBAR_EL2), SYS_VBAR);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

97

write_sysreg_el1(__vcpu_sys_reg(vcpu, CONTEXTIDR_EL2), SYS_CONTEXTIDR);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

98

write_sysreg_el1(__vcpu_sys_reg(vcpu, AMAIR_EL2), SYS_AMAIR);

arch/arm64/kvm/inject_fault.c

239

if (__vcpu_sys_reg(vcpu, HCR_EL2) & (HCR_TGE | HCR_TEA))

arch/arm64/kvm/inject_fault.c

246

(__vcpu_sys_reg(vcpu, HCRX_EL2) & HCRX_EL2_TMEA);

arch/arm64/kvm/inject_fault.c

344

if (!(__vcpu_sys_reg(vcpu, HCRX_EL2) & HCRX_EL2_TMEA))

arch/arm64/kvm/inject_fault.c

84

!(__vcpu_sys_reg(vcpu, HCRX_EL2) & HCRX_EL2_SCTLR2En))

arch/arm64/kvm/nested.c

1257

return (u64)sign_extend64(__vcpu_sys_reg(vcpu, VNCR_EL2), 48);

arch/arm64/kvm/nested.c

1913

u64 guest_mdcr = __vcpu_sys_reg(vcpu, MDCR_EL2);

arch/arm64/kvm/nested.c

791

if (__vcpu_sys_reg(vcpu, HCR_EL2) & HCR_NV)

arch/arm64/kvm/pauth.c

170

ikey.lo = __vcpu_sys_reg(vcpu, APIBKEYLO_EL1);

arch/arm64/kvm/pauth.c

171

ikey.hi = __vcpu_sys_reg(vcpu, APIBKEYHI_EL1);

arch/arm64/kvm/pauth.c

176

ikey.lo = __vcpu_sys_reg(vcpu, APIAKEYLO_EL1);

arch/arm64/kvm/pauth.c

177

ikey.hi = __vcpu_sys_reg(vcpu, APIAKEYHI_EL1);

arch/arm64/kvm/pauth.c

40

mod = __vcpu_sys_reg(vcpu, SP_EL2);

arch/arm64/kvm/pmu-emul.c

101

return __vcpu_sys_reg(vcpu, MDCR_EL2) & MDCR_EL2_HLP;

arch/arm64/kvm/pmu-emul.c

1038

u64 val = __vcpu_sys_reg(vcpu, MDCR_EL2);

arch/arm64/kvm/pmu-emul.c

125

return __vcpu_sys_reg(kvm_pmc_to_vcpu(pmc), counter_index_to_evtreg(pmc->idx));

arch/arm64/kvm/pmu-emul.c

1302

u64 pmcr = __vcpu_sys_reg(vcpu, PMCR_EL0);

arch/arm64/kvm/pmu-emul.c

1306

n = FIELD_GET(MDCR_EL2_HPMN, __vcpu_sys_reg(vcpu, MDCR_EL2));

arch/arm64/kvm/pmu-emul.c

1317

mask = __vcpu_sys_reg(vcpu, PMCNTENSET_EL0);

arch/arm64/kvm/pmu-emul.c

134

counter = __vcpu_sys_reg(vcpu, reg);

arch/arm64/kvm/pmu-emul.c

177

val = __vcpu_sys_reg(vcpu, reg) & GENMASK(63, 32);

arch/arm64/kvm/pmu-emul.c

282

hpmn = SYS_FIELD_GET(MDCR_EL2, HPMN, __vcpu_sys_reg(vcpu, MDCR_EL2));

arch/arm64/kvm/pmu-emul.c

375

u64 reg = __vcpu_sys_reg(vcpu, PMOVSSET_EL0);

arch/arm64/kvm/pmu-emul.c

377

reg &= __vcpu_sys_reg(vcpu, PMINTENSET_EL1);

arch/arm64/kvm/pmu-emul.c

490

mask &= __vcpu_sys_reg(vcpu, PMCNTENSET_EL0);

arch/arm64/kvm/pmu-emul.c

497

type = __vcpu_sys_reg(vcpu, counter_index_to_evtreg(i));

arch/arm64/kvm/pmu-emul.c

503

reg = __vcpu_sys_reg(vcpu, counter_index_to_reg(i)) + 1;

arch/arm64/kvm/pmu-emul.c

601

if ((__vcpu_sys_reg(vcpu, PMCR_EL0) ^ val) & ARMV8_PMU_PMCR_E)

arch/arm64/kvm/pmu-emul.c

625

unsigned int mdcr = __vcpu_sys_reg(vcpu, MDCR_EL2);

arch/arm64/kvm/pmu-emul.c

627

if (!(__vcpu_sys_reg(vcpu, PMCNTENSET_EL0) & BIT(pmc->idx)))

arch/arm64/kvm/pmu-emul.c

657

u64 mdcr = __vcpu_sys_reg(vcpu, MDCR_EL2);

arch/arm64/kvm/sys_regs.c

1058

p->regval = __vcpu_sys_reg(vcpu, PMSELR_EL0)

arch/arm64/kvm/sys_regs.c

1144

__vcpu_sys_reg(vcpu, PMSELR_EL0));

arch/arm64/kvm/sys_regs.c

1194

idx = SYS_FIELD_GET(PMSELR_EL0, SEL, __vcpu_sys_reg(vcpu, PMSELR_EL0));

arch/arm64/kvm/sys_regs.c

1214

p->regval = __vcpu_sys_reg(vcpu, reg);

arch/arm64/kvm/sys_regs.c

1234

*val = __vcpu_sys_reg(vcpu, r->reg) & mask;

arch/arm64/kvm/sys_regs.c

1258

p->regval = __vcpu_sys_reg(vcpu, PMCNTENSET_EL0);

arch/arm64/kvm/sys_regs.c

1282

p->regval = __vcpu_sys_reg(vcpu, PMINTENSET_EL1);

arch/arm64/kvm/sys_regs.c

1304

p->regval = __vcpu_sys_reg(vcpu, PMOVSSET_EL0);

arch/arm64/kvm/sys_regs.c

1336

p->regval = __vcpu_sys_reg(vcpu, PMUSERENR_EL0)

arch/arm64/kvm/sys_regs.c

1649

*val = __vcpu_sys_reg(vcpu, rd->reg);

arch/arm64/kvm/sys_regs.c

2406

p->regval = __vcpu_sys_reg(vcpu, r->reg);

arch/arm64/kvm/sys_regs.c

2463

return __vcpu_sys_reg(vcpu, r->reg);

arch/arm64/kvm/sys_regs.c

2671

p->regval = __vcpu_sys_reg(vcpu, SP_EL1);

arch/arm64/kvm/sys_regs.c

2695

p->regval = __vcpu_sys_reg(vcpu, SPSR_EL1);

arch/arm64/kvm/sys_regs.c

2707

p->regval = __vcpu_sys_reg(vcpu, CNTKCTL_EL1);

arch/arm64/kvm/sys_regs.c

2721

return __vcpu_sys_reg(vcpu, r->reg);

arch/arm64/kvm/sys_regs.c

2775

p->regval = __vcpu_sys_reg(vcpu, ZCR_EL2);

arch/arm64/kvm/sys_regs.c

2912

u64 hpmn, val, old = __vcpu_sys_reg(vcpu, MDCR_EL2);

arch/arm64/kvm/sys_regs.c

315

val |= __vcpu_sys_reg(vcpu, reg) & ~CNTKCTL_VALID_BITS;

arch/arm64/kvm/sys_regs.c

338

return __vcpu_sys_reg(vcpu, reg);

arch/arm64/kvm/sys_regs.c

4085

get_vmid(__vcpu_sys_reg(vcpu, VTTBR_EL2)),

arch/arm64/kvm/sys_regs.c

5375

val = __vcpu_sys_reg(vcpu, r->reg);

arch/arm64/kvm/sys_regs.c

733

p->regval = __vcpu_sys_reg(vcpu, r->reg);

arch/arm64/kvm/sys_regs.c

941

return __vcpu_sys_reg(vcpu, r->reg);

arch/arm64/kvm/sys_regs.c

949

return __vcpu_sys_reg(vcpu, r->reg);

arch/arm64/kvm/sys_regs.c

961

return __vcpu_sys_reg(vcpu, r->reg);

arch/arm64/kvm/sys_regs.c

969

return __vcpu_sys_reg(vcpu, r->reg);

arch/arm64/kvm/sys_regs.c

985

return __vcpu_sys_reg(vcpu, r->reg);

arch/arm64/kvm/sys_regs.c

990

u64 reg = __vcpu_sys_reg(vcpu, PMUSERENR_EL0);

arch/arm64/kvm/sys_regs.h

151

return __vcpu_sys_reg(vcpu, r->reg);

arch/arm64/kvm/sys_regs.h

159

return __vcpu_sys_reg(vcpu, r->reg);

arch/arm64/kvm/trace_arm.h

352

__entry->hcr_el2 = __vcpu_sys_reg(vcpu, HCR_EL2);

arch/arm64/kvm/trace_arm.h

382

__entry->hcr_el2 = __vcpu_sys_reg(vcpu, HCR_EL2);

arch/arm64/kvm/vgic-sys-reg-v3.c

310

*val = __vcpu_sys_reg(vcpu, r->reg);

arch/arm64/kvm/vgic/vgic-v3-nested.c

123

xmo = __vcpu_sys_reg(vcpu, HCR_EL2) & (HCR_IMO | HCR_FMO);

arch/arm64/kvm/vgic/vgic-v3-nested.c

149

u64 lr = __vcpu_sys_reg(vcpu, ICH_LRN(i));

arch/arm64/kvm/vgic/vgic-v3-nested.c

184

hcr = __vcpu_sys_reg(vcpu, ICH_HCR_EL2);

arch/arm64/kvm/vgic/vgic-v3-nested.c

185

vmcr = __vcpu_sys_reg(vcpu, ICH_VMCR_EL2);

arch/arm64/kvm/vgic/vgic-v3-nested.c

192

if (__vcpu_sys_reg(vcpu, ICH_HCR_EL2) & ICH_HCR_EL2_UIE) {

arch/arm64/kvm/vgic/vgic-v3-nested.c

257

u64 lr = __vcpu_sys_reg(vcpu, ICH_LRN(i));

arch/arm64/kvm/vgic/vgic-v3-nested.c

273

u64 val = __vcpu_sys_reg(vcpu, ICH_HCR_EL2);

arch/arm64/kvm/vgic/vgic-v3-nested.c

289

lr = __vcpu_sys_reg(vcpu, ICH_LRN(i));

arch/arm64/kvm/vgic/vgic-v3-nested.c

329

s_cpu_if->vgic_hcr = __vcpu_sys_reg(vcpu, ICH_HCR_EL2);

arch/arm64/kvm/vgic/vgic-v3-nested.c

330

s_cpu_if->vgic_vmcr = __vcpu_sys_reg(vcpu, ICH_VMCR_EL2);

arch/arm64/kvm/vgic/vgic-v3-nested.c

334

s_cpu_if->vgic_ap0r[i] = __vcpu_sys_reg(vcpu, ICH_AP0RN(i));

arch/arm64/kvm/vgic/vgic-v3-nested.c

335

s_cpu_if->vgic_ap1r[i] = __vcpu_sys_reg(vcpu, ICH_AP1RN(i));

arch/arm64/kvm/vgic/vgic-v3-nested.c

404

level = (__vcpu_sys_reg(vcpu, ICH_HCR_EL2) & ICH_HCR_EL2_En) && vgic_v3_get_misr(vcpu);