__opcode_to_mem_arm
#define __mem_to_opcode_arm(x) __opcode_to_mem_arm(x)
#define UPROBE_SWBP_INSN __opcode_to_mem_arm(UPROBE_SWBP_ARM_INSN)
old = __opcode_to_mem_arm(old);
#define PLT_ENT_LDR __opcode_to_mem_arm(0xe59ff000 | \
*(u32 *)loc &= __opcode_to_mem_arm(0xff000000);
*(u32 *)loc |= __opcode_to_mem_arm(offset);
*(u32 *)loc &= __opcode_to_mem_arm(0xf000000f);
*(u32 *)loc |= __opcode_to_mem_arm(0x01a0f000);
*(u32 *)loc = __opcode_to_mem_arm(tmp);
*(u32 *)loc = __opcode_to_mem_arm((tmp & ~0xfff) | offset);
*(u32 *)loc = __opcode_to_mem_arm((tmp & ~0xfff) | offset);
insn = __opcode_to_mem_arm(insn);
return __opcode_to_mem_arm(0xe710f110);
return __opcode_to_mem_arm(0xe730f110);
return __opcode_to_mem_arm(0xe12fff1e);
memset32(addr, __opcode_to_mem_arm(0xe7fddef1),
u32 insn = __opcode_to_mem_arm(BUG_INSTR_VALUE);
if (ctx->target[i] == __opcode_to_mem_arm(ARM_INST_UDF))
inst = __opcode_to_mem_arm(inst);
*ptr++ = __opcode_to_mem_arm(ARM_INST_UDF);
asi->insn[1] = __opcode_to_mem_arm(0xe12fff1e); /* ARM bx lr */
asi->insn[1] = __opcode_to_mem_arm(0xe1a0f00e); /* mov pc, lr */
asi->insn[0] = __opcode_to_mem_arm(insn);
asi->insn[0] = __opcode_to_mem_arm((insn & 0xfff00000) |
code[TMPL_SUB_SP] = __opcode_to_mem_arm(0xe24dd000 | stack_protect);
code[TMPL_ADD_SP] = __opcode_to_mem_arm(0xe28d3000 | stack_protect);
code[TMPL_RESTORE_BEGIN] = __opcode_to_mem_arm(0xe89d7fff);
code[TMPL_RESTORE_ORIGN_INSN] = __opcode_to_mem_arm(orig->opcode);
code[TMPL_RESTORE_END] = __opcode_to_mem_arm(final_branch);
auprobe->ixol[0] = __opcode_to_mem_arm(insn);
*pinsn = __opcode_to_mem_arm(insn);
__opcode_to_mem_arm(auprobe->bpinsn), true);
auprobe->ixol[0] = __opcode_to_mem_arm(insn);
auprobe->ixol[1] = __opcode_to_mem_arm(UPROBE_SS_ARM_INSN);