__drm_atomic_helper_plane_reset
__drm_atomic_helper_plane_reset(plane, &amdgpu_state->base);
__drm_atomic_helper_plane_reset(plane, &state->base);
__drm_atomic_helper_plane_reset(plane, &state->base);
__drm_atomic_helper_plane_reset(plane, &state->base.base);
__drm_atomic_helper_plane_reset(plane, &st->base);
__drm_atomic_helper_plane_reset(p, &state->base);
EXPORT_SYMBOL(__drm_atomic_helper_plane_reset);
__drm_atomic_helper_plane_reset(plane, plane->state);
__drm_atomic_helper_plane_reset(plane, &shadow_plane_state->base);
__drm_atomic_helper_plane_reset(plane, NULL);
__drm_atomic_helper_plane_reset(plane, &exynos_state->base);
__drm_atomic_helper_plane_reset(plane, &ipu_state->base);
__drm_atomic_helper_plane_reset(plane, &state->base);
__drm_atomic_helper_plane_reset(plane, &pstate->base);
__drm_atomic_helper_plane_reset(plane, &mdp5_state->base);
__drm_atomic_helper_plane_reset(plane, &asyw->state);
__drm_atomic_helper_plane_reset(plane, &omap_state->base);
__drm_atomic_helper_plane_reset(plane, &state->state);
__drm_atomic_helper_plane_reset(plane, &state->state);
__drm_atomic_helper_plane_reset(plane, &state->state);
__drm_atomic_helper_plane_reset(plane, &state->base);
__drm_atomic_helper_plane_reset(plane, &state->state);
__drm_atomic_helper_plane_reset(plane, &vc4_state->base);
__drm_atomic_helper_plane_reset(plane, &vps->base);
void __drm_atomic_helper_plane_reset(struct drm_plane *plane,