arch/arm64/include/asm/hw_breakpoint.h

88

#define AARCH64_DBG_REG_WVR (AARCH64_DBG_REG_BCR + ARM_MAX_BRP)

arch/arm64/kernel/hw_breakpoint.c

113

GEN_READ_WB_REG_CASES(AARCH64_DBG_REG_BCR, AARCH64_DBG_REG_NAME_BCR, val);

arch/arm64/kernel/hw_breakpoint.c

128

GEN_WRITE_WB_REG_CASES(AARCH64_DBG_REG_BCR, AARCH64_DBG_REG_NAME_BCR, val);

arch/arm64/kernel/hw_breakpoint.c

236

ctrl_reg = AARCH64_DBG_REG_BCR;

arch/arm64/kernel/hw_breakpoint.c

589

case AARCH64_DBG_REG_BCR:

arch/arm64/kernel/hw_breakpoint.c

649

ctrl_reg = read_wb_reg(AARCH64_DBG_REG_BCR, i);

arch/arm64/kernel/hw_breakpoint.c

669

toggle_bp_registers(AARCH64_DBG_REG_BCR, DBG_ACTIVE_EL0, 0);

arch/arm64/kernel/hw_breakpoint.c

680

toggle_bp_registers(AARCH64_DBG_REG_BCR, DBG_ACTIVE_EL1, 0);

arch/arm64/kernel/hw_breakpoint.c

861

toggle_bp_registers(AARCH64_DBG_REG_BCR, DBG_ACTIVE_EL0, 1);

arch/arm64/kernel/hw_breakpoint.c

881

toggle_bp_registers(AARCH64_DBG_REG_BCR, DBG_ACTIVE_EL1, 1);

arch/arm64/kernel/hw_breakpoint.c

922

toggle_bp_registers(AARCH64_DBG_REG_BCR,

arch/arm64/kernel/hw_breakpoint.c

954

write_wb_reg(AARCH64_DBG_REG_BCR, i, 0UL);