arch/riscv/include/asm/asm.h

29

#define REG_L __REG_SEL(ld, lw)

arch/riscv/include/asm/asm.h

30

#define REG_S __REG_SEL(sd, sw)

arch/riscv/include/asm/asm.h

31

#define REG_SC __REG_SEL(sc.d, sc.w)

arch/riscv/include/asm/asm.h

32

#define REG_AMOSWAP_AQ __REG_SEL(amoswap.d.aq, amoswap.w.aq)

arch/riscv/include/asm/asm.h

33

#define REG_ASM __REG_SEL(.dword, .word)

arch/riscv/include/asm/asm.h

34

#define SZREG __REG_SEL(8, 4)

arch/riscv/include/asm/asm.h

35

#define LGREG __REG_SEL(3, 2)

arch/riscv/include/asm/asm.h

36

#define SRLI __REG_SEL(srliw, srli)

tools/testing/selftests/rseq/rseq-riscv.h

25

#define REG_L __REG_SEL("ld ", "lw ")

tools/testing/selftests/rseq/rseq-riscv.h

26

#define REG_S __REG_SEL("sd ", "sw ")