Symbol: BT
arch/arm64/kernel/cpufeature.c
2912
ARM64_CPUID_FIELDS(ID_AA64PFR1_EL1, BT, IMP)
arch/arm64/kernel/cpufeature.c
3331
HWCAP_CAP(ID_AA64PFR1_EL1, BT, IMP, CAP_HWCAP, KERNEL_HWCAP_BTI),
arch/arm64/kvm/config.c
210
#define FEAT_BTI ID_AA64PFR1_EL1, BT, IMP
arch/arm64/kvm/hyp/nvhe/sys_regs.c
105
MAX_FEAT(ID_AA64PFR1_EL1, BT, IMP),
arch/nios2/include/asm/asm-macros.h
110
BT \reg1, \reg2, \bit
arch/nios2/include/asm/asm-macros.h
78
.macro BT reg1, reg2, bit
arch/nios2/include/asm/asm-macros.h
98
BT \reg1, \reg2, \bit
arch/powerpc/xmon/ppc-opc.c
241
#define BI16 BT + 1
arch/powerpc/xmon/ppc-opc.c
4377
{"crnot", XL(19,33), XL_MASK, PPCCOM, PPCVLE, {BT, BA, BBA}},
arch/powerpc/xmon/ppc-opc.c
4378
{"crnor", XL(19,33), XL_MASK, COM, PPCVLE, {BT, BA, BB}},
arch/powerpc/xmon/ppc-opc.c
4389
{"crandc", XL(19,129), XL_MASK, COM, PPCVLE, {BT, BA, BB}},
arch/powerpc/xmon/ppc-opc.c
4396
{"crclr", XL(19,193), XL_MASK, PPCCOM, PPCVLE, {BT, BAT, BBA}},
arch/powerpc/xmon/ppc-opc.c
4397
{"crxor", XL(19,193), XL_MASK, COM, PPCVLE, {BT, BA, BB}},
arch/powerpc/xmon/ppc-opc.c
4401
{"crnand", XL(19,225), XL_MASK, COM, PPCVLE, {BT, BA, BB}},
arch/powerpc/xmon/ppc-opc.c
4403
{"crand", XL(19,257), XL_MASK, COM, PPCVLE, {BT, BA, BB}},
arch/powerpc/xmon/ppc-opc.c
4407
{"crset", XL(19,289), XL_MASK, PPCCOM, PPCVLE, {BT, BAT, BBA}},
arch/powerpc/xmon/ppc-opc.c
4408
{"creqv", XL(19,289), XL_MASK, COM, PPCVLE, {BT, BA, BB}},
arch/powerpc/xmon/ppc-opc.c
4415
{"crorc", XL(19,417), XL_MASK, COM, PPCVLE, {BT, BA, BB}},
arch/powerpc/xmon/ppc-opc.c
4419
{"crmove", XL(19,449), XL_MASK, PPCCOM, PPCVLE, {BT, BA, BBA}},
arch/powerpc/xmon/ppc-opc.c
4420
{"cror", XL(19,449), XL_MASK, COM, PPCVLE, {BT, BA, BB}},
arch/powerpc/xmon/ppc-opc.c
6775
{"mtfsb1", XRC(63,38,0), XRARB_MASK, COM, PPCVLE, {BT}},
arch/powerpc/xmon/ppc-opc.c
6776
{"mtfsb1.", XRC(63,38,1), XRARB_MASK, COM, PPCVLE, {BT}},
arch/powerpc/xmon/ppc-opc.c
6789
{"mtfsb0", XRC(63,70,0), XRARB_MASK, COM, PPCVLE, {BT}},
arch/powerpc/xmon/ppc-opc.c
6790
{"mtfsb0.", XRC(63,70,1), XRARB_MASK, COM, PPCVLE, {BT}},
arch/powerpc/xmon/ppc-opc.c
7146
{"e_crandc", XL(31,129), XL_MASK, PPCVLE, 0, {BT, BA, BB}},
arch/powerpc/xmon/ppc-opc.c
7147
{"e_crnand", XL(31,225), XL_MASK, PPCVLE, 0, {BT, BA, BB}},
arch/powerpc/xmon/ppc-opc.c
7148
{"e_crnot", XL(31,33), XL_MASK, PPCVLE, 0, {BT, BA, BBA}},
arch/powerpc/xmon/ppc-opc.c
7149
{"e_crnor", XL(31,33), XL_MASK, PPCVLE, 0, {BT, BA, BB}},
arch/powerpc/xmon/ppc-opc.c
7150
{"e_crclr", XL(31,193), XL_MASK, PPCVLE, 0, {BT, BAT, BBA}},
arch/powerpc/xmon/ppc-opc.c
7151
{"e_crxor", XL(31,193), XL_MASK, PPCVLE, 0, {BT, BA, BB}},
arch/powerpc/xmon/ppc-opc.c
7156
{"e_crand", XL(31,257), XL_MASK, PPCVLE, 0, {BT, BA, BB}},
arch/powerpc/xmon/ppc-opc.c
7161
{"e_crset", XL(31,289), XL_MASK, PPCVLE, 0, {BT, BAT, BBA}},
arch/powerpc/xmon/ppc-opc.c
7162
{"e_creqv", XL(31,289), XL_MASK, PPCVLE, 0, {BT, BA, BB}},
arch/powerpc/xmon/ppc-opc.c
7167
{"e_crorc", XL(31,417), XL_MASK, PPCVLE, 0, {BT, BA, BB}},
arch/powerpc/xmon/ppc-opc.c
7169
{"e_crmove", XL(31,449), XL_MASK, PPCVLE, 0, {BT, BA, BBA}},
arch/powerpc/xmon/ppc-opc.c
7170
{"e_cror", XL(31,449), XL_MASK, PPCVLE, 0, {BT, BA, BB}},
drivers/net/ethernet/intel/i40e/i40e_dcb.h
176
#define I40E_BT2KB(BT) (((BT) + (8 * 1024 - 1)) / (8 * 1024))
drivers/net/ethernet/intel/i40e/i40e_dcb.h
177
#define I40E_B2BT(BT) ((BT) * 8)
drivers/net/ethernet/intel/i40e/i40e_dcb.h
178
#define I40E_BT2B(BT) (((BT) + (8 - 1)) / 8)
drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
3051
#define IXGBE_BT2KB(BT) ((BT + (8 * 1024 - 1)) / (8 * 1024))
drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
3052
#define IXGBE_B2BT(BT) (BT * 8)
drivers/net/ethernet/wangxun/libwx/wx_type.h
513
#define WX_BT2KB(BT) (((BT) + (8 * 1024 - 1)) / (8 * 1024))
drivers/net/ethernet/wangxun/libwx/wx_type.h
514
#define WX_B2BT(BT) ((BT) * 8)
drivers/net/wireless/realtek/rtw89/coex.c
9269
CASE_BTC_POLUT_STR(BT);
drivers/net/wireless/realtek/rtw89/coex.c
9514
CASE_BTC_INIT(BT);
sound/aoa/soundbus/i2sbus/pcm.c
608
if (le16_to_cpu(pi->dbdma_ring.cmds[i].xfer_status) & BT)
tools/testing/selftests/kvm/arm64/set_id_regs.c
149
REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64PFR1_EL1, BT, 0),