__GUEST_ASSERT
__GUEST_ASSERT(xctl & CTL_ISTATUS, "xctl = 0x%lx", xctl);
__GUEST_ASSERT(config_iter + 1 == irq_iter,
__GUEST_ASSERT(xcnt >= cval,
__GUEST_ASSERT(h == n, "Handled %d IRQS but expected %d", h, n);
__GUEST_ASSERT((expect_fault) == fault, \
__GUEST_ASSERT(fsc == ESR_ELx_FSC_ACCESS_L(3), \
__GUEST_ASSERT(ss_idx < 4, "Expected index < 4, got '%lu'", ss_idx);
__GUEST_ASSERT(res.a0 == SMCCC_RET_NOT_SUPPORTED,
__GUEST_ASSERT(res.a0 != SMCCC_RET_NOT_SUPPORTED,
__GUEST_ASSERT(!undef, #r " unexpected UNDEF"); \
__GUEST_ASSERT(sys64, #r " didn't trap"); \
__GUEST_ASSERT(res.a0 == ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_0 &&
__GUEST_ASSERT((val & BIT(0)),
__GUEST_ASSERT(handled, #r " no read trap"); \
__GUEST_ASSERT(handled, #r " no write trap"); \
__GUEST_ASSERT(FIELD_GET(ID_AA64PFR0_EL1_GIC,
__GUEST_ASSERT((_tval & mask), \
__GUEST_ASSERT(!(_tval & mask), \
__GUEST_ASSERT(read_data == write_data,
__GUEST_ASSERT(read_data == 0,
__GUEST_ASSERT(read_data == write_data,
__GUEST_ASSERT(expected_ec == ec,
__GUEST_ASSERT(expected_pmcr_n <= ARMV8_PMU_MAX_GENERAL_COUNTERS,
__GUEST_ASSERT(pmcr_n == expected_pmcr_n,
__GUEST_ASSERT(mem[i] == 0xaa,
__GUEST_ASSERT(vals.a == vals.b, \
__GUEST_ASSERT(_condition, #_condition)
__GUEST_ASSERT(!fault, "Unexpected fault 0x%x on WRMSR(%x) = %lx\n",
__GUEST_ASSERT(fault == GP_VECTOR,
__GUEST_ASSERT(i < GITS_CMDQ_POLL_ITERATIONS,
__GUEST_ASSERT(!ret.error || ret.error == SBI_ERR_NOT_SUPPORTED,
__GUEST_ASSERT(config_iter + 1 == irq_iter,
__GUEST_ASSERT(xcnt_diff_us >= us,
__GUEST_ASSERT(start <= us,
__GUEST_ASSERT(prev <= start,
__GUEST_ASSERT(val > cfg,
__GUEST_ASSERT(irq_iter == 0,
__GUEST_ASSERT(xcnt >= cmp,
__GUEST_ASSERT(config_iter + 1 == irq_iter,
__GUEST_ASSERT(ret.error == 0, "Unable to start counter %ld\n", counter);
__GUEST_ASSERT(ret.error == SBI_ERR_ALREADY_STOPPED,
__GUEST_ASSERT(ret.error == 0 || ret.error == SBI_ERR_ALREADY_STOPPED,
__GUEST_ASSERT(regs->cause == EXC_INST_ILLEGAL,
__GUEST_ASSERT(opcode == INSN_OPCODE_SYSTEM,
__GUEST_ASSERT(funct3 <= 7 && (funct3 != 0 && funct3 != 4),
__GUEST_ASSERT((csr_num >= CSR_CYCLE && csr_num <= CSR_HPMCOUNTER31),
__GUEST_ASSERT(ret.error == 0, "config matching failed %ld\n", ret.error);
__GUEST_ASSERT(ret.error == 0, "Unable to retrieve number of counters from SBI PMU");
__GUEST_ASSERT(ret.value < RISCV_MAX_PMU_COUNTERS,
__GUEST_ASSERT(ctrinfo.type < 2, "Invalid counter type %d", ctrinfo.type);
__GUEST_ASSERT(0, "SBI implementation version doesn't support PMU Snapshot");
__GUEST_ASSERT(counter_value_post > counter_value_pre,
__GUEST_ASSERT(counter_value_pre > counter_value_post,
__GUEST_ASSERT(counter_value_post > counter_init_value,
__GUEST_ASSERT(counter_value_post > counter_value_pre,
__GUEST_ASSERT(counter_value_pre > counter_value_post,
__GUEST_ASSERT(counter_value_post > counter_init_value,
__GUEST_ASSERT(counter_value_post < counter_init_value,
__GUEST_ASSERT(result == tests[*i].expected,
__GUEST_ASSERT(val == 1 || val == MMIO_VAL,
__GUEST_ASSERT(val == 1 || val == 0,
__GUEST_ASSERT(val == 1 || val == MMIO_VAL,
__GUEST_ASSERT(vector == NM_VECTOR,
__GUEST_ASSERT(freq < apic_hz * 105 / 100 && freq > apic_hz * 95 / 100,
__GUEST_ASSERT(v == ex_v, \
__GUEST_ASSERT(a == ex_a && d == ex_d, \
__GUEST_ASSERT(v || ex_v || (flags == ex_flags), \
__GUEST_ASSERT(val == ex_val, \
__GUEST_ASSERT(flags == ex_flags, \
__GUEST_ASSERT(output == ex_output, \
__GUEST_ASSERT(flags == ex_flags, \
__GUEST_ASSERT(output == ex_output, \
__GUEST_ASSERT(flags == ex_flags, \
__GUEST_ASSERT(vector == UD_VECTOR,
__GUEST_ASSERT(!vector,
__GUEST_ASSERT(vector == GP_VECTOR,
__GUEST_ASSERT(!vector,
__GUEST_ASSERT(!vector,
__GUEST_ASSERT((vector) == UD_VECTOR, \
__GUEST_ASSERT(!(vector), \
__GUEST_ASSERT(this_cpu_has(X86_FEATURE_MWAIT) == !(testcase & MWAIT_DISABLED),
__GUEST_ASSERT(!vec, "Unexpected %s on RDMSR(0x%x)", ex_str(vec), msr);
__GUEST_ASSERT(val == want, "Wanted 0x%lx from RDMSR(0x%x), got 0x%lx",
__GUEST_ASSERT(!vec, "Unexpected %s on WRMSR(0x%x, 0x%lx)",
__GUEST_ASSERT(vec == GP_VECTOR, "Wanted #GP on RDMSR(0x%x), got %s",
__GUEST_ASSERT(vec == GP_VECTOR, "Wanted #GP on WRMSR(0x%x, 0x%lx), got %s",
__GUEST_ASSERT(vec == GP_VECTOR,
__GUEST_ASSERT(exit_reason == insn->exit_reason[f],
__GUEST_ASSERT(exit_insn_len == insn_len,
__GUEST_ASSERT(count >= NUM_INSNS_RETIRED,
__GUEST_ASSERT(expect_gp ? vector == GP_VECTOR : !vector, \
__GUEST_ASSERT(val == expected, \
__GUEST_ASSERT(vector == GP_VECTOR,
__GUEST_ASSERT(vector == GP_VECTOR,
__GUEST_ASSERT(mem[i] == pattern, \
__GUEST_ASSERT(vmcb->control.exit_code == SVM_EXIT_VMMCALL,
__GUEST_ASSERT(vmcb->control.exit_code == SVM_EXIT_HLT,
__GUEST_ASSERT(buffer[i] == 0xaa,
__GUEST_ASSERT(vector == GP_VECTOR,
__GUEST_ASSERT((__supported & (xfeatures)) != (xfeatures) || \
__GUEST_ASSERT(!__supported || __supported == (xfeatures), \
__GUEST_ASSERT(!vector,
__GUEST_ASSERT(!vector,
__GUEST_ASSERT(vector == GP_VECTOR,