drivers/gpu/drm/i915/display/intel_display_reg_defs.h

51

#define _PIPE(pipe, a, b) _PICK_EVEN(pipe, a, b)

drivers/gpu/drm/i915/display/intel_display_reg_defs.h

52

#define _PLANE(plane, a, b) _PICK_EVEN(plane, a, b)

drivers/gpu/drm/i915/display/intel_display_reg_defs.h

53

#define _TRANS(tran, a, b) _PICK_EVEN(tran, a, b)

drivers/gpu/drm/i915/display/intel_display_reg_defs.h

54

#define _PORT(port, a, b) _PICK_EVEN(port, a, b)

drivers/gpu/drm/i915/display/intel_display_reg_defs.h

55

#define _PLL(pll, a, b) _PICK_EVEN(pll, a, b)

drivers/gpu/drm/i915/display/intel_display_reg_defs.h

56

#define _PHY(phy, a, b) _PICK_EVEN(phy, a, b)

drivers/gpu/drm/i915/display/intel_display_regs.h

1206

#define _ID(id, a, b) _PICK_EVEN(id, a, b)

drivers/gpu/drm/i915/display/intel_display_regs.h

1722

#define BW_BUDDY_CTL(x) _MMIO(_PICK_EVEN(x, \

drivers/gpu/drm/i915/display/intel_display_regs.h

1731

#define BW_BUDDY_PAGE_MASK(x) _MMIO(_PICK_EVEN(x, \

drivers/gpu/drm/i915/display/intel_display_regs.h

3205

#define TCSS_DDI_STATUS(tc) _MMIO(_PICK_EVEN(tc, \

drivers/gpu/drm/i915/display/intel_dmc_regs.h

518

#define TGL_PIPE_MMIO_START(dmc_id) _PICK_EVEN(((dmc_id) - 1), _TGL_PIPEA_MMIO_START,\

drivers/gpu/drm/i915/display/intel_dmc_regs.h

521

#define TGL_PIPE_MMIO_END(dmc_id) _PICK_EVEN(((dmc_id) - 1), _TGL_PIPEA_MMIO_END,\

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

72

#define _ICL_DSC0_PPS_0(pipe) _PICK_EVEN((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

75

#define _ICL_DSC1_PPS_0(pipe) _PICK_EVEN((pipe) - PIPE_B, \

drivers/gpu/drm/i915/display/intel_vdsc_regs.h

78

#define _BMG_DSC2_PPS_0(pipe) _PICK_EVEN((pipe) - PIPE_B, \

drivers/gpu/drm/i915/gt/intel_gt_regs.h

324

#define RING_FAULT_REG(engine) _MMIO(_PICK_EVEN((engine)->class, \

drivers/gpu/drm/xe/regs/xe_hw_error_regs.h

27

#define ERR_STAT_GT_REG(x) XE_REG(_PICK_EVEN((x), \

drivers/gpu/drm/xe/regs/xe_hw_error_regs.h

39

#define DEV_ERR_STAT_REG(x) XE_REG(_PICK_EVEN((x), \

drivers/gpu/drm/xe/regs/xe_hw_error_regs.h

50

#define ERR_STAT_GT_FATAL_VECTOR_REG(x) XE_REG(_PICK_EVEN((x), \

drivers/gpu/drm/xe/regs/xe_hw_error_regs.h

57

#define ERR_STAT_GT_COR_VECTOR_REG(x) XE_REG(_PICK_EVEN((x), \

drivers/gpu/drm/xe/regs/xe_hw_error_regs.h

70

#define SOC_GLOBAL_ERR_STAT_REG(base, x) XE_REG(_PICK_EVEN((x), \

drivers/gpu/drm/xe/regs/xe_hw_error_regs.h

78

#define SOC_GSYSEVTCTL_REG(master, slave, x) XE_REG(_PICK_EVEN((x), \

include/drm/intel/mchbar_regs.h

105

_PICK_EVEN((x) - 8, BXT_D_CR_DRP0_DUNIT8,\

include/drm/intel/pick.h

41

((__index) < (__c_index) ? _PICK_EVEN(__index, __a, __b) : \

include/drm/intel/pick.h

42

_PICK_EVEN((__index) - (__c_index), __c, __d)))