arch/arm/mach-omap2/soc.h
469
static int __init __used __##fn(void) \
arch/arm/mach-omap2/soc.h
475
level(__##fn);
arch/powerpc/include/asm/debug.h
25
if (unlikely(__ ## __NAME)) \
arch/powerpc/include/asm/debug.h
26
return __ ## __NAME(regs); \
arch/powerpc/include/asm/kasan.h
6
#define _GLOBAL_KASAN(fn) _GLOBAL(__##fn)
arch/powerpc/include/asm/kasan.h
7
#define _GLOBAL_TOC_KASAN(fn) _GLOBAL_TOC(__##fn)
arch/powerpc/include/asm/kasan.h
8
#define EXPORT_SYMBOL_KASAN(fn) EXPORT_SYMBOL(__##fn)
arch/powerpc/platforms/cell/spufs/file.c
1208
static int __##__get(void *data, u64 *val) \
arch/powerpc/platforms/cell/spufs/file.c
1230
DEFINE_SPUFS_SIMPLE_ATTRIBUTE(__name, __##__get, __set, __fmt);
arch/riscv/include/asm/io.h
66
static inline void __ ## port ## len(const volatile void __iomem *addr, \
arch/riscv/include/asm/io.h
83
static inline void __ ## port ## len(volatile void __iomem *addr, \
arch/s390/include/asm/debug.h
414
#define VNAME(var, suffix) __##var##_##suffix
arch/s390/include/asm/set_memory.h
47
static inline int __##fname(void *start, void *end) \
arch/s390/include/asm/string.h
57
#define __no_sanitize_prefix_strfunc(x) __##x
arch/x86/include/asm/cmpxchg.h
67
__ ## op ## _wrong_size(); \
arch/x86/include/asm/idtentry.h
108
__##func (regs, error_code); \
arch/x86/include/asm/idtentry.h
113
static __always_inline void __##func(struct pt_regs *regs, \
arch/x86/include/asm/idtentry.h
207
static void __##func(struct pt_regs *regs, u32 vector); \
arch/x86/include/asm/idtentry.h
217
run_irq_on_irqstack_cond(__##func, regs, vector); \
arch/x86/include/asm/idtentry.h
222
static noinline void __##func(struct pt_regs *regs, u32 vector)
arch/x86/include/asm/idtentry.h
249
static void __##func(struct pt_regs *regs); \
arch/x86/include/asm/idtentry.h
253
run_sysvec_on_irqstack_cond(__##func, regs); \
arch/x86/include/asm/idtentry.h
272
static noinline void __##func(struct pt_regs *regs)
arch/x86/include/asm/idtentry.h
286
static __always_inline void __##func(struct pt_regs *regs); \
arch/x86/include/asm/idtentry.h
291
__##func (regs); \
arch/x86/include/asm/idtentry.h
311
static __always_inline void __##func(struct pt_regs *regs)
arch/x86/include/asm/idtentry.h
54
static __always_inline void __##func(struct pt_regs *regs); \
arch/x86/include/asm/idtentry.h
61
__##func (regs); \
arch/x86/include/asm/idtentry.h
66
static __always_inline void __##func(struct pt_regs *regs)
arch/x86/include/asm/idtentry.h
99
static __always_inline void __##func(struct pt_regs *regs, \
arch/x86/include/asm/perf_event_p4.h
66
class##__##name = ((1ULL << bit) << P4_ESCR_EVENTMASK_SHIFT)
arch/x86/include/asm/perf_event_p4.h
67
#define P4_ESCR_EMASK_BIT(class, name) class##__##name
arch/x86/include/asm/syscall_wrapper.h
100
__weak long __##abi##_##name(const struct pt_regs *__unused); \
arch/x86/include/asm/syscall_wrapper.h
101
__weak long __##abi##_##name(const struct pt_regs *__unused) \
arch/x86/include/asm/syscall_wrapper.h
86
long __##abi##_##name(const struct pt_regs *regs); \
arch/x86/include/asm/syscall_wrapper.h
87
ALLOW_ERROR_INJECTION(__##abi##_##name, ERRNO); \
arch/x86/include/asm/syscall_wrapper.h
88
long __##abi##_##name(const struct pt_regs *regs) \
arch/x86/include/asm/syscall_wrapper.h
92
long __##abi##_##name(const struct pt_regs *regs); \
arch/x86/include/asm/syscall_wrapper.h
93
ALLOW_ERROR_INJECTION(__##abi##_##name, ERRNO); \
arch/x86/include/asm/syscall_wrapper.h
94
long __##abi##_##name(const struct pt_regs *regs) \
arch/x86/kvm/vmx/vmx.h
588
static inline u##bits __##lname##_controls_get(struct loaded_vmcs *vmcs) \
arch/x86/kvm/vmx/vmx.h
594
return __##lname##_controls_get(vmx->loaded_vmcs); \
drivers/crypto/caam/desc_constr.h
400
__##ee##size data = cpu_to_##ee##size(immediate); \
drivers/crypto/inside-secure/safexcel.h
66
char __##name##_desc[size] CRYPTO_MINALIGN_ATTR; \
drivers/crypto/inside-secure/safexcel.h
67
struct type##_request *name = (void *)__##name##_desc
drivers/dma-buf/selftest.c
32
#define param(n) __PASTE(igt__, __PASTE(__PASTE(__LINE__, __), n))
drivers/gpu/drm/amd/amdgpu/amdgpu.h
1424
#define REG_FIELD_SHIFT(reg, field) reg##__##field##__SHIFT
drivers/gpu/drm/amd/amdgpu/amdgpu.h
1425
#define REG_FIELD_MASK(reg, field) reg##__##field##_MASK
drivers/gpu/drm/amd/amdgpu/soc15.h
103
#define SOC15_REG_FIELD(reg, field) reg##__##field##_MASK, reg##__##field##__SHIFT
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c
68
FD(reg_name##__##field)
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c
44
FD(reg_name##__##field)
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/dcn301_smu.c
43
FD(reg_name##__##field)
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c
40
FD(reg_name##__##field)
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.c
56
FD(reg_name##__##field)
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c
65
FD(reg_name##__##field)
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_smu.c
57
FD(reg_name##__##field)
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c
56
FD(reg_name##__##field)
drivers/gpu/drm/amd/display/dc/dccg/dcn20/dcn20_dccg.h
57
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/dccg/dcn20/dcn20_dccg.h
60
.field_prefix ## _ ## field_name[inst] = reg_name ## __ ## field_prefix ## inst ## _ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/dccg/dcn20/dcn20_dccg.h
63
.field_prefix ## _ ## field_name[inst] = block ## inst ## _ ## reg_name ## __ ## field_prefix ## inst ## _ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.h
33
.field_prefix ## _ ## field_name[inst] = block ## inst ## _ ## reg_name ## __ ## field_prefix ## inst ## _ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/dccg/dcn32/dcn32_dccg.h
32
.field_prefix ## _ ## field_name[inst] = block ## inst ## _ ## reg_name ## __ ## field_prefix ## inst ## _ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.h
31
.field_prefix ## _ ## field_name[inst] = block ## inst ## _ ## reg_name ## __ ## field_prefix ## inst ## _ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.h
32
.field_prefix ## _ ## field_name[inst] = block ## inst ## _ ## reg_name ## __ ## field_prefix ## inst ## _ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/dce/dce_abm.h
132
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/dce/dce_audio.h
45
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/dce/dce_aux.h
213
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
46
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h
101
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h
104
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h
65
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h
155
.field_name = blk_name ## reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/dce/dce_opp.h
96
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.h
60
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h
117
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
177
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
49
CRTC_REG_UPDATE_N(reg, 1, FD(reg##__##field), val)
drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
52
CRTC_REG_UPDATE_N(reg, 2, FD(reg##__##field1), val1, FD(reg##__##field2), val2)
drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
55
CRTC_REG_UPDATE_N(reg, 3, FD(reg##__##field1), val1, FD(reg##__##field2), val2, FD(reg##__##field3), val3)
drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
58
CRTC_REG_UPDATE_N(reg, 3, FD(reg##__##field1), val1, FD(reg##__##field2), val2, FD(reg##__##field3), val3, FD(reg##__##field4), val4)
drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
61
CRTC_REG_UPDATE_N(reg, 3, FD(reg##__##field1), val1, FD(reg##__##field2), val2, FD(reg##__##field3), val3, FD(reg##__##field4), val4, FD(reg##__##field5), val5)
drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
64
CRTC_REG_SET_N(reg, 1, FD(reg##__##field), val)
drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
67
CRTC_REG_SET_N(reg, 2, FD(reg##__##field1), val1, FD(reg##__##field2), val2)
drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
70
CRTC_REG_SET_N(reg, 3, FD(reg##__##field1), val1, FD(reg##__##field2), val2, FD(reg##__##field3), val3)
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dwb.h
48
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h
77
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/dcn201/dcn201_opp.h
34
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/dcn301/dcn301_panel_cntl.h
43
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.h
177
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
197
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/dm_services.h
100
reg_name ## __ ## reg_field ## __SHIFT)
drivers/gpu/drm/amd/display/dc/dm_services.h
116
reg_name ## __ ## reg_field ## _MASK,\
drivers/gpu/drm/amd/display/dc/dm_services.h
117
reg_name ## __ ## reg_field ## __SHIFT)
drivers/gpu/drm/amd/display/dc/dm_services.h
168
block ## reg_num ## _ ## reg_name ## __ ## reg_field ## _MASK,\
drivers/gpu/drm/amd/display/dc/dm_services.h
169
block ## reg_num ## _ ## reg_name ## __ ## reg_field ## __SHIFT)
drivers/gpu/drm/amd/display/dc/dm_services.h
175
block ## reg_num ## _ ## reg_name ## __ ## reg_field ## _MASK,\
drivers/gpu/drm/amd/display/dc/dm_services.h
176
block ## reg_num ## _ ## reg_name ## __ ## reg_field ## __SHIFT)
drivers/gpu/drm/amd/display/dc/dm_services.h
99
reg_name ## __ ## reg_field ## _MASK,\
drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.h
38
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.h
88
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c
43
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c
80
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c
47
.field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c
51
.field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c
97
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dce60/hw_factory_dce60.c
84
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c
84
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c
129
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c
48
.field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c
93
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c
103
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c
159
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c
63
.field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c
70
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c
58
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c
100
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c
140
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c
61
.field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c
68
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c
58
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c
110
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c
166
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c
70
.field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c
77
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c
63
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn315/hw_factory_dcn315.c
106
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn315/hw_factory_dcn315.c
158
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn315/hw_factory_dcn315.c
67
.field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn315/hw_factory_dcn315.c
74
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn315/hw_translate_dcn315.c
58
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn32/hw_factory_dcn32.c
102
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn32/hw_factory_dcn32.c
170
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn32/hw_factory_dcn32.c
63
.field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn32/hw_factory_dcn32.c
70
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn32/hw_translate_dcn32.c
56
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn401/hw_factory_dcn401.c
162
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn401/hw_factory_dcn401.c
43
.field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn401/hw_factory_dcn401.c
50
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn401/hw_factory_dcn401.c
82
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/gpio/dcn401/hw_translate_dcn401.c
31
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/hubbub/dcn10/dcn10_hubbub.h
232
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.h
271
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h
706
.field_name = blk_name ## reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h
709
.field_name = blk_name ## reg_name ## __ ## blk_name ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h
116
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
61
FD(reg_name##__##field)
drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c
79
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c
81
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c
82
~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c
86
block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c
88
block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c
176
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c
178
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c
179
~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c
183
block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c
185
block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c
179
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c
181
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c
182
~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c
186
block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c
188
block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c
128
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c
130
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c
131
~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c
135
block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c
137
block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c
189
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c
191
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c
192
~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c
196
block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c
198
block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c
203
reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c
205
reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c
206
~reg1 ## __ ## mask1 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c
210
reg2 ## __ ## mask2 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c
212
reg2 ## __ ## mask2 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c
196
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c
198
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c
199
~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c
203
block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c
205
block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c
210
reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c
212
reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c
213
~reg1 ## __ ## mask1 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c
217
reg2 ## __ ## mask2 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c
219
reg2 ## __ ## mask2 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c
180
.enable_mask = block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c
182
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c
183
~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c
186
.ack_mask = block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c
187
.ack_value = block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c
199
reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c
201
reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c
202
~reg1 ## __ ## mask1 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c
206
reg2 ## __ ## mask2 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c
208
reg2 ## __ ## mask2 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c
123
.enable_mask = block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c
125
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c
126
~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c
129
.ack_mask = block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c
130
.ack_value = block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c
184
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c
186
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c
187
~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c
191
block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c
193
block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c
198
reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c
200
reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c
201
~reg1 ## __ ## mask1 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c
205
reg2 ## __ ## mask2 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c
207
reg2 ## __ ## mask2 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c
186
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c
188
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c
189
~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c
193
block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c
195
block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c
200
reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c
202
reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c
203
~reg1 ## __ ## mask1 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c
207
reg2 ## __ ## mask2 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c
209
reg2 ## __ ## mask2 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c
191
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c
193
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c
194
~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c
198
block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c
200
block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c
205
reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c
207
reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c
208
~reg1 ## __ ## mask1 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c
212
reg2 ## __ ## mask2 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c
214
reg2 ## __ ## mask2 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c
195
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c
197
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c
198
~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c
202
block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c
204
block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c
209
reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c
211
reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c
212
~reg1 ## __ ## mask1 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c
216
reg2 ## __ ## mask2 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c
218
reg2 ## __ ## mask2 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c
183
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c
185
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c
187
~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK, \
drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c
190
block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c
192
block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c
197
reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c
199
reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c
201
~reg1 ## __ ## mask1 ## _MASK, \
drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c
204
reg2 ## __ ## mask2 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c
206
reg2 ## __ ## mask2 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c
162
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c
164
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c
166
~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK, \
drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c
169
block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c
171
block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c
176
reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c
178
reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c
180
~reg1 ## __ ## mask1 ## _MASK, \
drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c
183
reg2 ## __ ## mask2 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c
185
reg2 ## __ ## mask2 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c
161
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c
163
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c
165
~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK, \
drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c
168
block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c
170
block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c
175
reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c
177
reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c
179
~reg1 ## __ ## mask1 ## _MASK, \
drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c
182
reg2 ## __ ## mask2 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c
184
reg2 ## __ ## mask2 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c
175
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c
177
block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c
178
~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c
182
block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c
184
block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c
189
reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c
191
reg1 ## __ ## mask1 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c
192
~reg1 ## __ ## mask1 ## _MASK \
drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c
196
reg2 ## __ ## mask2 ## _MASK,\
drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c
198
reg2 ## __ ## mask2 ## _MASK \
drivers/gpu/drm/amd/display/dc/opp/dcn10/dcn10_opp.h
34
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/opp/dcn20/dcn20_opp.h
34
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h
60
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
132
.field_name = reg_name ## __ ## bitfield ## post_fix
drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
141
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
144
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
147
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c
151
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c
184
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c
209
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c
180
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c
205
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
158
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
175
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
192
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
178
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
174
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
178
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
190
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
170
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
175
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
165
.field_name = reg_name ## __ ## field_name ## post_fix
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h
164
#define DMUB_SF(reg, field) uint8_t reg##__##field;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h
170
#define DMUB_SF(reg, field) uint32_t reg##__##field;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h
165
#define DMUB_SF(reg, field) uint8_t reg##__##field;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h
171
#define DMUB_SF(reg, field) uint32_t reg##__##field;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c
51
#define DMUB_SF(reg, field) REG_STRUCT->mask.reg##__##field = FD_MASK(reg, field);
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c
55
#define DMUB_SF(reg, field) REG_STRUCT->shift.reg##__##field = FD_SHIFT(reg, field);
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h
181
#define DMUB_SF(reg, field) uint8_t reg##__##field;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h
187
#define DMUB_SF(reg, field) uint32_t reg##__##field;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
49
#define DMUB_SF(reg, field) REG_STRUCT->mask.reg##__##field = FD_MASK(reg, field);
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c
53
#define DMUB_SF(reg, field) REG_STRUCT->shift.reg##__##field = FD_SHIFT(reg, field);
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h
183
#define DMUB_SF(reg, field) uint8_t reg##__##field;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h
189
#define DMUB_SF(reg, field) uint32_t reg##__##field;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn351.c
26
#define DMUB_SF(reg, field) REG_STRUCT->mask.reg##__##field = FD_MASK(reg, field);
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn351.c
30
#define DMUB_SF(reg, field) REG_STRUCT->shift.reg##__##field = FD_SHIFT(reg, field);
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn36.c
26
#define DMUB_SF(reg, field) REG_STRUCT->mask.reg##__##field = FD_MASK(reg, field);
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn36.c
30
#define DMUB_SF(reg, field) REG_STRUCT->shift.reg##__##field = FD_SHIFT(reg, field);
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h
183
#define DMUB_SF(reg, field) uint8_t reg##__##field;
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h
189
#define DMUB_SF(reg, field) uint32_t reg##__##field;
drivers/gpu/drm/amd/display/dmub/src/dmub_reg.h
39
#define FD_SHIFT(reg_name, field) reg_name##__##field##__SHIFT
drivers/gpu/drm/amd/display/dmub/src/dmub_reg.h
41
#define FD_MASK(reg_name, field) reg_name##__##field##_MASK
drivers/gpu/drm/amd/display/dmub/src/dmub_reg.h
47
#define FN(reg_name, field) FD(reg_name##__##field)
drivers/gpu/drm/amd/include/cgs_common.h
120
#define CGS_REG_FIELD_SHIFT(reg, field) reg##__##field##__SHIFT
drivers/gpu/drm/amd/include/cgs_common.h
121
#define CGS_REG_FIELD_MASK(reg, field) reg##__##field##_MASK
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu_helper.h
137
#define PHM_FIELD_SHIFT(reg, field) reg##__##field##__SHIFT
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu_helper.h
138
#define PHM_FIELD_MASK(reg, field) reg##__##field##_MASK
drivers/gpu/drm/i915/display/intel_display_types.h
2284
struct type: __##type##_to_intel_display((struct type *)(p))
drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
103
__##_name##_show); \
drivers/md/bcache/sysfs.h
28
ret = __ ## fn ## _show(kobj, attr, buf); \
drivers/md/bcache/sysfs.h
38
ret = __ ## fn ## _store(kobj, attr, buf, size); \
drivers/media/common/v4l2-tpg/v4l2-tpg-core.c
1913
typedef struct { u16 __; u8 _; } __packed x24;
drivers/net/ethernet/intel/idpf/idpf.h
611
for (struct idpf_vport **__##iter = &(adapter)->vports[0], \
drivers/net/ethernet/intel/idpf/idpf.h
612
*iter = (adapter)->max_vports ? *__##iter : NULL; \
drivers/net/ethernet/intel/idpf/idpf.h
614
iter = (++__##iter) < &(adapter)->vports[(adapter)->max_vports] ? \
drivers/net/ethernet/intel/idpf/idpf.h
615
*__##iter : NULL)
drivers/net/wireless/realtek/rtw89/fw.c
849
__##_type##_DIS_FW_FEAT(_chip, _cond, _maj, _min, _sub, _idx, _feat)
fs/btrfs/misc.h
27
__ ## name ## _BIT, \
fs/btrfs/misc.h
28
name = (1U << __ ## name ## _BIT), \
fs/btrfs/misc.h
29
__ ## name ## _SEQ = __ ## name ## _BIT
include/asm-generic/vmlinux.lds.h
333
__##name##_of_table = .; \
include/asm-generic/vmlinux.lds.h
334
KEEP(*(__##name##_of_table)) \
include/asm-generic/vmlinux.lds.h
335
KEEP(*(__##name##_of_table_end))
include/asm-generic/vmlinux.lds.h
347
BOUNDED_SECTION_POST_LABEL(__##name##_acpi_probe_table, \
include/asm-generic/vmlinux.lds.h
348
__##name##_acpi_probe_table,, _end)
include/asm-generic/vmlinux.lds.h
356
BOUNDED_SECTION_POST_LABEL(__##name##_thermal_table, \
include/asm-generic/vmlinux.lds.h
357
__##name##_thermal_table,, _end)
include/crypto/acompress.h
45
char __##name##_req[sizeof(struct acomp_req) + \
include/crypto/acompress.h
48
__##name##_req, (tfm))
include/crypto/acompress.h
51
acomp_request_clone(name, sizeof(__##name##_req), gfp)
include/crypto/aead.h
169
char __##name##_desc[sizeof(struct aead_request) + \
include/crypto/aead.h
173
(((struct aead_request *)__##name##_desc)->base.tfm = \
include/crypto/aead.h
175
(void *)__##name##_desc)
include/crypto/hash.h
204
char __##shash##_desc[sizeof(struct shash_desc) + HASH_MAX_DESCSIZE] \
include/crypto/hash.h
206
struct shash_desc *shash = (struct shash_desc *)__##shash##_desc
include/crypto/hash.h
209
char __##name##_req[sizeof(struct ahash_request) + \
include/crypto/hash.h
212
ahash_request_on_stack_init(__##name##_req, (_tfm))
include/crypto/hash.h
215
hash_request_clone(name, sizeof(__##name##_req), gfp)
include/crypto/internal/acompress.h
21
char __##name##_req[sizeof(struct acomp_req) + \
include/crypto/internal/acompress.h
24
__##name##_req, (req))
include/crypto/internal/hash.h
27
char __##name##_req[sizeof(struct ahash_request) + \
include/crypto/internal/hash.h
30
__##name##_req, (req))
include/crypto/internal/hash.h
354
memzero_explicit(__##name##_req, sizeof(__##name##_req))
include/crypto/skcipher.h
221
char __##name##_desc[sizeof(struct skcipher_request) + \
include/crypto/skcipher.h
225
(((struct skcipher_request *)__##name##_desc)->base.tfm = \
include/crypto/skcipher.h
227
(void *)__##name##_desc)
include/linux/acpi.h
1413
#define ACPI_PROBE_TABLE(name) __##name##_acpi_probe_table
include/linux/acpi.h
1414
#define ACPI_PROBE_TABLE_END(name) __##name##_acpi_probe_table_end
include/linux/bitfield.h
214
static __always_inline __##type __must_check type##_encode_bits(base v, base field) \
include/linux/bitfield.h
220
static __always_inline __##type __must_check type##_replace_bits(__##type old, \
include/linux/bitfield.h
225
static __always_inline void type##p_replace_bits(__##type *p, \
include/linux/bitfield.h
230
static __always_inline base __must_check type##_get_bits(__##type v, base field) \
include/linux/btf_ids.h
65
__BTF_ID(__ID(__BTF_ID__##prefix##__##name##__), "")
include/linux/btf_ids.h
68
__BTF_ID(__ID(__BTF_ID__##prefix##__##name##__), ".long " #flags "\n")
include/linux/clk-provider.h
1476
static void __init __##name##_of_clk_init_declare(struct device_node *np) \
include/linux/clk-provider.h
1481
OF_DECLARE_1(clk, name, compat, __##name##_of_clk_init_declare)
include/linux/cookie.h
23
static DEFINE_PER_CPU(struct pcpu_gen_cookie, __##name); \
include/linux/cookie.h
25
.local = &__##name, \
include/linux/genl_magic_func.h
140
static int __ ## s_name ## _from_attrs(struct s_name *s, \
include/linux/genl_magic_func.h
162
return __ ## s_name ## _from_attrs(s, info, false); \
include/linux/genl_magic_func.h
167
return __ ## s_name ## _from_attrs(s, info, true); \
include/linux/init.h
205
__PASTE(__, \
include/linux/init.h
213
__PASTE(__, \
include/linux/init.h
215
__PASTE(__, \
include/linux/math.h
124
__##type numerator; \
include/linux/math.h
125
__##type denominator; \
include/linux/module.h
250
__PASTE(__, \
include/linux/module.h
252
__PASTE(__, name))))))
include/linux/netdevice.h
190
atomic_long_t __##FIELD; \
include/linux/netdevice.h
5673
#define DEV_STATS_INC(DEV, FIELD) atomic_long_inc(&(DEV)->stats.__##FIELD)
include/linux/netdevice.h
5675
atomic_long_add((VAL), &(DEV)->stats.__##FIELD)
include/linux/netdevice.h
5676
#define DEV_STATS_READ(DEV, FIELD) atomic_long_read(&(DEV)->stats.__##FIELD)
include/linux/sched/topology.h
14
#define SD_FLAG(name, mflags) __##name,
include/linux/sched/topology.h
21
#define SD_FLAG(name, mflags) name = 1 << __##name,
include/net/ipv6.h
257
_DEVINC(net, ipv6, __, idev, field)
include/net/ipv6.h
261
_DEVADD(net, ipv6, __, idev, field, val)
include/net/ipv6.h
265
_DEVUPD(net, ipv6, __, idev, field, val)
include/net/ipv6.h
269
_DEVINCATOMIC(net, icmpv6, __, idev, field)
include/trace/stages/init.h
16
__##TRACE_SYSTEM##_##a = \
include/trace/stages/init.h
24
*TRACE_SYSTEM##_##a = &__##TRACE_SYSTEM##_##a
include/trace/stages/init.h
29
__##TRACE_SYSTEM##_##a = \
include/trace/stages/init.h
37
*TRACE_SYSTEM##_##a = &__##TRACE_SYSTEM##_##a
kernel/bpf/offload.c
852
#define XDP_METADATA_KFUNC(name, _, __, xmo) \
kernel/sched/topology.c
37
#define SD_FLAG(_name, mflags) [__##_name] = { .meta_flags = mflags, .name = #_name },
lib/crypto/mpi/longlong.h
46
#define __MPN(x) __##x
lib/tests/overflow_kunit.c
357
DEFINE_TEST_FUNC_TYPED(t ## _ ## t ## __ ## t, t, fmt)
lib/tests/overflow_kunit.c
49
static const struct test_ ## t1 ## _ ## t2 ## __ ## t { \
lib/tests/overflow_kunit.c
54
} t1 ## _ ## t2 ## __ ## t ## _tests[]
net/core/netdev-genl.c
47
#define XDP_METADATA_KFUNC(_, flag, __, xmo) \
net/core/xdp.c
967
#define XDP_METADATA_KFUNC(_, __, name, ___) BTF_ID_FLAGS(func, name)
net/core/xdp.c
978
#define XDP_METADATA_KFUNC(name, _, str, __) BTF_ID(func, str)
tools/include/linux/bitfield.h
146
static __always_inline __##type type##_encode_bits(base v, base field) \
tools/include/linux/bitfield.h
152
static __always_inline __##type type##_replace_bits(__##type old, \
tools/include/linux/bitfield.h
157
static __always_inline void type##p_replace_bits(__##type *p, \
tools/include/linux/bitfield.h
162
static __always_inline base type##_get_bits(__##type v, base field) \
tools/include/linux/btf_ids.h
59
__BTF_ID(__ID(__BTF_ID__##prefix##__##name##__))
tools/sched_ext/include/scx/enums.h
22
__ENUM_set(&skel->rodata->__##name, #type, #name); \
tools/testing/selftests/bpf/prog_tests/uprobe_multi_test.c
873
void *__ ## func __used __attribute__((section("consumers"))) = (void *) func;
tools/testing/selftests/bpf/usdt.h
324
#define __usdt_sema_name(group, name) __usdt_sema_##group##__##name
tools/testing/selftests/proc/proc-empty-vm.c
157
static void sigaction_SIGSEGV(int _, siginfo_t *__, void *___)
tools/testing/selftests/proc/proc-empty-vm.c
163
static void sigaction_SIGSEGV_vsyscall(int _, siginfo_t *__, void *___)
tools/testing/selftests/proc/proc-pid-vm.c
234
static void sigaction_SIGSEGV(int _, siginfo_t *__, void *___)
tools/testing/selftests/x86/nx_stack.c
112
static void sigsegv(int _, siginfo_t *__, void *uc_)
tools/testing/selftests/x86/nx_stack.c
153
static void sigtrap(int _, siginfo_t *__, void *uc_)
