drivers/gpu/drm/i915/display/vlv_dpio_phy_regs.h

156

#define VLV_TX_DW2(ch, lane) _VLV_TX((ch), (lane), 2)

drivers/gpu/drm/i915/display/vlv_dpio_phy_regs.h

163

#define VLV_TX_DW3(ch, lane) _VLV_TX((ch), (lane), 3)

drivers/gpu/drm/i915/display/vlv_dpio_phy_regs.h

170

#define VLV_TX_DW4(ch, lane) _VLV_TX((ch), (lane), 4)

drivers/gpu/drm/i915/display/vlv_dpio_phy_regs.h

177

#define VLV_TX_DW5(ch, lane) _VLV_TX((ch), (lane), 5)

drivers/gpu/drm/i915/display/vlv_dpio_phy_regs.h

181

#define VLV_TX_DW11(ch, lane) _VLV_TX((ch), (lane), 11)

drivers/gpu/drm/i915/display/vlv_dpio_phy_regs.h

184

#define VLV_TX_DW14(ch, lane) _VLV_TX((ch), (lane), 14)

drivers/gpu/drm/i915/display/vlv_dpio_phy_regs.h

290

#define CHV_TX_DW0(ch, lane) _VLV_TX((ch), (lane), 0)

drivers/gpu/drm/i915/display/vlv_dpio_phy_regs.h

291

#define CHV_TX_DW1(ch, lane) _VLV_TX((ch), (lane), 1)

drivers/gpu/drm/i915/display/vlv_dpio_phy_regs.h

292

#define CHV_TX_DW2(ch, lane) _VLV_TX((ch), (lane), 2)

drivers/gpu/drm/i915/display/vlv_dpio_phy_regs.h

293

#define CHV_TX_DW3(ch, lane) _VLV_TX((ch), (lane), 3)

drivers/gpu/drm/i915/display/vlv_dpio_phy_regs.h

294

#define CHV_TX_DW4(ch, lane) _VLV_TX((ch), (lane), 4)

drivers/gpu/drm/i915/display/vlv_dpio_phy_regs.h

295

#define CHV_TX_DW5(ch, lane) _VLV_TX((ch), (lane), 5)

drivers/gpu/drm/i915/display/vlv_dpio_phy_regs.h

296

#define CHV_TX_DW6(ch, lane) _VLV_TX((ch), (lane), 6)

drivers/gpu/drm/i915/display/vlv_dpio_phy_regs.h

297

#define CHV_TX_DW7(ch, lane) _VLV_TX((ch), (lane), 7)

drivers/gpu/drm/i915/display/vlv_dpio_phy_regs.h

298

#define CHV_TX_DW8(ch, lane) _VLV_TX((ch), (lane), 8)

drivers/gpu/drm/i915/display/vlv_dpio_phy_regs.h

299

#define CHV_TX_DW9(ch, lane) _VLV_TX((ch), (lane), 9)

drivers/gpu/drm/i915/display/vlv_dpio_phy_regs.h

300

#define CHV_TX_DW10(ch, lane) _VLV_TX((ch), (lane), 10)

drivers/gpu/drm/i915/display/vlv_dpio_phy_regs.h

302

#define CHV_TX_DW11(ch, lane) _VLV_TX((ch), (lane), 11)

drivers/gpu/drm/i915/display/vlv_dpio_phy_regs.h

306

#define CHV_TX_DW14(ch, lane) _VLV_TX((ch), (lane), 14)