drivers/gpu/drm/vc4/vc4_hdmi_regs.h

173

#define VC4_HD_REG(reg, offset) _VC4_REG(VC4_HD, reg, offset)

drivers/gpu/drm/vc4/vc4_hdmi_regs.h

174

#define VC4_HDMI_REG(reg, offset) _VC4_REG(VC4_HDMI, reg, offset)

drivers/gpu/drm/vc4/vc4_hdmi_regs.h

175

#define VC5_CEC_REG(reg, offset) _VC4_REG(VC5_CEC, reg, offset)

drivers/gpu/drm/vc4/vc4_hdmi_regs.h

176

#define VC5_CSC_REG(reg, offset) _VC4_REG(VC5_CSC, reg, offset)

drivers/gpu/drm/vc4/vc4_hdmi_regs.h

177

#define VC5_DVP_REG(reg, offset) _VC4_REG(VC5_DVP, reg, offset)

drivers/gpu/drm/vc4/vc4_hdmi_regs.h

178

#define VC5_PHY_REG(reg, offset) _VC4_REG(VC5_PHY, reg, offset)

drivers/gpu/drm/vc4/vc4_hdmi_regs.h

179

#define VC5_RAM_REG(reg, offset) _VC4_REG(VC5_RAM, reg, offset)

drivers/gpu/drm/vc4/vc4_hdmi_regs.h

180

#define VC5_RM_REG(reg, offset) _VC4_REG(VC5_RM, reg, offset)