arch/loongarch/include/asm/addrspace.h

53

#define TO_PHYS_MASK ((_ULL(1) << _ULL(DMW_PABITS)) - 1)

arch/loongarch/include/asm/addrspace.h

91

#define _CONST64_(x) _ULL(x)

arch/riscv/include/asm/csr.h

235

#define SMSTATEEN0_AIA_IMSIC (_ULL(1) << SMSTATEEN0_AIA_IMSIC_SHIFT)

arch/riscv/include/asm/csr.h

237

#define SMSTATEEN0_AIA (_ULL(1) << SMSTATEEN0_AIA_SHIFT)

arch/riscv/include/asm/csr.h

239

#define SMSTATEEN0_AIA_ISEL (_ULL(1) << SMSTATEEN0_AIA_ISEL_SHIFT)

arch/riscv/include/asm/csr.h

241

#define SMSTATEEN0_HSENVCFG (_ULL(1) << SMSTATEEN0_HSENVCFG_SHIFT)

arch/riscv/include/asm/csr.h

243

#define SMSTATEEN0_SSTATEEN0 (_ULL(1) << SMSTATEEN0_SSTATEEN0_SHIFT)

arch/x86/include/asm/pgtable_32.h

72

#define LOWMEM_PAGES ((((_ULL(2)<<31) - __PAGE_OFFSET) >> PAGE_SHIFT))

drivers/pci/controller/cadence/pcie-cadence-host-common.c

21

[RP_BAR0] = _ULL(128 * SZ_2G),

include/uapi/linux/bits.h

9

#define __GENMASK_ULL(h, l) (((~_ULL(0)) << (l)) & (~_ULL(0) >> (__BITS_PER_LONG_LONG - 1 - (h))))

include/uapi/linux/const.h

29

#define _BITULL(x) (_ULL(1) << (x))

include/vdso/const.h

8

#define ULL(x) (_ULL(x))

tools/arch/riscv/include/asm/csr.h

208

#define SMSTATEEN0_AIA_IMSIC (_ULL(1) << SMSTATEEN0_AIA_IMSIC_SHIFT)

tools/arch/riscv/include/asm/csr.h

210

#define SMSTATEEN0_AIA (_ULL(1) << SMSTATEEN0_AIA_SHIFT)

tools/arch/riscv/include/asm/csr.h

212

#define SMSTATEEN0_AIA_ISEL (_ULL(1) << SMSTATEEN0_AIA_ISEL_SHIFT)

tools/arch/riscv/include/asm/csr.h

214

#define SMSTATEEN0_HSENVCFG (_ULL(1) << SMSTATEEN0_HSENVCFG_SHIFT)

tools/arch/riscv/include/asm/csr.h

216

#define SMSTATEEN0_SSTATEEN0 (_ULL(1) << SMSTATEEN0_SSTATEEN0_SHIFT)

tools/include/uapi/linux/bits.h

9

#define __GENMASK_ULL(h, l) (((~_ULL(0)) << (l)) & (~_ULL(0) >> (__BITS_PER_LONG_LONG - 1 - (h))))

tools/include/uapi/linux/const.h

29

#define _BITULL(x) (_ULL(1) << (x))

tools/include/vdso/const.h

8

#define ULL(x) (_ULL(x))