arch/arm/mach-dove/bridge-regs.h

11

#define CPU_CONTROL (BRIDGE_VIRT_BASE + 0x0104)

arch/arm/mach-dove/bridge-regs.h

16

#define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108)

arch/arm/mach-dove/bridge-regs.h

20

#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c)

arch/arm/mach-dove/bridge-regs.h

23

#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE + 0x0110)

arch/arm/mach-dove/bridge-regs.h

26

#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0200)

arch/arm/mach-dove/bridge-regs.h

45

#define POWER_MANAGEMENT (BRIDGE_VIRT_BASE + 0x011c)

arch/arm/mach-dove/bridge-regs.h

47

#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0300)

arch/arm/mach-dove/bridge-regs.h

9

#define CPU_CONFIG (BRIDGE_VIRT_BASE + 0x0000)

arch/arm/mach-dove/common.c

251

orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,

arch/arm/mach-mv78xx0/bridge-regs.h

11

#define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108)

arch/arm/mach-mv78xx0/bridge-regs.h

15

#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c)

arch/arm/mach-mv78xx0/bridge-regs.h

20

#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0200)

arch/arm/mach-mv78xx0/bridge-regs.h

28

#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0300)

arch/arm/mach-mv78xx0/bridge-regs.h

8

#define CPU_CONTROL (BRIDGE_VIRT_BASE + 0x0104)

arch/arm/mach-mv78xx0/common.c

341

orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,