_BITUL
#define PAGE_SIZE _BITUL(PAGE_SHIFT) /* Default 8K */
#define PTRACE_CFI_BRANCH_LANDING_PAD_EN_STATE _BITUL(PTRACE_CFI_BRANCH_LANDING_PAD_EN_BIT)
_BITUL(PTRACE_CFI_BRANCH_LANDING_PAD_LOCK_BIT)
_BITUL(PTRACE_CFI_BRANCH_EXPECTED_LANDING_PAD_BIT)
#define PTRACE_CFI_SHADOW_STACK_EN_STATE _BITUL(PTRACE_CFI_SHADOW_STACK_EN_BIT)
#define PTRACE_CFI_SHADOW_STACK_LOCK_STATE _BITUL(PTRACE_CFI_SHADOW_STACK_LOCK_BIT)
#define PTRACE_CFI_SHADOW_STACK_PTR_STATE _BITUL(PTRACE_CFI_SHADOW_STACK_PTR_BIT)
#define KFPU_387 _BITUL(0) /* 387 state will be initialized */
#define KFPU_MXCSR _BITUL(1) /* MXCSR will be initialized */
#define TDX_ERROR _BITUL(63)
#define TDX_NON_RECOVERABLE _BITUL(62)
#define HWCAP2_FSGSBASE _BITUL(1)
#define HWCAP2_RING3MWAIT _BITUL(0)
#define KVM_PMU_EVENT_FLAG_MASKED_EVENTS _BITUL(0)
#define X86_CR4_TSD _BITUL(X86_CR4_TSD_BIT)
#define X86_CR4_DE _BITUL(X86_CR4_DE_BIT)
#define X86_CR4_PSE _BITUL(X86_CR4_PSE_BIT)
#define X86_CR4_PAE _BITUL(X86_CR4_PAE_BIT)
#define X86_CR4_MCE _BITUL(X86_CR4_MCE_BIT)
#define X86_CR4_PGE _BITUL(X86_CR4_PGE_BIT)
#define X86_CR4_PCE _BITUL(X86_CR4_PCE_BIT)
#define X86_CR4_OSFXSR _BITUL(X86_CR4_OSFXSR_BIT)
#define X86_CR4_OSXMMEXCPT _BITUL(X86_CR4_OSXMMEXCPT_BIT)
#define X86_CR4_UMIP _BITUL(X86_CR4_UMIP_BIT)
#define X86_EFLAGS_CF _BITUL(X86_EFLAGS_CF_BIT)
#define X86_CR4_LA57 _BITUL(X86_CR4_LA57_BIT)
#define X86_CR4_VMXE _BITUL(X86_CR4_VMXE_BIT)
#define X86_CR4_SMXE _BITUL(X86_CR4_SMXE_BIT)
#define X86_CR4_FSGSBASE _BITUL(X86_CR4_FSGSBASE_BIT)
#define X86_CR4_PCIDE _BITUL(X86_CR4_PCIDE_BIT)
#define X86_CR4_OSXSAVE _BITUL(X86_CR4_OSXSAVE_BIT)
#define X86_CR4_SMEP _BITUL(X86_CR4_SMEP_BIT)
#define X86_CR4_SMAP _BITUL(X86_CR4_SMAP_BIT)
#define X86_CR4_PKE _BITUL(X86_CR4_PKE_BIT)
#define X86_CR4_CET _BITUL(X86_CR4_CET_BIT)
#define X86_EFLAGS_FIXED _BITUL(X86_EFLAGS_FIXED_BIT)
#define X86_CR4_LASS _BITUL(X86_CR4_LASS_BIT)
#define X86_CR4_LAM_SUP _BITUL(X86_CR4_LAM_SUP_BIT)
#define X86_CR4_FRED _BITUL(X86_CR4_FRED_BIT)
#define X86_EFLAGS_PF _BITUL(X86_EFLAGS_PF_BIT)
#define X86_EFLAGS_AF _BITUL(X86_EFLAGS_AF_BIT)
#define X86_EFLAGS_ZF _BITUL(X86_EFLAGS_ZF_BIT)
#define X86_EFLAGS_SF _BITUL(X86_EFLAGS_SF_BIT)
#define X86_EFLAGS_TF _BITUL(X86_EFLAGS_TF_BIT)
#define X86_EFLAGS_IF _BITUL(X86_EFLAGS_IF_BIT)
#define X86_EFLAGS_DF _BITUL(X86_EFLAGS_DF_BIT)
#define X86_EFLAGS_OF _BITUL(X86_EFLAGS_OF_BIT)
#define X86_EFLAGS_NT _BITUL(X86_EFLAGS_NT_BIT)
#define X86_EFLAGS_RF _BITUL(X86_EFLAGS_RF_BIT)
#define X86_EFLAGS_VM _BITUL(X86_EFLAGS_VM_BIT)
#define X86_EFLAGS_AC _BITUL(X86_EFLAGS_AC_BIT)
#define X86_EFLAGS_VIF _BITUL(X86_EFLAGS_VIF_BIT)
#define X86_EFLAGS_VIP _BITUL(X86_EFLAGS_VIP_BIT)
#define X86_EFLAGS_ID _BITUL(X86_EFLAGS_ID_BIT)
#define X86_CR0_PE _BITUL(X86_CR0_PE_BIT)
#define X86_CR0_MP _BITUL(X86_CR0_MP_BIT)
#define X86_CR0_EM _BITUL(X86_CR0_EM_BIT)
#define X86_CR0_TS _BITUL(X86_CR0_TS_BIT)
#define X86_CR0_ET _BITUL(X86_CR0_ET_BIT)
#define X86_CR0_NE _BITUL(X86_CR0_NE_BIT)
#define X86_CR0_WP _BITUL(X86_CR0_WP_BIT)
#define X86_CR0_AM _BITUL(X86_CR0_AM_BIT)
#define X86_CR0_NW _BITUL(X86_CR0_NW_BIT)
#define X86_CR0_CD _BITUL(X86_CR0_CD_BIT)
#define X86_CR0_PG _BITUL(X86_CR0_PG_BIT)
#define X86_CR3_PWT _BITUL(X86_CR3_PWT_BIT)
#define X86_CR3_PCD _BITUL(X86_CR3_PCD_BIT)
#define X86_CR4_VME _BITUL(X86_CR4_VME_BIT)
#define X86_CR4_PVI _BITUL(X86_CR4_PVI_BIT)
#define PAGE_SIZE_4KB _BITUL(PAGE_SHIFT_4KB)
#define PAGE_SIZE_64KB _BITUL(PAGE_SHIFT_64KB)
#define PAGE_SIZE_2MB _BITUL(PAGE_SHIFT_2MB)
#define PAGE_SIZE_16MB _BITUL(PAGE_SHIFT_16MB)
#define PAGE_SIZE_64MB _BITUL(PAGE_SHIFT_64MB)
#define PAGE_SIZE_1GB _BITUL(PAGE_SHIFT_1GB)
#define STM_FLAG_TIMESTAMPED _BITUL(3)
#define STM_FLAG_MARKED _BITUL(4)
#define STM_FLAG_GUARANTEED _BITUL(7)
#define DEVLINK_FLASH_OVERWRITE_SETTINGS _BITUL(DEVLINK_FLASH_OVERWRITE_SETTINGS_BIT)
#define DEVLINK_FLASH_OVERWRITE_IDENTIFIERS _BITUL(DEVLINK_FLASH_OVERWRITE_IDENTIFIERS_BIT)
(_BITUL(__DEVLINK_FLASH_OVERWRITE_MAX_BIT) - 1)
#define DEVLINK_RELOAD_LIMITS_VALID_MASK (_BITUL(__DEVLINK_RELOAD_LIMIT_MAX) - 1)
_BITUL(DEVLINK_RESOURCE_SCOPE_DEV_BIT)
_BITUL(DEVLINK_RESOURCE_SCOPE_PORT_BIT)
#define DEVLINK_PORT_FN_CAP_ROCE _BITUL(DEVLINK_PORT_FN_ATTR_CAP_ROCE_BIT)
_BITUL(DEVLINK_PORT_FN_ATTR_CAP_MIGRATABLE_BIT)
#define DEVLINK_PORT_FN_CAP_IPSEC_CRYPTO _BITUL(DEVLINK_PORT_FN_ATTR_CAP_IPSEC_CRYPTO_BIT)
#define DEVLINK_PORT_FN_CAP_IPSEC_PACKET _BITUL(DEVLINK_PORT_FN_ATTR_CAP_IPSEC_PACKET_BIT)
#define GSM_FL_RESTART _BITUL(0)
#define KVM_DIRTY_GFN_F_DIRTY _BITUL(0)
#define KVM_DIRTY_GFN_F_RESET _BITUL(1)
#define MPTCP_SUBFLOW_FLAG_MCAP_REM _BITUL(0)
#define MPTCP_SUBFLOW_FLAG_MCAP_LOC _BITUL(1)
#define MPTCP_SUBFLOW_FLAG_JOIN_REM _BITUL(2)
#define MPTCP_SUBFLOW_FLAG_JOIN_LOC _BITUL(3)
#define MPTCP_SUBFLOW_FLAG_BKUP_REM _BITUL(4)
#define MPTCP_SUBFLOW_FLAG_BKUP_LOC _BITUL(5)
#define MPTCP_SUBFLOW_FLAG_FULLY_ESTABLISHED _BITUL(6)
#define MPTCP_SUBFLOW_FLAG_CONNECTED _BITUL(7)
#define MPTCP_SUBFLOW_FLAG_MAPVALID _BITUL(8)
#define MPTCP_INFO_FLAG_FALLBACK _BITUL(0)
#define MPTCP_INFO_FLAG_REMOTE_KEY_RECEIVED _BITUL(1)
#define MPTCP_PM_EV_FLAG_DENY_JOIN_ID0 _BITUL(0)
#define MPTCP_PM_EV_FLAG_SERVER_SIDE _BITUL(1)
#define MPTCP_PM_ADDR_FLAG_SIGNAL _BITUL(0)
#define MPTCP_PM_ADDR_FLAG_SUBFLOW _BITUL(1)
#define MPTCP_PM_ADDR_FLAG_BACKUP _BITUL(2)
#define MPTCP_PM_ADDR_FLAG_FULLMESH _BITUL(3)
#define MPTCP_PM_ADDR_FLAG_IMPLICIT _BITUL(4)
#define MPTCP_PM_ADDR_FLAG_LAMINAR _BITUL(5)
#define PCI_DVSEC_CXL_CACHE_CAPABLE _BITUL(0)
#define PCI_DVSEC_CXL_MEM_CAPABLE _BITUL(2)
#define PCI_DVSEC_CXL_MEM_ENABLE _BITUL(2)
#define PCI_DVSEC_CXL_MEM_INFO_VALID _BITUL(0)
#define PCI_DVSEC_CXL_MEM_ACTIVE _BITUL(1)
#define PCI_DVSEC_CXL_FLEXBUS_PORT_STATUS_CACHE _BITUL(0)
#define PCI_DVSEC_CXL_FLEXBUS_PORT_STATUS_MEM _BITUL(2)
#define TCA_TAPRIO_ATTR_FLAG_TXTIME_ASSIST _BITUL(0)
#define TCA_TAPRIO_ATTR_FLAG_FULL_OFFLOAD _BITUL(1)
#define TC_ETF_DEADLINE_MODE_ON _BITUL(0)
#define TC_ETF_OFFLOAD_ON _BITUL(1)
#define TC_ETF_SKIP_SOCK_CHECK _BITUL(2)
# define PR_CFI_ENABLE _BITUL(0)
# define PR_CFI_DISABLE _BITUL(1)
# define PR_CFI_LOCK _BITUL(2)
#define RTC_VL_DATA_INVALID _BITUL(0) /* Voltage too low, RTC data is invalid */
#define RTC_VL_BACKUP_LOW _BITUL(1) /* Backup voltage is low */
#define RTC_VL_BACKUP_EMPTY _BITUL(2) /* Backup empty or not present */
#define RTC_VL_ACCURACY_LOW _BITUL(3) /* Voltage is low, RTC accuracy is reduced */
#define RTC_VL_BACKUP_SWITCH _BITUL(4) /* Backup switchover happened */
#define SER_RS485_ENABLED _BITUL(0)
#define SER_RS485_RTS_ON_SEND _BITUL(1)
#define SER_RS485_RTS_AFTER_SEND _BITUL(2)
#define SER_RS485_RX_DURING_TX _BITUL(4)
#define SER_RS485_TERMINATE_BUS _BITUL(5)
#define SER_RS485_ADDRB _BITUL(6)
#define SER_RS485_ADDR_RECV _BITUL(7)
#define SER_RS485_ADDR_DEST _BITUL(8)
#define SER_RS485_MODE_RS422 _BITUL(9)
#define SERIO_TIMEOUT _BITUL(0)
#define SERIO_PARITY _BITUL(1)
#define SERIO_FRAME _BITUL(2)
#define SERIO_OOB_DATA _BITUL(3)
#define SPI_CS_HIGH _BITUL(2) /* chipselect active high? */
#define SPI_LSB_FIRST _BITUL(3) /* per-word bits-on-wire */
#define SPI_3WIRE _BITUL(4) /* SI/SO signals shared */
#define SPI_LOOP _BITUL(5) /* loopback mode */
#define SPI_NO_CS _BITUL(6) /* 1 dev/bus, no chipselect */
#define SPI_READY _BITUL(7) /* slave pulls low to pause */
#define SPI_TX_DUAL _BITUL(8) /* transmit with 2 wires */
#define SPI_TX_QUAD _BITUL(9) /* transmit with 4 wires */
#define SPI_RX_DUAL _BITUL(10) /* receive with 2 wires */
#define SPI_RX_QUAD _BITUL(11) /* receive with 4 wires */
#define SPI_CS_WORD _BITUL(12) /* toggle cs after each word */
#define SPI_TX_OCTAL _BITUL(13) /* transmit with 8 wires */
#define SPI_RX_OCTAL _BITUL(14) /* receive with 8 wires */
#define SPI_3WIRE_HIZ _BITUL(15) /* high impedance turnaround */
#define SPI_RX_CPHA_FLIP _BITUL(16) /* flip CPHA on Rx only xfer */
#define SPI_MOSI_IDLE_LOW _BITUL(17) /* leave MOSI line low when idle */
#define SPI_MOSI_IDLE_HIGH _BITUL(18) /* leave MOSI line high when idle */
#define SPI_MODE_USER_MASK (_BITUL(19) - 1)
#define SPI_CPHA _BITUL(0) /* clock phase */
#define SPI_CPOL _BITUL(1) /* clock polarity */
#define DFU_FUNC_ATT_CAN_DOWNLOAD _BITUL(0)
#define DFU_FUNC_ATT_CAN_UPLOAD _BITUL(1)
#define DFU_FUNC_ATT_MANIFEST_TOLERANT _BITUL(2)
#define DFU_FUNC_ATT_WILL_DETACH _BITUL(3)
#define V4L2_FWHT_FL_IS_INTERLACED _BITUL(0)
#define V4L2_FWHT_FL_IS_BOTTOM_FIRST _BITUL(1)
#define V4L2_FWHT_FL_IS_ALTERNATE _BITUL(2)
#define V4L2_FWHT_FL_IS_BOTTOM_FIELD _BITUL(3)
#define V4L2_FWHT_FL_LUMA_IS_UNCOMPRESSED _BITUL(4)
#define V4L2_FWHT_FL_CB_IS_UNCOMPRESSED _BITUL(5)
#define V4L2_FWHT_FL_CR_IS_UNCOMPRESSED _BITUL(6)
#define V4L2_FWHT_FL_CHROMA_FULL_HEIGHT _BITUL(7)
#define V4L2_FWHT_FL_CHROMA_FULL_WIDTH _BITUL(8)
#define V4L2_FWHT_FL_ALPHA_IS_UNCOMPRESSED _BITUL(9)
#define V4L2_FWHT_FL_I_FRAME _BITUL(10)
#define VIRTIO_I2C_FLAGS_FAIL_NEXT _BITUL(0)
#define VIRTIO_I2C_FLAGS_M_RD _BITUL(1)
#define VIRTIO_SPI_CPHA _BITUL(0)
#define VIRTIO_SPI_CPOL _BITUL(1)
#define VIRTIO_SPI_CS_HIGH _BITUL(2)
#define VIRTIO_SPI_MODE_LSB_FIRST _BITUL(3)
#define VIRTIO_SPI_MODE_LOOP _BITUL(4)
#define VIRTIO_SPI_RX_TX_SUPPORT_DUAL _BITUL(0)
#define VIRTIO_SPI_RX_TX_SUPPORT_QUAD _BITUL(1)
#define VIRTIO_SPI_RX_TX_SUPPORT_OCTAL _BITUL(2)
#define VIRTIO_SPI_MF_SUPPORT_CPHA_0 _BITUL(0)
#define VIRTIO_SPI_MF_SUPPORT_CPHA_1 _BITUL(1)
#define VIRTIO_SPI_MF_SUPPORT_CPOL_0 _BITUL(2)
#define VIRTIO_SPI_MF_SUPPORT_CPOL_1 _BITUL(3)
#define VIRTIO_SPI_MF_SUPPORT_CS_HIGH _BITUL(4)
#define VIRTIO_SPI_MF_SUPPORT_LSB_FIRST _BITUL(5)
#define VIRTIO_SPI_MF_SUPPORT_LOOPBACK _BITUL(6)
#define PVPANIC_SHUTDOWN _BITUL(2)
#define PVPANIC_PANICKED _BITUL(0)
#define PVPANIC_CRASH_LOADED _BITUL(1)
(_BITUL(__DEVLINK_PORT_FN_ATTR_CAPS_MAX) - 1)
#define KVM_PMU_EVENT_FLAG_MASKED_EVENTS _BITUL(0)
#define KVM_DIRTY_GFN_F_DIRTY _BITUL(0)
#define KVM_DIRTY_GFN_F_RESET _BITUL(1)
# define PR_CFI_ENABLE _BITUL(0)
# define PR_CFI_DISABLE _BITUL(1)
# define PR_CFI_LOCK _BITUL(2)
#define MPTCP_INFO_FLAG_FALLBACK _BITUL(0)
#define MPTCP_INFO_FLAG_REMOTE_KEY_RECEIVED _BITUL(1)
#define SUPPORTED _BITUL(0)
#define UNSUPPORTED_RACY_VERD _BITUL(1)
#define MPTCP_SUBFLOW_FLAG_MCAP_REM _BITUL(0)
#define MPTCP_SUBFLOW_FLAG_MCAP_LOC _BITUL(1)
#define MPTCP_SUBFLOW_FLAG_JOIN_REM _BITUL(2)
#define MPTCP_SUBFLOW_FLAG_JOIN_LOC _BITUL(3)
#define MPTCP_SUBFLOW_FLAG_BKUP_REM _BITUL(4)
#define MPTCP_SUBFLOW_FLAG_BKUP_LOC _BITUL(5)
#define MPTCP_SUBFLOW_FLAG_FULLY_ESTABLISHED _BITUL(6)
#define MPTCP_SUBFLOW_FLAG_CONNECTED _BITUL(7)
#define MPTCP_SUBFLOW_FLAG_MAPVALID _BITUL(8)
#define MPTCP_PM_ADDR_FLAG_UNKNOWN _BITUL(7)
#define VECTOR_1_0 _BITUL(0)
#define XTHEAD_VECTOR_0_7 _BITUL(1)
if ((param.uvalue & _BITUL(RTC_FEATURE_ALARM)) == 0)
if (need_seconds && (param.uvalue & _BITUL(RTC_FEATURE_ALARM_RES_MINUTE)))