drivers/gpu/drm/i915/display/intel_display_reg_defs.h

26

#define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b))

drivers/gpu/drm/i915/display/intel_display_regs.h

2381

#define DDI_BUF_TRANS_LO(port, i) _MMIO(_PORT(port, _DDI_BUF_TRANS_A, _DDI_BUF_TRANS_B) + (i) * 8)

drivers/gpu/drm/i915/display/intel_display_regs.h

2383

#define DDI_BUF_TRANS_HI(port, i) _MMIO(_PORT(port, _DDI_BUF_TRANS_A, _DDI_BUF_TRANS_B) + (i) * 8 + 4)

drivers/gpu/drm/i915/display/intel_dkl_phy_regs.h

31

#define _DKL_REG_PHY_BASE(tc_port) _PORT(tc_port, \

drivers/gpu/drm/i915/display/intel_dp_aux_regs.h

29

_PORT(aux_ch, _DPA_AUX_CH_CTL, _DPB_AUX_CH_CTL))

drivers/gpu/drm/i915/display/intel_dp_aux_regs.h

80

#define DP_AUX_CH_DATA(aux_ch, i) _MMIO(_PORT(aux_ch, _DPA_AUX_CH_DATA1, \

drivers/gpu/drm/i915/display/intel_dp_aux_regs.h

82

#define VLV_DP_AUX_CH_DATA(aux_ch, i) _MMIO(VLV_DISPLAY_BASE + _PORT(aux_ch, _DPA_AUX_CH_DATA1, \

drivers/gpu/drm/i915/display/intel_dp_aux_regs.h

87

#define PCH_DP_AUX_CH_DATA(aux_ch, i) _MMIO(_PORT((aux_ch) - AUX_CH_B, _PCH_DPB_AUX_CH_DATA1, _PCH_DPC_AUX_CH_DATA1) + (i) * 4) /* 5 registers */

drivers/gpu/drm/i915/display/intel_mg_phy_regs.h

12

_MMIO(_PORT(tc_port, ln0p1, ln0p2) + (ln) * ((ln1p1) - (ln0p1)))

drivers/pinctrl/renesas/pfc-r8a7740.c

33

IRQ##irq##_PORT##pin##_MARK, \

include/media/ipu-bridge.h

33

#define NODE_PORT(_PORT, _SENSOR_NODE) \

include/media/ipu-bridge.h

35

.name = _PORT, \

include/media/ipu-bridge.h

39

#define NODE_ENDPOINT(_EP, _PORT, _PROPS) \

include/media/ipu-bridge.h

42

.parent = _PORT, \