Symbol: _MMIO_VLV_SPR
drivers/gpu/drm/i915/display/intel_sprite_regs.h
237
#define SPCNTR(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPACNTR, _SPBCNTR)
drivers/gpu/drm/i915/display/intel_sprite_regs.h
266
#define SPLINOFF(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPALINOFF, _SPBLINOFF)
drivers/gpu/drm/i915/display/intel_sprite_regs.h
270
#define SPSTRIDE(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPASTRIDE, _SPBSTRIDE)
drivers/gpu/drm/i915/display/intel_sprite_regs.h
274
#define SPPOS(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPAPOS, _SPBPOS)
drivers/gpu/drm/i915/display/intel_sprite_regs.h
282
#define SPSIZE(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPASIZE, _SPBSIZE)
drivers/gpu/drm/i915/display/intel_sprite_regs.h
290
#define SPKEYMINVAL(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPAKEYMINVAL, _SPBKEYMINVAL)
drivers/gpu/drm/i915/display/intel_sprite_regs.h
294
#define SPKEYMSK(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPAKEYMSK, _SPBKEYMSK)
drivers/gpu/drm/i915/display/intel_sprite_regs.h
298
#define SPSURF(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPASURF, _SPBSURF)
drivers/gpu/drm/i915/display/intel_sprite_regs.h
303
#define SPKEYMAXVAL(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPAKEYMAXVAL, _SPBKEYMAXVAL)
drivers/gpu/drm/i915/display/intel_sprite_regs.h
307
#define SPTILEOFF(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPATILEOFF, _SPBTILEOFF)
drivers/gpu/drm/i915/display/intel_sprite_regs.h
315
#define SPCONSTALPHA(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPACONSTALPHA, _SPBCONSTALPHA)
drivers/gpu/drm/i915/display/intel_sprite_regs.h
322
#define SPSURFLIVE(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPASURFLIVE, _SPBSURFLIVE)
drivers/gpu/drm/i915/display/intel_sprite_regs.h
326
#define SPCLRC0(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPACLRC0, _SPBCLRC0)
drivers/gpu/drm/i915/display/intel_sprite_regs.h
334
#define SPCLRC1(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPACLRC1, _SPBCLRC1)