Symbol: _MMIO_BASE_PIPE3
drivers/gpu/drm/i915/display/i9xx_wm_regs.h
220
#define WM0_PIPE_ILK(pipe) _MMIO_BASE_PIPE3(0, (pipe), _WM0_PIPEA_ILK, \
drivers/gpu/drm/i915/display/intel_display_regs.h
123
#define DPLL(dev_priv, pipe) _MMIO_BASE_PIPE3(DISPLAY_MMIO_BASE(dev_priv), \
drivers/gpu/drm/i915/display/intel_display_regs.h
1922
#define VLV_TVIDEO_DIP_CTL(pipe) _MMIO_BASE_PIPE3(VLV_DISPLAY_BASE, (pipe), \
drivers/gpu/drm/i915/display/intel_display_regs.h
1930
#define VLV_TVIDEO_DIP_DATA(pipe) _MMIO_BASE_PIPE3(VLV_DISPLAY_BASE, (pipe), \
drivers/gpu/drm/i915/display/intel_display_regs.h
1938
#define VLV_TVIDEO_DIP_GCP(pipe) _MMIO_BASE_PIPE3(VLV_DISPLAY_BASE, (pipe), \
drivers/gpu/drm/i915/display/intel_display_regs.h
223
#define DPLL_MD(dev_priv, pipe) _MMIO_BASE_PIPE3(DISPLAY_MMIO_BASE(dev_priv), \