Symbol: _BCM1480_INT_MASK1
arch/mips/include/asm/sibyte/bcm1480_int.h
151
#define M_BCM1480_INT_CASCADE _BCM1480_INT_MASK1(_BCM1480_INT_HIGH(0))
arch/mips/include/asm/sibyte/bcm1480_int.h
153
#define M_BCM1480_INT_ADDR_TRAP _BCM1480_INT_MASK1(K_BCM1480_INT_ADDR_TRAP)
arch/mips/include/asm/sibyte/bcm1480_int.h
154
#define M_BCM1480_INT_GPIO_0 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_0)
arch/mips/include/asm/sibyte/bcm1480_int.h
155
#define M_BCM1480_INT_GPIO_1 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_1)
arch/mips/include/asm/sibyte/bcm1480_int.h
156
#define M_BCM1480_INT_GPIO_2 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_2)
arch/mips/include/asm/sibyte/bcm1480_int.h
157
#define M_BCM1480_INT_GPIO_3 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_3)
arch/mips/include/asm/sibyte/bcm1480_int.h
158
#define M_BCM1480_INT_PCI_INTA _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_INTA)
arch/mips/include/asm/sibyte/bcm1480_int.h
159
#define M_BCM1480_INT_PCI_INTB _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_INTB)
arch/mips/include/asm/sibyte/bcm1480_int.h
160
#define M_BCM1480_INT_PCI_INTC _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_INTC)
arch/mips/include/asm/sibyte/bcm1480_int.h
161
#define M_BCM1480_INT_PCI_INTD _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_INTD)
arch/mips/include/asm/sibyte/bcm1480_int.h
162
#define M_BCM1480_INT_CYCLE_CP0 _BCM1480_INT_MASK1(K_BCM1480_INT_CYCLE_CP0)
arch/mips/include/asm/sibyte/bcm1480_int.h
163
#define M_BCM1480_INT_CYCLE_CP1 _BCM1480_INT_MASK1(K_BCM1480_INT_CYCLE_CP1)
arch/mips/include/asm/sibyte/bcm1480_int.h
164
#define M_BCM1480_INT_CYCLE_CP2 _BCM1480_INT_MASK1(K_BCM1480_INT_CYCLE_CP2)
arch/mips/include/asm/sibyte/bcm1480_int.h
165
#define M_BCM1480_INT_CYCLE_CP3 _BCM1480_INT_MASK1(K_BCM1480_INT_CYCLE_CP3)
arch/mips/include/asm/sibyte/bcm1480_int.h
166
#define M_BCM1480_INT_TIMER_0 _BCM1480_INT_MASK1(K_BCM1480_INT_TIMER_0)
arch/mips/include/asm/sibyte/bcm1480_int.h
167
#define M_BCM1480_INT_TIMER_1 _BCM1480_INT_MASK1(K_BCM1480_INT_TIMER_1)
arch/mips/include/asm/sibyte/bcm1480_int.h
168
#define M_BCM1480_INT_TIMER_2 _BCM1480_INT_MASK1(K_BCM1480_INT_TIMER_2)
arch/mips/include/asm/sibyte/bcm1480_int.h
169
#define M_BCM1480_INT_TIMER_3 _BCM1480_INT_MASK1(K_BCM1480_INT_TIMER_3)
arch/mips/include/asm/sibyte/bcm1480_int.h
170
#define M_BCM1480_INT_DM_CH_0 _BCM1480_INT_MASK1(K_BCM1480_INT_DM_CH_0)
arch/mips/include/asm/sibyte/bcm1480_int.h
171
#define M_BCM1480_INT_DM_CH_1 _BCM1480_INT_MASK1(K_BCM1480_INT_DM_CH_1)
arch/mips/include/asm/sibyte/bcm1480_int.h
172
#define M_BCM1480_INT_DM_CH_2 _BCM1480_INT_MASK1(K_BCM1480_INT_DM_CH_2)
arch/mips/include/asm/sibyte/bcm1480_int.h
173
#define M_BCM1480_INT_DM_CH_3 _BCM1480_INT_MASK1(K_BCM1480_INT_DM_CH_3)
arch/mips/include/asm/sibyte/bcm1480_int.h
174
#define M_BCM1480_INT_MAC_0 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_0)
arch/mips/include/asm/sibyte/bcm1480_int.h
175
#define M_BCM1480_INT_MAC_0_CH1 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_0_CH1)
arch/mips/include/asm/sibyte/bcm1480_int.h
176
#define M_BCM1480_INT_MAC_1 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_1)
arch/mips/include/asm/sibyte/bcm1480_int.h
177
#define M_BCM1480_INT_MAC_1_CH1 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_1_CH1)
arch/mips/include/asm/sibyte/bcm1480_int.h
178
#define M_BCM1480_INT_MAC_2 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_2)
arch/mips/include/asm/sibyte/bcm1480_int.h
179
#define M_BCM1480_INT_MAC_2_CH1 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_2_CH1)
arch/mips/include/asm/sibyte/bcm1480_int.h
180
#define M_BCM1480_INT_MAC_3 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_3)
arch/mips/include/asm/sibyte/bcm1480_int.h
181
#define M_BCM1480_INT_MAC_3_CH1 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_3_CH1)
arch/mips/include/asm/sibyte/bcm1480_int.h
182
#define M_BCM1480_INT_PMI_LOW _BCM1480_INT_MASK1(K_BCM1480_INT_PMI_LOW)
arch/mips/include/asm/sibyte/bcm1480_int.h
183
#define M_BCM1480_INT_PMI_HIGH _BCM1480_INT_MASK1(K_BCM1480_INT_PMI_HIGH)
arch/mips/include/asm/sibyte/bcm1480_int.h
184
#define M_BCM1480_INT_PMO_LOW _BCM1480_INT_MASK1(K_BCM1480_INT_PMO_LOW)
arch/mips/include/asm/sibyte/bcm1480_int.h
185
#define M_BCM1480_INT_PMO_HIGH _BCM1480_INT_MASK1(K_BCM1480_INT_PMO_HIGH)
arch/mips/include/asm/sibyte/bcm1480_int.h
187
#define M_BCM1480_INT_MBOX_0_0 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_0)
arch/mips/include/asm/sibyte/bcm1480_int.h
188
#define M_BCM1480_INT_MBOX_0_1 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_1)
arch/mips/include/asm/sibyte/bcm1480_int.h
189
#define M_BCM1480_INT_MBOX_0_2 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_2)
arch/mips/include/asm/sibyte/bcm1480_int.h
190
#define M_BCM1480_INT_MBOX_0_3 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_3)
arch/mips/include/asm/sibyte/bcm1480_int.h
191
#define M_BCM1480_INT_MBOX_1_0 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_1_0)
arch/mips/include/asm/sibyte/bcm1480_int.h
192
#define M_BCM1480_INT_MBOX_1_1 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_1_1)
arch/mips/include/asm/sibyte/bcm1480_int.h
193
#define M_BCM1480_INT_MBOX_1_2 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_1_2)
arch/mips/include/asm/sibyte/bcm1480_int.h
194
#define M_BCM1480_INT_MBOX_1_3 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_1_3)
arch/mips/include/asm/sibyte/bcm1480_int.h
195
#define M_BCM1480_INT_BAD_ECC _BCM1480_INT_MASK1(K_BCM1480_INT_BAD_ECC)
arch/mips/include/asm/sibyte/bcm1480_int.h
196
#define M_BCM1480_INT_COR_ECC _BCM1480_INT_MASK1(K_BCM1480_INT_COR_ECC)
arch/mips/include/asm/sibyte/bcm1480_int.h
197
#define M_BCM1480_INT_IO_BUS _BCM1480_INT_MASK1(K_BCM1480_INT_IO_BUS)
arch/mips/include/asm/sibyte/bcm1480_int.h
198
#define M_BCM1480_INT_PERF_CNT _BCM1480_INT_MASK1(K_BCM1480_INT_PERF_CNT)
arch/mips/include/asm/sibyte/bcm1480_int.h
199
#define M_BCM1480_INT_SW_PERF_CNT _BCM1480_INT_MASK1(K_BCM1480_INT_SW_PERF_CNT)
arch/mips/include/asm/sibyte/bcm1480_int.h
200
#define M_BCM1480_INT_TRACE_FREEZE _BCM1480_INT_MASK1(K_BCM1480_INT_TRACE_FREEZE)
arch/mips/include/asm/sibyte/bcm1480_int.h
201
#define M_BCM1480_INT_SW_TRACE_FREEZE _BCM1480_INT_MASK1(K_BCM1480_INT_SW_TRACE_FREEZE)
arch/mips/include/asm/sibyte/bcm1480_int.h
202
#define M_BCM1480_INT_WATCHDOG_TIMER_0 _BCM1480_INT_MASK1(K_BCM1480_INT_WATCHDOG_TIMER_0)
arch/mips/include/asm/sibyte/bcm1480_int.h
203
#define M_BCM1480_INT_WATCHDOG_TIMER_1 _BCM1480_INT_MASK1(K_BCM1480_INT_WATCHDOG_TIMER_1)
arch/mips/include/asm/sibyte/bcm1480_int.h
204
#define M_BCM1480_INT_WATCHDOG_TIMER_2 _BCM1480_INT_MASK1(K_BCM1480_INT_WATCHDOG_TIMER_2)
arch/mips/include/asm/sibyte/bcm1480_int.h
205
#define M_BCM1480_INT_WATCHDOG_TIMER_3 _BCM1480_INT_MASK1(K_BCM1480_INT_WATCHDOG_TIMER_3)
arch/mips/include/asm/sibyte/bcm1480_int.h
206
#define M_BCM1480_INT_PCI_ERROR _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_ERROR)
arch/mips/include/asm/sibyte/bcm1480_int.h
207
#define M_BCM1480_INT_PCI_RESET _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_RESET)
arch/mips/include/asm/sibyte/bcm1480_int.h
208
#define M_BCM1480_INT_NODE_CONTROLLER _BCM1480_INT_MASK1(K_BCM1480_INT_NODE_CONTROLLER)
arch/mips/include/asm/sibyte/bcm1480_int.h
209
#define M_BCM1480_INT_HOST_BRIDGE _BCM1480_INT_MASK1(K_BCM1480_INT_HOST_BRIDGE)
arch/mips/include/asm/sibyte/bcm1480_int.h
210
#define M_BCM1480_INT_PORT_0_FATAL _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_0_FATAL)
arch/mips/include/asm/sibyte/bcm1480_int.h
211
#define M_BCM1480_INT_PORT_0_NONFATAL _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_0_NONFATAL)
arch/mips/include/asm/sibyte/bcm1480_int.h
212
#define M_BCM1480_INT_PORT_1_FATAL _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_1_FATAL)
arch/mips/include/asm/sibyte/bcm1480_int.h
213
#define M_BCM1480_INT_PORT_1_NONFATAL _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_1_NONFATAL)
arch/mips/include/asm/sibyte/bcm1480_int.h
214
#define M_BCM1480_INT_PORT_2_FATAL _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_2_FATAL)
arch/mips/include/asm/sibyte/bcm1480_int.h
215
#define M_BCM1480_INT_PORT_2_NONFATAL _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_2_NONFATAL)
arch/mips/include/asm/sibyte/bcm1480_int.h
216
#define M_BCM1480_INT_LDT_SMI _BCM1480_INT_MASK1(K_BCM1480_INT_LDT_SMI)
arch/mips/include/asm/sibyte/bcm1480_int.h
217
#define M_BCM1480_INT_LDT_NMI _BCM1480_INT_MASK1(K_BCM1480_INT_LDT_NMI)
arch/mips/include/asm/sibyte/bcm1480_int.h
218
#define M_BCM1480_INT_LDT_INIT _BCM1480_INT_MASK1(K_BCM1480_INT_LDT_INIT)
arch/mips/include/asm/sibyte/bcm1480_int.h
219
#define M_BCM1480_INT_LDT_STARTUP _BCM1480_INT_MASK1(K_BCM1480_INT_LDT_STARTUP)
arch/mips/include/asm/sibyte/bcm1480_int.h
220
#define M_BCM1480_INT_LDT_EXT _BCM1480_INT_MASK1(K_BCM1480_INT_LDT_EXT)
arch/mips/include/asm/sibyte/bcm1480_int.h
221
#define M_BCM1480_INT_SMB_0 _BCM1480_INT_MASK1(K_BCM1480_INT_SMB_0)
arch/mips/include/asm/sibyte/bcm1480_int.h
222
#define M_BCM1480_INT_SMB_1 _BCM1480_INT_MASK1(K_BCM1480_INT_SMB_1)
arch/mips/include/asm/sibyte/bcm1480_int.h
223
#define M_BCM1480_INT_PCMCIA _BCM1480_INT_MASK1(K_BCM1480_INT_PCMCIA)
arch/mips/include/asm/sibyte/bcm1480_int.h
224
#define M_BCM1480_INT_UART_0 _BCM1480_INT_MASK1(K_BCM1480_INT_UART_0)
arch/mips/include/asm/sibyte/bcm1480_int.h
225
#define M_BCM1480_INT_UART_1 _BCM1480_INT_MASK1(K_BCM1480_INT_UART_1)
arch/mips/include/asm/sibyte/bcm1480_int.h
226
#define M_BCM1480_INT_UART_2 _BCM1480_INT_MASK1(K_BCM1480_INT_UART_2)
arch/mips/include/asm/sibyte/bcm1480_int.h
227
#define M_BCM1480_INT_UART_3 _BCM1480_INT_MASK1(K_BCM1480_INT_UART_3)
arch/mips/include/asm/sibyte/bcm1480_int.h
228
#define M_BCM1480_INT_GPIO_4 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_4)
arch/mips/include/asm/sibyte/bcm1480_int.h
229
#define M_BCM1480_INT_GPIO_5 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_5)
arch/mips/include/asm/sibyte/bcm1480_int.h
230
#define M_BCM1480_INT_GPIO_6 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_6)
arch/mips/include/asm/sibyte/bcm1480_int.h
231
#define M_BCM1480_INT_GPIO_7 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_7)
arch/mips/include/asm/sibyte/bcm1480_int.h
232
#define M_BCM1480_INT_GPIO_8 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_8)
arch/mips/include/asm/sibyte/bcm1480_int.h
233
#define M_BCM1480_INT_GPIO_9 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_9)
arch/mips/include/asm/sibyte/bcm1480_int.h
234
#define M_BCM1480_INT_GPIO_10 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_10)
arch/mips/include/asm/sibyte/bcm1480_int.h
235
#define M_BCM1480_INT_GPIO_11 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_11)
arch/mips/include/asm/sibyte/bcm1480_int.h
236
#define M_BCM1480_INT_GPIO_12 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_12)
arch/mips/include/asm/sibyte/bcm1480_int.h
237
#define M_BCM1480_INT_GPIO_13 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_13)
arch/mips/include/asm/sibyte/bcm1480_int.h
238
#define M_BCM1480_INT_GPIO_14 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_14)
arch/mips/include/asm/sibyte/bcm1480_int.h
239
#define M_BCM1480_INT_GPIO_15 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_15)