XR_FIFO_RESET
ret = xr_set_reg_um(port, XR21V141X_UM_TX_FIFO_RESET, XR_FIFO_RESET);
ret = xr_set_reg_um(port, XR21V141X_UM_RX_FIFO_RESET, XR_FIFO_RESET);
ret = xr_set_reg_uart(port, data->type->tx_fifo_reset, XR_FIFO_RESET);
ret = xr_set_reg_uart(port, data->type->rx_fifo_reset, XR_FIFO_RESET);