BP_VN
#define BP_L_ID(bp) (BP_VN(bp) << 2)
#define BP_FW_MB_IDX(bp) BP_FW_MB_IDX_VN(bp, BP_VN(bp))
BP_VN(bp))
(BP_VN(bp) << BNX2X_SWCID_SHIFT) | \
((bp)->mf_config[BP_VN(bp)] & FUNC_MF_CFG_PROTOCOL_MASK)
bp->mf_config[BP_VN(bp)]);
u32 mf_cfg = bp->mf_config[BP_VN(bp)];
if (vn == BP_VN(bp))
int vn = BP_VN(bp);
bp->mf_config[BP_VN(bp)] =
vn = BP_VN(bp);
val = (0xee0f | (1 << (BP_VN(bp) + 4)));
val = (0xee0f | (1 << (BP_VN(bp) + 4)));
if (bp->mf_config[BP_VN(bp)] & FUNC_MF_CFG_FUNC_DISABLED) {
bp->mf_config[BP_VN(bp)] = mf_config;
bp->mf_config[BP_VN(bp)] = mf_config;
bnx2x_calc_vn_max(bp, BP_VN(bp), &cmng_input);
cmng_input.vnic_max_rate[BP_VN(bp)];
val = (0xff0f | (1 << (BP_VN(bp) + 4)));
BP_FUNC(bp) : BP_VN(bp))*4, 0);
BP_FUNC(bp) : BP_VN(bp))*4, 0);
if (bp->mf_config[BP_VN(bp)] & FUNC_MF_CFG_FUNC_DISABLED) {
bp->mf_config[BP_VN(bp)] = MF_CFG_RD(bp,
opcode |= ((BP_VN(bp) << DMAE_CMD_E1HVN_SHIFT) |
(BP_VN(bp) << DMAE_COMMAND_DST_VN_SHIFT));
sb_data_e2.common.p_func.vnic_id = BP_VN(bp);
sb_data_e1x.common.p_func.vnic_id = BP_VN(bp);
sp_sb_data.p_func.vnic_id = BP_VN(bp);
dsb_idx = BP_VN(bp);
if (!CHIP_IS_E1x(bp) && BP_VN(bp) == 3) {
u8 entry = (BP_VN(bp) + 1)*8;
(BP_VN(bp) << 17) | (x))