arch/powerpc/xmon/ppc-opc.c
2620
#define XBF_MASK (X_MASK | (3 << 21))
arch/powerpc/xmon/ppc-opc.c
2673
#define XRA_MASK (X_MASK | RA_MASK)
arch/powerpc/xmon/ppc-opc.c
2681
#define XRB_MASK (X_MASK | RB_MASK)
arch/powerpc/xmon/ppc-opc.c
2684
#define XRT_MASK (X_MASK | RT_MASK)
arch/powerpc/xmon/ppc-opc.c
2690
#define XRARB_MASK (X_MASK | RA_MASK | RB_MASK)
arch/powerpc/xmon/ppc-opc.c
2702
#define XRTRA_MASK (X_MASK | RT_MASK | RA_MASK)
arch/powerpc/xmon/ppc-opc.c
2705
#define XRTRB_MASK (X_MASK | RT_MASK | RB_MASK)
arch/powerpc/xmon/ppc-opc.c
2711
#define XRTRARB_MASK (X_MASK | RT_MASK | RA_MASK | RB_MASK)
arch/powerpc/xmon/ppc-opc.c
2741
#define XCMP_MASK (X_MASK | (((unsigned long)1) << 22))
arch/powerpc/xmon/ppc-opc.c
2749
#define XTO_MASK (X_MASK | TO_MASK)
arch/powerpc/xmon/ppc-opc.c
2753
#define XTLB_MASK (X_MASK | SH_MASK)
arch/powerpc/xmon/ppc-opc.c
2765
#define XEH_MASK (X_MASK & ~((unsigned long )1))
arch/powerpc/xmon/ppc-opc.c
2843
#define XFXFXM_MASK (X_MASK | (1 << 11) | (1 << 20))
arch/powerpc/xmon/ppc-opc.c
2853
#define XSPR_MASK (X_MASK | SPR_MASK)
arch/powerpc/xmon/ppc-opc.c
3036
{"attn", X(0,256), X_MASK, POWER4|PPCA2, PPC476|PPCVLE, {0}},
arch/powerpc/xmon/ppc-opc.c
3100
{"mulhhwu", XRC(4, 8,0), X_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3101
{"mulhhwu.", XRC(4, 8,1), X_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3176
{"mulhhw", XRC(4, 40,0), X_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3178
{"mulhhw.", XRC(4, 40,1), X_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3219
{"mulchwu", XRC(4, 136,0), X_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3221
{"mulchwu.", XRC(4, 136,1), X_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3232
{"mulchw", XRC(4, 168,0), X_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3233
{"mulchw.", XRC(4, 168,1), X_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3446
{"mullhwu", XRC(4, 392,0), X_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3448
{"mullhwu.", XRC(4, 392,1), X_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3485
{"mullhw", XRC(4, 424,0), X_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3486
{"mullhw.", XRC(4, 424,1), X_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4399
{"dnh", X(19,198), X_MASK, E500MC, PPCVLE, {DUI, DUIS}},
arch/powerpc/xmon/ppc-opc.c
4691
{"tw", X(31,4), X_MASK, PPCCOM, 0, {TO, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4692
{"t", X(31,4), X_MASK, PWRCOM, 0, {TO, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4694
{"lvsl", X(31,6), X_MASK, PPCVEC, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4695
{"lvebx", X(31,7), X_MASK, PPCVEC, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4718
{"isellt", X(31,15), X_MASK, PPCISEL, 0, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4723
{"tlbilx", X(31,18), X_MASK, E500MC|PPCA2, 0, {T, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4730
{"ldx", X(31,21), X_MASK, PPC64, 0, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4732
{"icbt", X(31,22), X_MASK, BOOKE|PPCE300|PPCA2|PPC476, 0, {CT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4734
{"lwzx", X(31,23), X_MASK, PPCCOM, 0, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4735
{"lx", X(31,23), X_MASK, PWRCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4737
{"slw", XRC(31,24,0), X_MASK, PPCCOM, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
4738
{"sl", XRC(31,24,0), X_MASK, PWRCOM, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
4739
{"slw.", XRC(31,24,1), X_MASK, PPCCOM, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
4740
{"sl.", XRC(31,24,1), X_MASK, PWRCOM, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
4747
{"sld", XRC(31,27,0), X_MASK, PPC64, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
4748
{"sld.", XRC(31,27,1), X_MASK, PPC64, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
4750
{"and", XRC(31,28,0), X_MASK, COM, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
4751
{"and.", XRC(31,28,1), X_MASK, COM, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
4753
{"maskg", XRC(31,29,0), X_MASK, M601, PPCA2, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
4754
{"maskg.", XRC(31,29,1), X_MASK, M601, PPCA2, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
4756
{"ldepx", X(31,29), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4761
{"lwepx", X(31,31), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4768
{"lvsr", X(31,38), X_MASK, PPCVEC, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4769
{"lvehx", X(31,39), X_MASK, PPCVEC, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4772
{"mviwsplt", X(31,46), X_MASK, PPCVEC2, 0, {VD, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4774
{"iselgt", X(31,47), X_MASK, PPCISEL, 0, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4776
{"lvewx", X(31,71), X_MASK, PPCVEC, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4782
{"iseleq", X(31,79), X_MASK, PPCISEL, 0, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4794
{"eratilx", X(31,51), X_MASK, PPCA2, 0, {ERAT_T, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4798
{"ldux", X(31,53), X_MASK, PPC64, 0, {RT, RAL, RB}},
arch/powerpc/xmon/ppc-opc.c
4802
{"lwzux", X(31,55), X_MASK, PPCCOM, 0, {RT, RAL, RB}},
arch/powerpc/xmon/ppc-opc.c
4803
{"lux", X(31,55), X_MASK, PWRCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4808
{"andc", XRC(31,60,0), X_MASK, COM, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
4809
{"andc.", XRC(31,60,1), X_MASK, COM, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
4832
{"td", X(31,68), X_MASK, PPC64, 0, {TO, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4841
{"dlmzb", XRC(31,78,0), X_MASK, PPC403|PPC440|TITAN, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
4842
{"dlmzb.", XRC(31,78,1), X_MASK, PPC403|PPC440|TITAN, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
4853
{"lbzx", X(31,87), X_MASK, COM, 0, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4855
{"lbepx", X(31,95), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4859
{"lvx", X(31,103), X_MASK, PPCVEC, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4868
{"mvidsplt", X(31,110), X_MASK, PPCVEC2, 0, {VD, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4880
{"lbzux", X(31,119), X_MASK, COM, 0, {RT, RAL, RB}},
arch/powerpc/xmon/ppc-opc.c
4884
{"not", XRC(31,124,0), X_MASK, COM, 0, {RA, RS, RBS}},
arch/powerpc/xmon/ppc-opc.c
4885
{"nor", XRC(31,124,0), X_MASK, COM, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
4886
{"not.", XRC(31,124,1), X_MASK, COM, 0, {RA, RS, RBS}},
arch/powerpc/xmon/ppc-opc.c
4887
{"nor.", XRC(31,124,1), X_MASK, COM, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
4895
{"dcbtstls", X(31,134), X_MASK, PPCCHLK|PPC476|TITAN, 0, {CT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4897
{"stvebx", X(31,135), X_MASK, PPCVEC, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4913
{"dcbtstlse", X(31,142), X_MASK, PPCCHLK, E500MC, {CT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4923
{"eratsx", XRC(31,147,0), X_MASK, PPCA2, 0, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4924
{"eratsx.", XRC(31,147,1), X_MASK, PPCA2, 0, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4926
{"stdx", X(31,149), X_MASK, PPC64, 0, {RS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4928
{"stwcx.", XRC(31,150,1), X_MASK, PPC, 0, {RS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4930
{"stwx", X(31,151), X_MASK, PPCCOM, 0, {RS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4931
{"stx", X(31,151), X_MASK, PWRCOM, 0, {RS, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4933
{"slq", XRC(31,152,0), X_MASK, M601, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
4934
{"slq.", XRC(31,152,1), X_MASK, M601, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
4936
{"sle", XRC(31,153,0), X_MASK, M601, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
4937
{"sle.", XRC(31,153,1), X_MASK, M601, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
4941
{"stdepx", X(31,157), X_MASK, E500MC|PPCA2, 0, {RS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4943
{"stwepx", X(31,159), X_MASK, E500MC|PPCA2, 0, {RS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4947
{"dcbtls", X(31,166), X_MASK, PPCCHLK|PPC476|TITAN, 0, {CT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4949
{"stvehx", X(31,167), X_MASK, PPCVEC, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4955
{"dcbtlse", X(31,174), X_MASK, PPCCHLK, E500MC, {CT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4962
{"eratre", X(31,179), X_MASK, PPCA2, 0, {RT, RA, WS}},
arch/powerpc/xmon/ppc-opc.c
4964
{"stdux", X(31,181), X_MASK, PPC64, 0, {RS, RAS, RB}},
arch/powerpc/xmon/ppc-opc.c
4966
{"stqcx.", XRC(31,182,1), X_MASK, POWER8, 0, {RSQ, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4967
{"wchkall", X(31,182), X_MASK, PPCA2, 0, {OBF}},
arch/powerpc/xmon/ppc-opc.c
4969
{"stwux", X(31,183), X_MASK, PPCCOM, 0, {RS, RAS, RB}},
arch/powerpc/xmon/ppc-opc.c
4970
{"stux", X(31,183), X_MASK, PWRCOM, 0, {RS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4972
{"sliq", XRC(31,184,0), X_MASK, M601, 0, {RA, RS, SH}},
arch/powerpc/xmon/ppc-opc.c
4973
{"sliq.", XRC(31,184,1), X_MASK, M601, 0, {RA, RS, SH}},
arch/powerpc/xmon/ppc-opc.c
4979
{"icblq.", XRC(31,198,1), X_MASK, E6500, 0, {CT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4981
{"stvewx", X(31,199), X_MASK, PPCVEC, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5001
{"eratwe", X(31,211), X_MASK, PPCA2, 0, {RS, RA, WS}},
arch/powerpc/xmon/ppc-opc.c
5003
{"ldawx.", XRC(31,212,1), X_MASK, PPCA2, 0, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5005
{"stdcx.", XRC(31,214,1), X_MASK, PPC64, 0, {RS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5007
{"stbx", X(31,215), X_MASK, COM, 0, {RS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5009
{"sllq", XRC(31,216,0), X_MASK, M601, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5010
{"sllq.", XRC(31,216,1), X_MASK, M601, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5012
{"sleq", XRC(31,217,0), X_MASK, M601, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5013
{"sleq.", XRC(31,217,1), X_MASK, M601, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5015
{"stbepx", X(31,223), X_MASK, E500MC|PPCA2, 0, {RS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5019
{"icblc", X(31,230), X_MASK, PPCCHLK|PPC476|TITAN, 0, {CT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5021
{"stvx", X(31,231), X_MASK, PPCVEC, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5042
{"icblce", X(31,238), X_MASK, PPCCHLK, E500MC|PPCA2, {CT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5052
{"dcbtst", X(31,246), X_MASK, POWER4, DCBT_EO, {RA0, RB, CT}},
arch/powerpc/xmon/ppc-opc.c
5053
{"dcbtst", X(31,246), X_MASK, DCBT_EO, 0, {CT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5054
{"dcbtst", X(31,246), X_MASK, PPC, POWER4|DCBT_EO, {RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5056
{"stbux", X(31,247), X_MASK, COM, 0, {RS, RAS, RB}},
arch/powerpc/xmon/ppc-opc.c
5058
{"slliq", XRC(31,248,0), X_MASK, M601, 0, {RA, RS, SH}},
arch/powerpc/xmon/ppc-opc.c
5059
{"slliq.", XRC(31,248,1), X_MASK, M601, 0, {RA, RS, SH}},
arch/powerpc/xmon/ppc-opc.c
5061
{"bpermd", X(31,252), X_MASK, POWER7|PPCA2, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5063
{"dcbtstep", XRT(31,255,0), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5065
{"mfdcrx", X(31,259), X_MASK, BOOKE|PPCA2|PPC476, TITAN, {RS, RA}},
arch/powerpc/xmon/ppc-opc.c
5066
{"mfdcrx.", XRC(31,259,1), X_MASK, PPCA2, 0, {RS, RA}},
arch/powerpc/xmon/ppc-opc.c
5068
{"lvexbx", X(31,261), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5072
{"lvepxl", X(31,263), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5078
{"modud", X(31,265), X_MASK, POWER9, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5085
{"moduw", X(31,267), X_MASK, POWER9, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5092
{"tlbiel", X(31,274), X_MASK|1<<20,POWER9, PPC476, {RB, RSO, RIC, PRS, X_R}},
arch/powerpc/xmon/ppc-opc.c
5095
{"mfapidi", X(31,275), X_MASK, BOOKE, E500|TITAN, {RT, RA}},
arch/powerpc/xmon/ppc-opc.c
5099
{"lscbx", XRC(31,277,0), X_MASK, M601, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5100
{"lscbx.", XRC(31,277,1), X_MASK, M601, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5103
{"dcbt", X(31,278), X_MASK, POWER4, DCBT_EO, {RA0, RB, CT}},
arch/powerpc/xmon/ppc-opc.c
5104
{"dcbt", X(31,278), X_MASK, DCBT_EO, 0, {CT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5105
{"dcbt", X(31,278), X_MASK, PPC, POWER4|DCBT_EO, {RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5107
{"lhzx", X(31,279), X_MASK, COM, 0, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5111
{"eqv", XRC(31,284,0), X_MASK, COM, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5112
{"eqv.", XRC(31,284,1), X_MASK, COM, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5114
{"lhepx", X(31,287), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5116
{"mfdcrux", X(31,291), X_MASK, PPC464, 0, {RS, RA}},
arch/powerpc/xmon/ppc-opc.c
5118
{"lvexhx", X(31,293), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5119
{"lvepx", X(31,295), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5123
{"mfbhrbe", X(31,302), X_MASK, POWER8, 0, {RT, BHRBE}},
arch/powerpc/xmon/ppc-opc.c
5125
{"tlbie", X(31,306), X_MASK|1<<20,POWER9, TITAN, {RB, RS, RIC, PRS, X_R}},
arch/powerpc/xmon/ppc-opc.c
5132
{"ldmx", X(31,309), X_MASK, POWER9, 0, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5134
{"eciwx", X(31,310), X_MASK, PPC, E500|TITAN, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5136
{"lhzux", X(31,311), X_MASK, COM, 0, {RT, RAL, RB}},
arch/powerpc/xmon/ppc-opc.c
5140
{"xor", XRC(31,316,0), X_MASK, COM, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5141
{"xor.", XRC(31,316,1), X_MASK, COM, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5143
{"dcbtep", XRT(31,319,0), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5179
{"mfdcr", X(31,323), X_MASK, PPC403|BOOKE|PPCA2|PPC476, E500|TITAN, {RT, SPR}},
arch/powerpc/xmon/ppc-opc.c
5180
{"mfdcr.", XRC(31,323,1), X_MASK, PPCA2, 0, {RT, SPR}},
arch/powerpc/xmon/ppc-opc.c
5182
{"lvexwx", X(31,325), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5184
{"dcread", X(31,326), X_MASK, PPC476|TITAN, 0, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5191
{"mfpmr", X(31,334), X_MASK, PPCPMR|PPCE300, 0, {RT, PMR}},
arch/powerpc/xmon/ppc-opc.c
5192
{"mftmr", X(31,366), X_MASK, PPCTMR|E6500, 0, {RT, TMR}},
arch/powerpc/xmon/ppc-opc.c
5244
{"mftb", X(31,339), X_MASK, POWER4|BOOKE, 0, {RT, TBR}},
arch/powerpc/xmon/ppc-opc.c
5396
{"mfspr", X(31,339), X_MASK, COM, 0, {RT, SPR}},
arch/powerpc/xmon/ppc-opc.c
5398
{"lwax", X(31,341), X_MASK, PPC64, 0, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5402
{"lhax", X(31,343), X_MASK, COM, 0, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5404
{"lvxl", X(31,359), X_MASK, PPCVEC, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5417
{"mftb", X(31,371), X_MASK, PPC, NO371|POWER4, {RT, TBR}},
arch/powerpc/xmon/ppc-opc.c
5420
{"lwaux", X(31,373), X_MASK, PPC64, 0, {RT, RAL, RB}},
arch/powerpc/xmon/ppc-opc.c
5424
{"lhaux", X(31,375), X_MASK, COM, 0, {RT, RAL, RB}},
arch/powerpc/xmon/ppc-opc.c
5428
{"mtdcrx", X(31,387), X_MASK, BOOKE|PPCA2|PPC476, TITAN, {RA, RS}},
arch/powerpc/xmon/ppc-opc.c
5429
{"mtdcrx.", XRC(31,387,1), X_MASK, PPCA2, 0, {RA, RS}},
arch/powerpc/xmon/ppc-opc.c
5431
{"stvexbx", X(31,389), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5433
{"dcblc", X(31,390), X_MASK, PPCCHLK|PPC476|TITAN, 0, {CT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5444
{"dcblce", X(31,398), X_MASK, PPCCHLK, E500MC, {CT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5450
{"pbt.", XRC(31,404,1), X_MASK, POWER8, 0, {RS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5452
{"icswx", XRC(31,406,0), X_MASK, POWER7|PPCA2, 0, {RS, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5453
{"icswx.", XRC(31,406,1), X_MASK, POWER7|PPCA2, 0, {RS, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5455
{"sthx", X(31,407), X_MASK, COM, 0, {RS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5457
{"orc", XRC(31,412,0), X_MASK, COM, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5458
{"orc.", XRC(31,412,1), X_MASK, COM, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5460
{"sthepx", X(31,415), X_MASK, E500MC|PPCA2, 0, {RS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5462
{"mtdcrux", X(31,419), X_MASK, PPC464, 0, {RA, RS}},
arch/powerpc/xmon/ppc-opc.c
5464
{"stvexhx", X(31,421), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5466
{"dcblq.", XRC(31,422,1), X_MASK, E6500, 0, {CT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5481
{"ecowx", X(31,438), X_MASK, PPC, E500|TITAN, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5483
{"sthux", X(31,439), X_MASK, COM, 0, {RS, RAS, RB}},
arch/powerpc/xmon/ppc-opc.c
5494
{"mr", XRC(31,444,0), X_MASK, COM, 0, {RA, RS, RBS}},
arch/powerpc/xmon/ppc-opc.c
5495
{"or", XRC(31,444,0), X_MASK, COM, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5496
{"mr.", XRC(31,444,1), X_MASK, COM, 0, {RA, RS, RBS}},
arch/powerpc/xmon/ppc-opc.c
5497
{"or.", XRC(31,444,1), X_MASK, COM, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5533
{"mtdcr", X(31,451), X_MASK, PPC403|BOOKE|PPCA2|PPC476, E500|TITAN, {SPR, RS}},
arch/powerpc/xmon/ppc-opc.c
5534
{"mtdcr.", XRC(31,451,1), X_MASK, PPCA2, 0, {SPR, RS}},
arch/powerpc/xmon/ppc-opc.c
5536
{"stvexwx", X(31,453), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5547
{"mtpmr", X(31,462), X_MASK, PPCPMR|PPCE300, 0, {PMR, RS}},
arch/powerpc/xmon/ppc-opc.c
5548
{"mttmr", X(31,494), X_MASK, PPCTMR|E6500, 0, {TMR, RS}},
arch/powerpc/xmon/ppc-opc.c
5716
{"mtspr", X(31,467), X_MASK, COM, 0, {SPR, RS}},
arch/powerpc/xmon/ppc-opc.c
5720
{"nand", XRC(31,476,0), X_MASK, COM, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5721
{"nand.", XRC(31,476,1), X_MASK, COM, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5725
{"dcread", X(31,486), X_MASK, PPC403|PPC440, PPCA2|PPC476, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5727
{"icbtls", X(31,486), X_MASK, PPCCHLK|PPC476|TITAN, 0, {CT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5729
{"stvxl", X(31,487), X_MASK, PPCVEC, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5740
{"icbtlse", X(31,494), X_MASK, PPCCHLK, E500MC, {CT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5749
{"cmpb", X(31,508), X_MASK, POWER6|PPCA2|PPC476, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5753
{"lbdcbx", X(31,514), X_MASK, E200Z4, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5754
{"lbdx", X(31,515), X_MASK, E500MC, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5756
{"bblels", X(31,518), X_MASK, PPCBRLK, 0, {0}},
arch/powerpc/xmon/ppc-opc.c
5758
{"lvlx", X(31,519), X_MASK, CELL, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5777
{"ldbrx", X(31,532), X_MASK, CELL|POWER7|PPCA2, 0, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5779
{"lswx", X(31,533), X_MASK, PPCCOM, E500|E500MC, {RT, RAX, RBX}},
arch/powerpc/xmon/ppc-opc.c
5780
{"lsx", X(31,533), X_MASK, PWRCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5782
{"lwbrx", X(31,534), X_MASK, PPCCOM, 0, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5783
{"lbrx", X(31,534), X_MASK, PWRCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5785
{"lfsx", X(31,535), X_MASK, COM, PPCEFS, {FRT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5787
{"srw", XRC(31,536,0), X_MASK, PPCCOM, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5788
{"sr", XRC(31,536,0), X_MASK, PWRCOM, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5789
{"srw.", XRC(31,536,1), X_MASK, PPCCOM, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5790
{"sr.", XRC(31,536,1), X_MASK, PWRCOM, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5792
{"rrib", XRC(31,537,0), X_MASK, M601, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5793
{"rrib.", XRC(31,537,1), X_MASK, M601, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5798
{"srd", XRC(31,539,0), X_MASK, PPC64, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5799
{"srd.", XRC(31,539,1), X_MASK, PPC64, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5801
{"maskir", XRC(31,541,0), X_MASK, M601, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5802
{"maskir.", XRC(31,541,1), X_MASK, M601, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5804
{"lhdcbx", X(31,546), X_MASK, E200Z4, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5805
{"lhdx", X(31,547), X_MASK, E500MC, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5807
{"lvtrx", X(31,549), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5809
{"bbelr", X(31,550), X_MASK, PPCBRLK, 0, {0}},
arch/powerpc/xmon/ppc-opc.c
5811
{"lvrx", X(31,551), X_MASK, CELL, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5821
{"lfsux", X(31,567), X_MASK, COM, PPCEFS, {FRT, RAS, RB}},
arch/powerpc/xmon/ppc-opc.c
5828
{"lwdcbx", X(31,578), X_MASK, E200Z4, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5829
{"lwdx", X(31,579), X_MASK, E500MC, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5831
{"lvtlx", X(31,581), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5833
{"lwat", X(31,582), X_MASK, POWER9, 0, {RT, RA0, FC}},
arch/powerpc/xmon/ppc-opc.c
5841
{"lswi", X(31,597), X_MASK, PPCCOM, E500|E500MC, {RT, RAX, NBI}},
arch/powerpc/xmon/ppc-opc.c
5842
{"lsi", X(31,597), X_MASK, PWRCOM, 0, {RT, RA0, NB}},
arch/powerpc/xmon/ppc-opc.c
5854
{"lfdx", X(31,599), X_MASK, COM, PPCEFS, {FRT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5857
{"lfdepx", X(31,607), X_MASK, E500MC|PPCA2, 0, {FRT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5859
{"lddx", X(31,611), X_MASK, E500MC, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5861
{"lvswx", X(31,613), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5863
{"ldat", X(31,614), X_MASK, POWER9, 0, {RT, RA0, FC}},
arch/powerpc/xmon/ppc-opc.c
5873
{"mfsri", X(31,627), X_MASK, M601, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5877
{"lfdux", X(31,631), X_MASK, COM, PPCEFS, {FRT, RAS, RB}},
arch/powerpc/xmon/ppc-opc.c
5879
{"stbdcbx", X(31,642), X_MASK, E200Z4, 0, {RS, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5880
{"stbdx", X(31,643), X_MASK, E500MC, 0, {RS, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5882
{"stvlx", X(31,647), X_MASK, CELL, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5901
{"stdbrx", X(31,660), X_MASK, CELL|POWER7|PPCA2, 0, {RS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5903
{"stswx", X(31,661), X_MASK, PPCCOM, E500|E500MC, {RS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5904
{"stsx", X(31,661), X_MASK, PWRCOM, 0, {RS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5906
{"stwbrx", X(31,662), X_MASK, PPCCOM, 0, {RS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5907
{"stbrx", X(31,662), X_MASK, PWRCOM, 0, {RS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5909
{"stfsx", X(31,663), X_MASK, COM, PPCEFS, {FRS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5911
{"srq", XRC(31,664,0), X_MASK, M601, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5912
{"srq.", XRC(31,664,1), X_MASK, M601, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5914
{"sre", XRC(31,665,0), X_MASK, M601, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5915
{"sre.", XRC(31,665,1), X_MASK, M601, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5917
{"sthdcbx", X(31,674), X_MASK, E200Z4, 0, {RS, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5918
{"sthdx", X(31,675), X_MASK, E500MC, 0, {RS, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5920
{"stvfrx", X(31,677), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5922
{"stvrx", X(31,679), X_MASK, CELL, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5928
{"stbcx.", XRC(31,694,1), X_MASK, POWER8|E6500, 0, {RS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5930
{"stfsux", X(31,695), X_MASK, COM, PPCEFS, {FRS, RAS, RB}},
arch/powerpc/xmon/ppc-opc.c
5932
{"sriq", XRC(31,696,0), X_MASK, M601, 0, {RA, RS, SH}},
arch/powerpc/xmon/ppc-opc.c
5933
{"sriq.", XRC(31,696,1), X_MASK, M601, 0, {RA, RS, SH}},
arch/powerpc/xmon/ppc-opc.c
5935
{"stwdcbx", X(31,706), X_MASK, E200Z4, 0, {RS, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5936
{"stwdx", X(31,707), X_MASK, E500MC, 0, {RS, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5938
{"stvflx", X(31,709), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5940
{"stwat", X(31,710), X_MASK, POWER9, 0, {RS, RA0, FC}},
arch/powerpc/xmon/ppc-opc.c
5958
{"stswi", X(31,725), X_MASK, PPCCOM, E500|E500MC, {RS, RA0, NB}},
arch/powerpc/xmon/ppc-opc.c
5959
{"stsi", X(31,725), X_MASK, PWRCOM, 0, {RS, RA0, NB}},
arch/powerpc/xmon/ppc-opc.c
5961
{"sthcx.", XRC(31,726,1), X_MASK, POWER8|E6500, 0, {RS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5963
{"stfdx", X(31,727), X_MASK, COM, PPCEFS, {FRS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5965
{"srlq", XRC(31,728,0), X_MASK, M601, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5966
{"srlq.", XRC(31,728,1), X_MASK, M601, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5968
{"sreq", XRC(31,729,0), X_MASK, M601, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5969
{"sreq.", XRC(31,729,1), X_MASK, M601, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
5972
{"stfdepx", X(31,735), X_MASK, E500MC|PPCA2, 0, {FRS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5974
{"stddx", X(31,739), X_MASK, E500MC, 0, {RS, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5976
{"stvswx", X(31,741), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5978
{"stdat", X(31,742), X_MASK, POWER9, 0, {RS, RA0, FC}},
arch/powerpc/xmon/ppc-opc.c
6009
{"stfdux", X(31,759), X_MASK, COM, PPCEFS, {FRS, RAS, RB}},
arch/powerpc/xmon/ppc-opc.c
6011
{"srliq", XRC(31,760,0), X_MASK, M601, 0, {RA, RS, SH}},
arch/powerpc/xmon/ppc-opc.c
6012
{"srliq.", XRC(31,760,1), X_MASK, M601, 0, {RA, RS, SH}},
arch/powerpc/xmon/ppc-opc.c
6014
{"lvsm", X(31,773), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6018
{"stvepxl", X(31,775), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6019
{"lvlxl", X(31,775), X_MASK, CELL, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6030
{"modsd", X(31,777), X_MASK, POWER9, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6031
{"modsw", X(31,779), X_MASK, POWER9, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6036
{"tabortwc.", XRC(31,782,1), X_MASK, PPCHTM, 0, {TO, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6040
{"lwzcix", X(31,789), X_MASK, POWER6, 0, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6042
{"lhbrx", X(31,790), X_MASK, COM, 0, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6044
{"lfdpx", X(31,791), X_MASK, POWER6, POWER7, {FRTp, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6045
{"lfqx", X(31,791), X_MASK, POWER2, 0, {FRT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6047
{"sraw", XRC(31,792,0), X_MASK, PPCCOM, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
6048
{"sra", XRC(31,792,0), X_MASK, PWRCOM, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
6049
{"sraw.", XRC(31,792,1), X_MASK, PPCCOM, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
6050
{"sra.", XRC(31,792,1), X_MASK, PWRCOM, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
6052
{"srad", XRC(31,794,0), X_MASK, PPC64, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
6053
{"srad.", XRC(31,794,1), X_MASK, PPC64, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
6055
{"lfddx", X(31,803), X_MASK, E500MC, 0, {FRT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6057
{"lvtrxl", X(31,805), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6058
{"stvepx", X(31,807), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6059
{"lvrxl", X(31,807), X_MASK, CELL, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6064
{"tabortdc.", XRC(31,814,1), X_MASK, PPCHTM, 0, {TO, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6066
{"rac", X(31,818), X_MASK, M601, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6068
{"erativax", X(31,819), X_MASK, PPCA2, 0, {RS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6070
{"lhzcix", X(31,821), X_MASK, POWER6, 0, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6074
{"lfqux", X(31,823), X_MASK, POWER2, 0, {FRT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6076
{"srawi", XRC(31,824,0), X_MASK, PPCCOM, 0, {RA, RS, SH}},
arch/powerpc/xmon/ppc-opc.c
6077
{"srai", XRC(31,824,0), X_MASK, PWRCOM, 0, {RA, RS, SH}},
arch/powerpc/xmon/ppc-opc.c
6078
{"srawi.", XRC(31,824,1), X_MASK, PPCCOM, 0, {RA, RS, SH}},
arch/powerpc/xmon/ppc-opc.c
6079
{"srai.", XRC(31,824,1), X_MASK, PWRCOM, 0, {RA, RS, SH}},
arch/powerpc/xmon/ppc-opc.c
6084
{"lvtlxl", X(31,837), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6094
{"tabortwci.", XRC(31,846,1), X_MASK, PPCHTM, 0, {TO, RA, HTM_SI}},
arch/powerpc/xmon/ppc-opc.c
6102
{"lbzcix", X(31,853), X_MASK, POWER6, 0, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6105
{"mbar", X(31,854), X_MASK, BOOKE|PPCA2|PPC476, 0, {MO}},
arch/powerpc/xmon/ppc-opc.c
6109
{"lfiwax", X(31,855), X_MASK, POWER6|PPCA2|PPC476, 0, {FRT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6111
{"lvswxl", X(31,869), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6121
{"tabortdci.", XRC(31,878,1), X_MASK, PPCHTM, 0, {TO, RA, HTM_SI}},
arch/powerpc/xmon/ppc-opc.c
6125
{"ldcix", X(31,885), X_MASK, POWER6, 0, {RT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6129
{"lfiwzx", X(31,887), X_MASK, POWER7|PPCA2, 0, {FRT, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6136
{"stvlxl", X(31,903), X_MASK, CELL, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6149
{"tlbsx", XRC(31,914,0), X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0, {RTO, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6150
{"tlbsx.", XRC(31,914,1), X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0, {RTO, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6155
{"stwcix", X(31,917), X_MASK, POWER6, 0, {RS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6157
{"sthbrx", X(31,918), X_MASK, COM, 0, {RS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6159
{"stfdpx", X(31,919), X_MASK, POWER6, POWER7, {FRSp, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6160
{"stfqx", X(31,919), X_MASK, POWER2, 0, {FRS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6162
{"sraq", XRC(31,920,0), X_MASK, M601, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
6163
{"sraq.", XRC(31,920,1), X_MASK, M601, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
6165
{"srea", XRC(31,921,0), X_MASK, M601, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
6166
{"srea.", XRC(31,921,1), X_MASK, M601, 0, {RA, RS, RB}},
arch/powerpc/xmon/ppc-opc.c
6173
{"stfddx", X(31,931), X_MASK, E500MC, 0, {FRS, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6175
{"stvfrxl", X(31,933), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6179
{"wclr", X(31,934), X_MASK, PPCA2, 0, {L2, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6181
{"stvrxl", X(31,935), X_MASK, CELL, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6195
{"tlbre", X(31,946), X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0, {RSO, RAOPT, SHO}},
arch/powerpc/xmon/ppc-opc.c
6197
{"sthcix", X(31,949), X_MASK, POWER6, 0, {RS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6199
{"icswepx", XRC(31,950,0), X_MASK, PPCA2, 0, {RS, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6200
{"icswepx.", XRC(31,950,1), X_MASK, PPCA2, 0, {RS, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6202
{"stfqux", X(31,951), X_MASK, POWER2, 0, {FRS, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6204
{"sraiq", XRC(31,952,0), X_MASK, M601, 0, {RA, RS, SH}},
arch/powerpc/xmon/ppc-opc.c
6205
{"sraiq.", XRC(31,952,1), X_MASK, M601, 0, {RA, RS, SH}},
arch/powerpc/xmon/ppc-opc.c
6210
{"stvflxl", X(31,965), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6227
{"tlbwe", X(31,978), X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0, {RSO, RAOPT, SHO}},
arch/powerpc/xmon/ppc-opc.c
6231
{"stbcix", X(31,981), X_MASK, POWER6, 0, {RS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6235
{"stfiwx", X(31,983), X_MASK, PPC, PPCEFS, {FRS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6242
{"stvswxl", X(31,997), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6261
{"stdcix", X(31,1013), X_MASK, POWER6, 0, {RS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6351
{"dadd", XRC(59,2,0), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},
arch/powerpc/xmon/ppc-opc.c
6352
{"dadd.", XRC(59,2,1), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},
arch/powerpc/xmon/ppc-opc.c
6394
{"dmul", XRC(59,34,0), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},
arch/powerpc/xmon/ppc-opc.c
6395
{"dmul.", XRC(59,34,1), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},
arch/powerpc/xmon/ppc-opc.c
6412
{"dcmpo", X(59,130), X_MASK, POWER6, PPCVLE, {BF, FRA, FRB}},
arch/powerpc/xmon/ppc-opc.c
6414
{"dtstex", X(59,162), X_MASK, POWER6, PPCVLE, {BF, FRA, FRB}},
arch/powerpc/xmon/ppc-opc.c
6421
{"dctdp", XRC(59,258,0), X_MASK, POWER6, PPCVLE, {FRT, FRB}},
arch/powerpc/xmon/ppc-opc.c
6422
{"dctdp.", XRC(59,258,1), X_MASK, POWER6, PPCVLE, {FRT, FRB}},
arch/powerpc/xmon/ppc-opc.c
6424
{"dctfix", XRC(59,290,0), X_MASK, POWER6, PPCVLE, {FRT, FRB}},
arch/powerpc/xmon/ppc-opc.c
6425
{"dctfix.", XRC(59,290,1), X_MASK, POWER6, PPCVLE, {FRT, FRB}},
arch/powerpc/xmon/ppc-opc.c
6427
{"ddedpd", XRC(59,322,0), X_MASK, POWER6, PPCVLE, {SP, FRT, FRB}},
arch/powerpc/xmon/ppc-opc.c
6428
{"ddedpd.", XRC(59,322,1), X_MASK, POWER6, PPCVLE, {SP, FRT, FRB}},
arch/powerpc/xmon/ppc-opc.c
6430
{"dxex", XRC(59,354,0), X_MASK, POWER6, PPCVLE, {FRT, FRB}},
arch/powerpc/xmon/ppc-opc.c
6431
{"dxex.", XRC(59,354,1), X_MASK, POWER6, PPCVLE, {FRT, FRB}},
arch/powerpc/xmon/ppc-opc.c
6433
{"dsub", XRC(59,514,0), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},
arch/powerpc/xmon/ppc-opc.c
6434
{"dsub.", XRC(59,514,1), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},
arch/powerpc/xmon/ppc-opc.c
6436
{"ddiv", XRC(59,546,0), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},
arch/powerpc/xmon/ppc-opc.c
6437
{"ddiv.", XRC(59,546,1), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},
arch/powerpc/xmon/ppc-opc.c
6439
{"dcmpu", X(59,642), X_MASK, POWER6, PPCVLE, {BF, FRA, FRB}},
arch/powerpc/xmon/ppc-opc.c
6441
{"dtstsf", X(59,674), X_MASK, POWER6, PPCVLE, {BF, FRA, FRB}},
arch/powerpc/xmon/ppc-opc.c
6442
{"dtstsfi", X(59,675), X_MASK|1<<22,POWER9, PPCVLE, {BF, UIM6, FRB}},
arch/powerpc/xmon/ppc-opc.c
6444
{"drsp", XRC(59,770,0), X_MASK, POWER6, PPCVLE, {FRT, FRB}},
arch/powerpc/xmon/ppc-opc.c
6445
{"drsp.", XRC(59,770,1), X_MASK, POWER6, PPCVLE, {FRT, FRB}},
arch/powerpc/xmon/ppc-opc.c
6447
{"dcffix", XRC(59,802,0), X_MASK|FRA_MASK, POWER7, PPCVLE, {FRT, FRB}},
arch/powerpc/xmon/ppc-opc.c
6448
{"dcffix.", XRC(59,802,1), X_MASK|FRA_MASK, POWER7, PPCVLE, {FRT, FRB}},
arch/powerpc/xmon/ppc-opc.c
6450
{"denbcd", XRC(59,834,0), X_MASK, POWER6, PPCVLE, {S, FRT, FRB}},
arch/powerpc/xmon/ppc-opc.c
6451
{"denbcd.", XRC(59,834,1), X_MASK, POWER6, PPCVLE, {S, FRT, FRB}},
arch/powerpc/xmon/ppc-opc.c
6456
{"diex", XRC(59,866,0), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},
arch/powerpc/xmon/ppc-opc.c
6457
{"diex.", XRC(59,866,1), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},
arch/powerpc/xmon/ppc-opc.c
6678
{"daddq", XRC(63,2,0), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}},
arch/powerpc/xmon/ppc-opc.c
6679
{"daddq.", XRC(63,2,1), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}},
arch/powerpc/xmon/ppc-opc.c
6684
{"xsaddqp", XRC(63,4,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
6685
{"xsaddqpo", XRC(63,4,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
6690
{"fcpsgn", XRC(63,8,0), X_MASK, POWER6|PPCA2|PPC476, PPCVLE, {FRT, FRA, FRB}},
arch/powerpc/xmon/ppc-opc.c
6691
{"fcpsgn.", XRC(63,8,1), X_MASK, POWER6|PPCA2|PPC476, PPCVLE, {FRT, FRA, FRB}},
arch/powerpc/xmon/ppc-opc.c
6764
{"dmulq", XRC(63,34,0), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}},
arch/powerpc/xmon/ppc-opc.c
6765
{"dmulq.", XRC(63,34,1), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}},
arch/powerpc/xmon/ppc-opc.c
6770
{"xsmulqp", XRC(63,36,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
6771
{"xsmulqpo", XRC(63,36,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
6801
{"xscpsgnqp", X(63,100), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
6805
{"dcmpoq", X(63,130), X_MASK, POWER6, PPCVLE, {BF, FRAp, FRBp}},
arch/powerpc/xmon/ppc-opc.c
6824
{"dtstexq", X(63,162), X_MASK, POWER6, PPCVLE, {BF, FRAp, FRBp}},
arch/powerpc/xmon/ppc-opc.c
6834
{"dctqpq", XRC(63,258,0), X_MASK, POWER6, PPCVLE, {FRTp, FRB}},
arch/powerpc/xmon/ppc-opc.c
6835
{"dctqpq.", XRC(63,258,1), X_MASK, POWER6, PPCVLE, {FRTp, FRB}},
arch/powerpc/xmon/ppc-opc.c
6840
{"dctfixq", XRC(63,290,0), X_MASK, POWER6, PPCVLE, {FRT, FRBp}},
arch/powerpc/xmon/ppc-opc.c
6841
{"dctfixq.", XRC(63,290,1), X_MASK, POWER6, PPCVLE, {FRT, FRBp}},
arch/powerpc/xmon/ppc-opc.c
6843
{"ddedpdq", XRC(63,322,0), X_MASK, POWER6, PPCVLE, {SP, FRTp, FRBp}},
arch/powerpc/xmon/ppc-opc.c
6844
{"ddedpdq.", XRC(63,322,1), X_MASK, POWER6, PPCVLE, {SP, FRTp, FRBp}},
arch/powerpc/xmon/ppc-opc.c
6846
{"dxexq", XRC(63,354,0), X_MASK, POWER6, PPCVLE, {FRT, FRBp}},
arch/powerpc/xmon/ppc-opc.c
6847
{"dxexq.", XRC(63,354,1), X_MASK, POWER6, PPCVLE, {FRT, FRBp}},
arch/powerpc/xmon/ppc-opc.c
6849
{"xsmaddqp", XRC(63,388,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
6850
{"xsmaddqpo", XRC(63,388,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
6855
{"xsmsubqp", XRC(63,420,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
6856
{"xsmsubqpo", XRC(63,420,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
6861
{"xsnmaddqp", XRC(63,452,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
6862
{"xsnmaddqpo", XRC(63,452,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
6867
{"xsnmsubqp", XRC(63,484,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
6868
{"xsnmsubqpo", XRC(63,484,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
6873
{"dsubq", XRC(63,514,0), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}},
arch/powerpc/xmon/ppc-opc.c
6874
{"dsubq.", XRC(63,514,1), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}},
arch/powerpc/xmon/ppc-opc.c
6876
{"xssubqp", XRC(63,516,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
6877
{"xssubqpo", XRC(63,516,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
6879
{"ddivq", XRC(63,546,0), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}},
arch/powerpc/xmon/ppc-opc.c
6880
{"ddivq.", XRC(63,546,1), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}},
arch/powerpc/xmon/ppc-opc.c
6882
{"xsdivqp", XRC(63,548,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
6883
{"xsdivqpo", XRC(63,548,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
6895
{"dcmpuq", X(63,642), X_MASK, POWER6, PPCVLE, {BF, FRAp, FRBp}},
arch/powerpc/xmon/ppc-opc.c
6899
{"dtstsfq", X(63,674), X_MASK, POWER6, PPCVLE, {BF, FRA, FRBp}},
arch/powerpc/xmon/ppc-opc.c
6900
{"dtstsfiq", X(63,675), X_MASK|1<<22,POWER9, PPCVLE, {BF, UIM6, FRBp}},
arch/powerpc/xmon/ppc-opc.c
6902
{"xststdcqp", X(63,708), X_MASK, PPCVSX3, PPCVLE, {BF, VB, DCMX}},
arch/powerpc/xmon/ppc-opc.c
6909
{"drdpq", XRC(63,770,0), X_MASK, POWER6, PPCVLE, {FRTp, FRBp}},
arch/powerpc/xmon/ppc-opc.c
6910
{"drdpq.", XRC(63,770,1), X_MASK, POWER6, PPCVLE, {FRTp, FRBp}},
arch/powerpc/xmon/ppc-opc.c
6912
{"dcffixq", XRC(63,802,0), X_MASK, POWER6, PPCVLE, {FRTp, FRB}},
arch/powerpc/xmon/ppc-opc.c
6913
{"dcffixq.", XRC(63,802,1), X_MASK, POWER6, PPCVLE, {FRTp, FRB}},
arch/powerpc/xmon/ppc-opc.c
6933
{"denbcdq", XRC(63,834,0), X_MASK, POWER6, PPCVLE, {S, FRTp, FRBp}},
arch/powerpc/xmon/ppc-opc.c
6934
{"denbcdq.", XRC(63,834,1), X_MASK, POWER6, PPCVLE, {S, FRTp, FRBp}},
arch/powerpc/xmon/ppc-opc.c
6946
{"fmrgow", X(63,838), X_MASK, PPCVSX2, PPCVLE, {FRT, FRA, FRB}},
arch/powerpc/xmon/ppc-opc.c
6953
{"diexq", XRC(63,866,0), X_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp}},
arch/powerpc/xmon/ppc-opc.c
6954
{"diexq.", XRC(63,866,1), X_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp}},
arch/powerpc/xmon/ppc-opc.c
6956
{"xsiexpqp", X(63,868), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
arch/powerpc/xmon/ppc-opc.c
6964
{"fmrgew", X(63,966), X_MASK, PPCVSX2, PPCVLE, {FRT, FRA, FRB}},
arch/powerpc/xmon/ppc-opc.c
7144
{"e_cmph", X(31,14), X_MASK, PPCVLE, 0, {CRD, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
7145
{"e_cmphl", X(31,46), X_MASK, PPCVLE, 0, {CRD, RA, RB}},
