BPF_REG_4
[BPF_REG_4] = {ARC_R_6, ARC_R_7},
[BPF_REG_4] = {STACK_OFFSET(BPF_R4_HI), STACK_OFFSET(BPF_R4_LO)},
const s8 *r4 = bpf2a32[BPF_REG_4];
[BPF_REG_4] = A64_R(3),
[BPF_REG_4] = LOONGARCH_GPR_A3,
[BPF_REG_4] = {MIPS_R_T3, MIPS_R_T2},
[BPF_REG_4] = MIPS_R_A3,
dst = regmap[BPF_REG_4];
[BPF_REG_4] = {HPPA_R(9), HPPA_R(10)},
reg = bpf_get_reg64_offset(regmap[BPF_REG_4], tmp, offset_sp, ctx);
LOAD_PARAM(HPPA_REG_ARG3, BPF_REG_4);
[BPF_REG_4] = HPPA_R(8),
emit_hppa_copy(regmap[BPF_REG_4], HPPA_REG_ARG3, ctx);
ctx->b2p[BPF_REG_4] = _R10;
ctx->b2p[BPF_REG_4] = _R6;
[BPF_REG_4] = {RV_REG_A7, RV_REG_A6},
[BPF_REG_4] = RV_REG_A3,
[BPF_REG_4] = 5,
[BPF_REG_4] = O3,
[BPF_REG_4] = 1, /* RCX */
[BPF_REG_4] = offsetof(struct pt_regs, cx),
if (boot_cpu_has(X86_FEATURE_BMI2) && src_reg != BPF_REG_4) {
if (src_reg != BPF_REG_4) { /* common case */
if (dst_reg == BPF_REG_4) {
EMIT_mov(BPF_REG_4, src_reg);
if (src_reg != BPF_REG_4) {
if (insn->dst_reg == BPF_REG_4)
emit_indirect_jump(&prog, BPF_REG_4 /* R4 -> rcx */, ip + (prog - start));
[BPF_REG_4] = {STACK_OFFSET(32), STACK_OFFSET(36)},
const u8 *r4 = bpf2ia32[BPF_REG_4];
reg1 = cur_regs(env) + BPF_REG_4;
(1 << BPF_REG_3) | (1 << BPF_REG_4) | \
#define BPF_REG_ARG4 BPF_REG_4
#define BPF_R4 regs[BPF_REG_4]
*callee_reg = BPF_REG_4;
*caller_reg = BPF_REG_4;
struct bpf_reg_state *reg = reg_state(env, BPF_REG_4);
mark_chain_precision(env, BPF_REG_4);
BPF_REG_0, BPF_REG_1, BPF_REG_2, BPF_REG_3, BPF_REG_4, BPF_REG_5
int node_offset_reg = BPF_REG_4;
struct_meta_reg = BPF_REG_4;
callee->regs[BPF_REG_4] = caller->regs[BPF_REG_3];
bpf_mark_reg_not_init(env, &callee->regs[BPF_REG_4]);
bpf_mark_reg_not_init(env, &callee->regs[BPF_REG_4]);
callee->regs[BPF_REG_3] = caller->regs[BPF_REG_4];
bpf_mark_reg_not_init(env, &callee->regs[BPF_REG_4]);
bpf_mark_reg_not_init(env, &callee->regs[BPF_REG_4]);
bpf_mark_reg_not_init(env, &callee->regs[BPF_REG_4]);
bpf_mark_reg_not_init(env, &callee->regs[BPF_REG_4]);
#define R4 BPF_REG_4
BPF_MOV64_IMM(BPF_REG_4, 0),
#define BPF_REG_ARG4 BPF_REG_4
emit(gen, BPF_MOV64_REG(BPF_REG_4, reg2));
emit(gen, BPF_MOV64_IMM(BPF_REG_4, 0));
emit(gen, BPF_MOV64_IMM(BPF_REG_4, 0));
emit2(gen, BPF_LD_IMM64_RAW_FULL(BPF_REG_4, BPF_PSEUDO_MAP_IDX_VALUE,
emit(gen, BPF_MOV64_REG(BPF_REG_7, BPF_REG_4));
BPF_MOV64_IMM(BPF_REG_4, 1),
BPF_MOV64_REG(BPF_REG_4, BPF_REG_7),
BPF_MOV64_REG(BPF_REG_4, BPF_REG_7),
BPF_MOV64_REG(BPF_REG_4, BPF_REG_7),
BPF_MOV64_REG(BPF_REG_4, BPF_REG_7),
BPF_MOV64_REG(BPF_REG_4, BPF_REG_7),
BPF_MOV64_REG(BPF_REG_4, BPF_REG_7),
BPF_MOV64_REG(BPF_REG_4, BPF_REG_7),
BPF_MOV64_REG(BPF_REG_4, BPF_REG_7),
BPF_MOV64_IMM(BPF_REG_4, BPF_F_SYSCTL_BASE_NAME),
BPF_MOV64_IMM(BPF_REG_4, BPF_F_SYSCTL_BASE_NAME),
BPF_MOV64_IMM(BPF_REG_4, 0),
BPF_MOV64_IMM(BPF_REG_4, 0),
BPF_MOV64_IMM(BPF_REG_4, 0),
BPF_MOV64_REG(BPF_REG_4, BPF_REG_7),
BPF_MOV64_REG(BPF_REG_4, BPF_REG_7),
BPF_MOV64_REG(BPF_REG_4, BPF_REG_7),
BPF_MOV64_REG(BPF_REG_4, BPF_REG_7),
BPF_ATOMIC_OP(BPF_DW, BPF_LOAD_ACQ, BPF_REG_4, BPF_REG_3, -8))
: __imm_insn(ld_ind, BPF_LD_IND(BPF_W, BPF_REG_4, -0x200000))
insn[i++] = BPF_ALU64_IMM(BPF_MOV, BPF_REG_4, 0);
BPF_MOV64_IMM(BPF_REG_4, 0), \
BPF_MOV64_REG(BPF_REG_4, BPF_REG_2), \
BPF_ALU64_IMM(BPF_ADD, BPF_REG_4, 8), \
BPF_JMP_REG(BPF_JLE, BPF_REG_4, BPF_REG_3, 1), \
__ATOMIC_FETCH_OP_TEST(BPF_REG_4, BPF_REG_5, 1, BPF_ADD | BPF_FETCH, 2, 3),
__ATOMIC_FETCH_OP_TEST(BPF_REG_4, BPF_REG_5, 0x010, BPF_AND | BPF_FETCH, 0x011, 0x010),
__ATOMIC_FETCH_OP_TEST(BPF_REG_4, BPF_REG_5, 0x010, BPF_OR | BPF_FETCH, 0x011, 0x011),
__ATOMIC_FETCH_OP_TEST(BPF_REG_4, BPF_REG_5, 0x010, BPF_XOR | BPF_FETCH, 0x011, 0x001),
__ATOMIC_FETCH_OP_TEST(BPF_REG_4, BPF_REG_5, 0x010, BPF_XCHG, 0x011, 0x011),
BPF_ALU64_IMM(BPF_MOV, BPF_REG_4, 0),
BPF_ALU64_IMM(BPF_MOV, BPF_REG_4, 0),
BPF_ALU64_IMM(BPF_MOV, BPF_REG_4, 0),
BPF_ALU64_IMM(BPF_MOV, BPF_REG_4, 0),
BPF_ALU64_IMM(BPF_MOV, BPF_REG_4, 0),
BPF_ALU64_IMM(BPF_MOV, BPF_REG_4, 0),
BPF_ALU64_IMM(BPF_MOV, BPF_REG_4, 0),
BPF_ALU64_IMM(BPF_MOV, BPF_REG_4, 1),
BPF_MOV64_REG(BPF_REG_4, BPF_REG_9),
BPF_JMP_IMM(BPF_JNE, BPF_REG_4, 1, 2),
BPF_MOV64_REG(BPF_REG_4, BPF_REG_9),
BPF_JMP_IMM(BPF_JNE, BPF_REG_4, 1, 2),
BPF_MOV64_REG(BPF_REG_4, BPF_REG_9),
BPF_JMP_IMM(BPF_JNE, BPF_REG_4, 1, 2),
BPF_MOV64_REG(BPF_REG_4, BPF_REG_9),
BPF_JMP_IMM(BPF_JNE, BPF_REG_4, 1, 2),
BPF_MOV64_REG(BPF_REG_4, BPF_REG_9),
BPF_JMP_IMM(BPF_JNE, BPF_REG_4, 0, 2),
BPF_MOV64_REG(BPF_REG_4, BPF_REG_10),
BPF_ALU64_IMM(BPF_ADD, BPF_REG_4, -8),
BPF_STX_MEM(BPF_DW, BPF_REG_4, BPF_REG_2, 0),
BPF_LDX_MEM(BPF_DW, BPF_REG_2, BPF_REG_4, 0),
BPF_MOV64_REG(BPF_REG_4, BPF_REG_10),
BPF_ALU64_IMM(BPF_ADD, BPF_REG_4, -8),
BPF_LDX_MEM(BPF_DW, BPF_REG_4, BPF_REG_10, -8),
BPF_ST_MEM(BPF_W, BPF_REG_4, 0, 0),
BPF_STX_MEM(BPF_DW, BPF_REG_4, BPF_REG_2, 0),
BPF_LDX_MEM(BPF_DW, BPF_REG_2, BPF_REG_4, 0),
BPF_MOV64_REG(BPF_REG_4, BPF_REG_10),
BPF_ALU64_IMM(BPF_ADD, BPF_REG_4, -8),
BPF_LDX_MEM(BPF_DW, BPF_REG_4, BPF_REG_10, -8),
BPF_ST_MEM(BPF_W, BPF_REG_4, 0, 0),
BPF_STX_MEM(BPF_DW, BPF_REG_4, BPF_REG_2, 0),
BPF_LDX_MEM(BPF_DW, BPF_REG_2, BPF_REG_4, 0),
BPF_MOV64_REG(BPF_REG_4, BPF_REG_10),
BPF_ALU64_IMM(BPF_ADD, BPF_REG_4, -8),
BPF_LDX_MEM(BPF_DW, BPF_REG_4, BPF_REG_10, -8),
BPF_ST_MEM(BPF_W, BPF_REG_4, 0, 0),
BPF_STX_MEM(BPF_DW, BPF_REG_4, BPF_REG_2, 0),
BPF_MOV64_REG(BPF_REG_4, BPF_REG_10),
BPF_ALU64_IMM(BPF_ADD, BPF_REG_4, -8),
BPF_STX_MEM(BPF_DW, BPF_REG_4, BPF_REG_1, 0),
BPF_LDX_MEM(BPF_DW, BPF_REG_4, BPF_REG_10, -8),
BPF_LDX_MEM(BPF_W, BPF_REG_0, BPF_REG_4, 0),
BPF_STX_MEM(BPF_DW, BPF_REG_4, BPF_REG_2, 0),
BPF_MOV64_REG(BPF_REG_4, BPF_REG_10),
BPF_ALU64_IMM(BPF_ADD, BPF_REG_4, -8),
BPF_STX_MEM(BPF_DW, BPF_REG_4, BPF_REG_2, 0),
BPF_LDX_MEM(BPF_DW, BPF_REG_4, BPF_REG_10, -8),
BPF_LDX_MEM(BPF_W, BPF_REG_0, BPF_REG_4, 0),
BPF_STX_MEM(BPF_DW, BPF_REG_4, BPF_REG_2, 0),
BPF_MOV64_REG(BPF_REG_4, BPF_REG_10),
BPF_ALU64_IMM(BPF_ADD, BPF_REG_4, -8),
BPF_STX_MEM(BPF_DW, BPF_REG_4, BPF_REG_2, 0),
BPF_LDX_MEM(BPF_DW, BPF_REG_4, BPF_REG_10, -8),
BPF_LDX_MEM(BPF_W, BPF_REG_0, BPF_REG_4, 0),
BPF_STX_MEM(BPF_DW, BPF_REG_4, BPF_REG_2, 0),
BPF_MOV64_REG(BPF_REG_4, BPF_REG_10),
BPF_ALU64_IMM(BPF_ADD, BPF_REG_4, -8),
BPF_STX_MEM(BPF_DW, BPF_REG_4, BPF_REG_2, 0),
BPF_LDX_MEM(BPF_DW, BPF_REG_4, BPF_REG_10, -8),
BPF_LDX_MEM(BPF_W, BPF_REG_0, BPF_REG_4, 0),
BPF_STX_MEM(BPF_DW, BPF_REG_4, BPF_REG_2, 0),
BPF_MOV64_REG(BPF_REG_4, BPF_REG_10),
BPF_ALU64_IMM(BPF_ADD, BPF_REG_4, -8),
BPF_STX_MEM(BPF_DW, BPF_REG_4, BPF_REG_2, 0),
BPF_LDX_MEM(BPF_DW, BPF_REG_4, BPF_REG_10, -8),
BPF_LDX_MEM(BPF_W, BPF_REG_0, BPF_REG_4, 0),
BPF_STX_MEM(BPF_DW, BPF_REG_4, BPF_REG_2, 0),
BPF_LDX_MEM(BPF_W, BPF_REG_4, BPF_REG_1, // 1. r4 = *(u32 *)(r1 + data)
BPF_MOV64_REG(BPF_REG_3, BPF_REG_4), // 2. r3 = r4
BPF_ALU64_IMM(BPF_ADD, BPF_REG_4, 14), // 6. r4 += 14
BPF_MOV64_REG(BPF_REG_1, BPF_REG_4), // 7. r1 = r4
BPF_LDX_MEM(BPF_W, BPF_REG_4, BPF_REG_1, // 1. r4 = *(u32 *)(r1 + data)
BPF_MOV64_REG(BPF_REG_3, BPF_REG_4), // 2. r3 = r4
BPF_ALU64_IMM(BPF_ADD, BPF_REG_4, 14), // 6. r4 += 14
BPF_MOV64_REG(BPF_REG_1, BPF_REG_4), // 7. r1 = r4
BPF_MOV64_REG(BPF_REG_4, BPF_REG_10), \
BPF_ALU64_IMM(BPF_ADD, BPF_REG_4, -8), \
BPF_MOV64_IMM(BPF_REG_4, 1),
BPF_ALU32_REG(BPF_LSH, BPF_REG_1, BPF_REG_4),
BPF_ALU64_REG(BPF_RSH, BPF_REG_1, BPF_REG_4),
BPF_MOV64_REG(BPF_REG_4, BPF_REG_1),
BPF_ALU32_REG(BPF_RSH, BPF_REG_4, BPF_REG_0),
BPF_JMP_IMM(BPF_JEQ, BPF_REG_4, 0xff, 1),
BPF_ALU64_REG(BPF_ARSH, BPF_REG_4, BPF_REG_4),
BPF_JMP_IMM(BPF_JEQ, BPF_REG_4, 0, 1),
BPF_MOV64_REG(BPF_REG_0, BPF_REG_4),
BPF_MOV64_REG(BPF_REG_0, BPF_REG_4),
BPF_MOV64_IMM(BPF_REG_4, 0),
BPF_MOV64_REG(BPF_REG_0, BPF_REG_4),
BPF_LDX_MEM(BPF_DW, BPF_REG_4, BPF_REG_10, -8),
BPF_JMP_REG(BPF_JGT, BPF_REG_4, BPF_REG_0, 0),
BPF_LDX_MEM(BPF_DW, BPF_REG_4, BPF_REG_10, -8),
BPF_JMP_REG(BPF_JGT, BPF_REG_4, BPF_REG_0, 0),
BPF_LDX_MEM(BPF_W, BPF_REG_4, BPF_REG_1, offsetof(struct xdp_md, ingress_ifindex)),
BPF_JMP_IMM(BPF_JEQ, BPF_REG_4, 0, 1),
BPF_LD_MAP_FD(BPF_REG_4, 0),
BPF_ALU64_REG(BPF_MOV, BPF_REG_1, BPF_REG_4),