XTFPGA_CLKFRQ_VADDR
#define BASE_BAUD (*(long *)XTFPGA_CLKFRQ_VADDR / 16)
serial_platform_data[0].uartclk = *(long *)XTFPGA_CLKFRQ_VADDR;
ethoc_pdata.eth_clkfreq = *(long *)XTFPGA_CLKFRQ_VADDR;
ccount_freq = *(long *)XTFPGA_CLKFRQ_VADDR;