XSPI_MCR
reg = readl(base + XSPI_MCR);
writel(reg, base + XSPI_MCR);
reg = readl(base + XSPI_MCR);
writel(reg, base + XSPI_MCR);
reg = readl(base + XSPI_MCR);
writel(reg, base + XSPI_MCR);
reg = readl(xspi->iobase + XSPI_MCR);
writel(reg, xspi->iobase + XSPI_MCR);
reg = readl(xspi->iobase + XSPI_MCR);
writel(reg, xspi->iobase + XSPI_MCR);
reg = readl(xspi->iobase + XSPI_MCR);
writel(reg, xspi->iobase + XSPI_MCR);
reg = readl(base + XSPI_MCR);
writel(reg, base + XSPI_MCR);
writel(reg, base + XSPI_MCR);
reg = readl(base + XSPI_MCR);
writel(reg, base + XSPI_MCR);
reg = readl(base + XSPI_MCR);
writel(reg, base + XSPI_MCR);
writel(reg, base + XSPI_MCR);
reg = readl(base + XSPI_MCR);
writel(reg, base + XSPI_MCR);
reg = readl(base + XSPI_MCR);
writel(reg, base + XSPI_MCR);
writel(reg, base + XSPI_MCR);
ret = readl_poll_timeout(base + XSPI_MCR, reg, !(reg & XSPI_MCR_IPS_TG_RST),
reg = readl(base + XSPI_MCR);
writel(reg, base + XSPI_MCR);
writel(reg, base + XSPI_MCR);
writel(reg, base + XSPI_MCR);
reg = readl(base + XSPI_MCR);
writel(reg, base + XSPI_MCR);
ret = readl_poll_timeout(base + XSPI_MCR, reg,
reg = readl(base + XSPI_MCR);
writel(reg, base + XSPI_MCR);
err = readl_poll_timeout(base + XSPI_MCR, reg,
reg = readl(base + XSPI_MCR);
writel(reg, base + XSPI_MCR);
err = readl_poll_timeout(base + XSPI_MCR, reg,