drivers/dma/xilinx/xdma-regs.h

31

#define XDMA_DESC_ADJACENT_MASK (XDMA_DESC_ADJACENT - 1)

drivers/dma/xilinx/xdma-regs.h

69

#define XDMA_DESC_BLOCK_SIZE (XDMA_DESC_SIZE * XDMA_DESC_ADJACENT)

drivers/dma/xilinx/xdma.c

149

return block->virt_addr + (XDMA_DESC_ADJACENT - 1) * XDMA_DESC_SIZE;

drivers/dma/xilinx/xdma.c

163

desc_control = XDMA_DESC_CONTROL(XDMA_DESC_ADJACENT, 0);

drivers/dma/xilinx/xdma.c

287

dblk_num = DIV_ROUND_UP(desc_num, XDMA_DESC_ADJACENT);

drivers/dma/xilinx/xdma.c

306

for (j = 0, desc = addr; j < XDMA_DESC_ADJACENT; j++)

drivers/dma/xilinx/xdma.c

355

completed_blocks = desc->completed_desc_num / XDMA_DESC_ADJACENT;

drivers/dma/xilinx/xdma.c

370

val = XDMA_DESC_ADJACENT - 1;

drivers/dma/xilinx/xdma.c

570

dblk = sw_desc->desc_blocks + (desc_num / XDMA_DESC_ADJACENT);

drivers/dma/xilinx/xdma.c

683

if (periods > XDMA_DESC_ADJACENT) {

drivers/dma/xilinx/xdma.c

684

xdma_err(xdev, "number of periods limited to %u\n", XDMA_DESC_ADJACENT);

drivers/dma/xilinx/xdma.c

916

if (complete_desc_num == XDMA_DESC_BLOCK_NUM * XDMA_DESC_ADJACENT) {

drivers/dma/xilinx/xdma.c

953

complete_desc_num != XDMA_DESC_BLOCK_NUM * XDMA_DESC_ADJACENT)