XRT_MASK
#define XLRT_MASK (XRT_MASK & ~((unsigned long) 0x3 << 21))
{"dcbz_l", X (4,1014), XRT_MASK, PPCPS, 0, {RA, RB}},
{"dcbst", X(31,54), XRT_MASK, PPC, 0, {RA0, RB}},
{"dcbstep", XRT(31,63,0), XRT_MASK, E500MC|PPCA2, 0, {RA0, RB}},
{"dcbfl", XOPL(31,86,1), XRT_MASK, POWER5, PPC476, {RA0, RB}},
{"dcbfep", XRT(31,127,0), XRT_MASK, E500MC|PPCA2, 0, {RA0, RB}},
{"dcbtstt", XRT(31,246,0x10), XRT_MASK, POWER7, 0, {RA0, RB}},
{"icbt", X(31,262), XRT_MASK, PPC403, 0, {RA, RB}},
{"dcbtt", XRT(31,278,0x10), XRT_MASK, POWER7, 0, {RA0, RB}},
{"tlbi", X(31,306), XRT_MASK, POWER, 0, {RA0, RB}},
{"dccci", X(31,454), XRT_MASK, PPC403|PPC440|TITAN|PPCA2, 0, {RAOPT, RBOPT}},
{"dcbi", X(31,470), XRT_MASK, PPC, 0, {RA0, RB}},
{"dsn", X(31,483), XRT_MASK, E500MC, 0, {RA, RB}},
{"dcba", X(31,758), XRT_MASK, PPC405|PPC7450|BOOKE|PPCA2|PPC476, 0, {RA0, RB}},
{"dcbal", XOPL(31,758,1), XRT_MASK, E500MC, 0, {RA0, RB}},
{"copy", XOPL(31,774,1), XRT_MASK, POWER9, 0, {RA0, RB}},
{"tlbivax", X(31,786), XRT_MASK, BOOKE|PPCA2|PPC476, 0, {RA0, RB}},
{"tlbsrx.", XRC(31,850,1), XRT_MASK, PPCA2, 0, {RA0, RB}},
{"paste.", XRCL(31,902,1,1),XRT_MASK, POWER9, 0, {RA0, RB}},
{"wclrone", XOPL2(31,934,2),XRT_MASK, PPCA2, 0, {RA0, RB}},
{"iccci", X(31,966), XRT_MASK, PPC403|PPC440|TITAN|PPCA2, 0, {RAOPT, RBOPT}},
{"icbi", X(31,982), XRT_MASK, PPC, 0, {RA0, RB}},
{"icbiep", XRT(31,991,0), XRT_MASK, E500MC|PPCA2, 0, {RA0, RB}},
{"icread", X(31,998), XRT_MASK, PPC403|PPC440|PPC476|TITAN, 0, {RA0, RB}},
{"dcbz", X(31,1014), XRT_MASK, PPC, 0, {RA0, RB}},
{"dclz", X(31,1014), XRT_MASK, PPC, 0, {RA0, RB}},
{"dcbzep", XRT(31,1023,0), XRT_MASK, E500MC|PPCA2, 0, {RA0, RB}},
{"dcbzl", XOPL(31,1014,1), XRT_MASK, POWER4|E500MC, PPC476, {RA0, RB}},