arch/powerpc/xmon/ppc-opc.c
2830
#define XORB_MASK (XO_MASK | RB_MASK)
arch/powerpc/xmon/ppc-opc.c
3107
{"machhwu", XO (4, 12,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3109
{"machhwu.", XO (4, 12,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3179
{"machhw", XO (4, 44,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3180
{"machhw.", XO (4, 44,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3181
{"nmachhw", XO (4, 46,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3182
{"nmachhw.", XO (4, 46,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3196
{"machhwsu", XO (4, 76,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3197
{"machhwsu.", XO (4, 76,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3206
{"machhws", XO (4, 108,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3207
{"machhws.", XO (4, 108,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3208
{"nmachhws", XO (4, 110,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3209
{"nmachhws.", XO (4, 110,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3222
{"macchwu", XO (4, 140,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3223
{"macchwu.", XO (4, 140,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3234
{"macchw", XO (4, 172,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3235
{"macchw.", XO (4, 172,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3236
{"nmacchw", XO (4, 174,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3237
{"nmacchw.", XO (4, 174,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3247
{"macchwsu", XO (4, 204,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3248
{"macchwsu.", XO (4, 204,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3255
{"macchws", XO (4, 236,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3256
{"macchws.", XO (4, 236,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3257
{"nmacchws", XO (4, 238,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3258
{"nmacchws.", XO (4, 238,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3454
{"maclhwu", XO (4, 396,0,0),XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3456
{"maclhwu.", XO (4, 396,0,1),XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3487
{"maclhw", XO (4, 428,0,0),XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3488
{"maclhw.", XO (4, 428,0,1),XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3489
{"nmaclhw", XO (4, 430,0,0),XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3490
{"nmaclhw.", XO (4, 430,0,1),XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3500
{"maclhwsu", XO (4, 460,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3501
{"maclhwsu.", XO (4, 460,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3510
{"maclhws", XO (4, 492,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3511
{"maclhws.", XO (4, 492,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3512
{"nmaclhws", XO (4, 494,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3513
{"nmaclhws.", XO (4, 494,0,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3534
{"machhwuo", XO (4, 12,1,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3535
{"machhwuo.", XO (4, 12,1,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3565
{"machhwo", XO (4, 44,1,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3567
{"machhwo.", XO (4, 44,1,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3570
{"nmachhwo", XO (4, 46,1,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3571
{"nmachhwo.", XO (4, 46,1,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3594
{"machhwsuo", XO (4, 76,1,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3595
{"machhwsuo.", XO (4, 76,1,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3618
{"machhwso", XO (4, 108,1,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3619
{"machhwso.", XO (4, 108,1,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3620
{"nmachhwso", XO (4, 110,1,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3621
{"nmachhwso.", XO (4, 110,1,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3647
{"macchwuo", XO (4, 140,1,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3648
{"macchwuo.", XO (4, 140,1,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3671
{"macchwo", XO (4, 172,1,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3673
{"macchwo.", XO (4, 172,1,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3676
{"nmacchwo", XO (4, 174,1,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3677
{"nmacchwo.", XO (4, 174,1,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3703
{"macchwsuo", XO (4, 204,1,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3704
{"macchwsuo.", XO (4, 204,1,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3724
{"macchwso", XO (4, 236,1,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3726
{"macchwso.", XO (4, 236,1,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3729
{"nmacchwso", XO (4, 238,1,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3730
{"nmacchwso.", XO (4, 238,1,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3787
{"maclhwuo", XO (4, 396,1,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3788
{"maclhwuo.", XO (4, 396,1,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3797
{"maclhwo", XO (4, 428,1,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3798
{"maclhwo.", XO (4, 428,1,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3799
{"nmaclhwo", XO (4, 430,1,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3800
{"nmaclhwo.", XO (4, 430,1,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3810
{"maclhwsuo", XO (4, 460,1,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3811
{"maclhwsuo.", XO (4, 460,1,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3818
{"maclhwso", XO (4, 492,1,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3819
{"maclhwso.", XO (4, 492,1,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3820
{"nmaclhwso", XO (4, 494,1,0), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
3821
{"nmaclhwso.", XO (4, 494,1,1), XO_MASK, MULHW, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4698
{"subfc", XO(31,8,0,0), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4699
{"sf", XO(31,8,0,0), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4700
{"subc", XO(31,8,0,0), XO_MASK, PPCCOM, 0, {RT, RB, RA}},
arch/powerpc/xmon/ppc-opc.c
4701
{"subfc.", XO(31,8,0,1), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4702
{"sf.", XO(31,8,0,1), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4703
{"subc.", XO(31,8,0,1), XO_MASK, PPCCOM, 0, {RT, RB, RA}},
arch/powerpc/xmon/ppc-opc.c
4705
{"mulhdu", XO(31,9,0,0), XO_MASK, PPC64, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4706
{"mulhdu.", XO(31,9,0,1), XO_MASK, PPC64, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4708
{"addc", XO(31,10,0,0), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4709
{"a", XO(31,10,0,0), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4710
{"addc.", XO(31,10,0,1), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4711
{"a.", XO(31,10,0,1), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4713
{"mulhwu", XO(31,11,0,0), XO_MASK, PPC, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4714
{"mulhwu.", XO(31,11,0,1), XO_MASK, PPC, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4778
{"addg6s", XO(31,74,0,0), XO_MASK, POWER6, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4786
{"subf", XO(31,40,0,0), XO_MASK, PPC, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4787
{"sub", XO(31,40,0,0), XO_MASK, PPC, 0, {RT, RB, RA}},
arch/powerpc/xmon/ppc-opc.c
4788
{"subf.", XO(31,40,0,1), XO_MASK, PPC, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4789
{"sub.", XO(31,40,0,1), XO_MASK, PPC, 0, {RT, RB, RA}},
arch/powerpc/xmon/ppc-opc.c
4835
{"mulhd", XO(31,73,0,0), XO_MASK, PPC64, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4836
{"mulhd.", XO(31,73,0,1), XO_MASK, PPC64, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4838
{"mulhw", XO(31,75,0,0), XO_MASK, PPC, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4839
{"mulhw.", XO(31,75,0,1), XO_MASK, PPC, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4865
{"mul", XO(31,107,0,0), XO_MASK, M601, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4866
{"mul.", XO(31,107,0,1), XO_MASK, M601, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4900
{"subfe", XO(31,136,0,0), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4901
{"sfe", XO(31,136,0,0), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4902
{"subfe.", XO(31,136,0,1), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4903
{"sfe.", XO(31,136,0,1), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4905
{"adde", XO(31,138,0,0), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4906
{"ae", XO(31,138,0,0), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4907
{"adde.", XO(31,138,0,1), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
4908
{"ae.", XO(31,138,0,1), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5029
{"mulld", XO(31,233,0,0), XO_MASK, PPC64, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5030
{"mulld.", XO(31,233,0,1), XO_MASK, PPC64, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5037
{"mullw", XO(31,235,0,0), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5038
{"muls", XO(31,235,0,0), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5039
{"mullw.", XO(31,235,0,1), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5040
{"muls.", XO(31,235,0,1), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5075
{"doz", XO(31,264,0,0), XO_MASK, M601, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5076
{"doz.", XO(31,264,0,1), XO_MASK, M601, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5080
{"add", XO(31,266,0,0), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5081
{"cax", XO(31,266,0,0), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5082
{"add.", XO(31,266,0,1), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5083
{"cax.", XO(31,266,0,1), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5186
{"div", XO(31,331,0,0), XO_MASK, M601, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5187
{"div.", XO(31,331,0,1), XO_MASK, M601, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5409
{"divs", XO(31,363,0,0), XO_MASK, M601, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5410
{"divs.", XO(31,363,0,1), XO_MASK, M601, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5436
{"divdeu", XO(31,393,0,0), XO_MASK, POWER7|PPCA2, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5437
{"divdeu.", XO(31,393,0,1), XO_MASK, POWER7|PPCA2, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5438
{"divweu", XO(31,395,0,0), XO_MASK, POWER7|PPCA2, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5439
{"divweu.", XO(31,395,0,1), XO_MASK, POWER7|PPCA2, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5468
{"divde", XO(31,425,0,0), XO_MASK, POWER7|PPCA2, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5469
{"divde.", XO(31,425,0,1), XO_MASK, POWER7|PPCA2, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5470
{"divwe", XO(31,427,0,0), XO_MASK, POWER7|PPCA2, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5471
{"divwe.", XO(31,427,0,1), XO_MASK, POWER7|PPCA2, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5541
{"divdu", XO(31,457,0,0), XO_MASK, PPC64, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5542
{"divdu.", XO(31,457,0,1), XO_MASK, PPC64, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5544
{"divwu", XO(31,459,0,0), XO_MASK, PPC, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5545
{"divwu.", XO(31,459,0,1), XO_MASK, PPC, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5734
{"divd", XO(31,489,0,0), XO_MASK, PPC64, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5735
{"divd.", XO(31,489,0,1), XO_MASK, PPC64, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5737
{"divw", XO(31,491,0,0), XO_MASK, PPC, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5738
{"divw.", XO(31,491,0,1), XO_MASK, PPC, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5761
{"subfco", XO(31,8,1,0), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5762
{"sfo", XO(31,8,1,0), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5763
{"subco", XO(31,8,1,0), XO_MASK, PPCCOM, 0, {RT, RB, RA}},
arch/powerpc/xmon/ppc-opc.c
5764
{"subfco.", XO(31,8,1,1), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5765
{"sfo.", XO(31,8,1,1), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5766
{"subco.", XO(31,8,1,1), XO_MASK, PPCCOM, 0, {RT, RB, RA}},
arch/powerpc/xmon/ppc-opc.c
5768
{"addco", XO(31,10,1,0), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5769
{"ao", XO(31,10,1,0), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5770
{"addco.", XO(31,10,1,1), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5771
{"ao.", XO(31,10,1,1), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5814
{"subfo", XO(31,40,1,0), XO_MASK, PPC, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5815
{"subo", XO(31,40,1,0), XO_MASK, PPC, 0, {RT, RB, RA}},
arch/powerpc/xmon/ppc-opc.c
5816
{"subfo.", XO(31,40,1,1), XO_MASK, PPC, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5817
{"subo.", XO(31,40,1,1), XO_MASK, PPC, 0, {RT, RB, RA}},
arch/powerpc/xmon/ppc-opc.c
5870
{"mulo", XO(31,107,1,0), XO_MASK, M601, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5871
{"mulo.", XO(31,107,1,1), XO_MASK, M601, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5889
{"subfeo", XO(31,136,1,0), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5890
{"sfeo", XO(31,136,1,0), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5891
{"subfeo.", XO(31,136,1,1), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5892
{"sfeo.", XO(31,136,1,1), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5894
{"addeo", XO(31,138,1,0), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5895
{"aeo", XO(31,138,1,0), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5896
{"addeo.", XO(31,138,1,1), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5897
{"aeo.", XO(31,138,1,1), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5987
{"mulldo", XO(31,233,1,0), XO_MASK, PPC64, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5988
{"mulldo.", XO(31,233,1,1), XO_MASK, PPC64, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5995
{"mullwo", XO(31,235,1,0), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5996
{"mulso", XO(31,235,1,0), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5997
{"mullwo.", XO(31,235,1,1), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
5998
{"mulso.", XO(31,235,1,1), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6022
{"dozo", XO(31,264,1,0), XO_MASK, M601, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6023
{"dozo.", XO(31,264,1,1), XO_MASK, M601, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6025
{"addo", XO(31,266,1,0), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6026
{"caxo", XO(31,266,1,0), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6027
{"addo.", XO(31,266,1,1), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6028
{"caxo.", XO(31,266,1,1), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6088
{"divo", XO(31,331,1,0), XO_MASK, M601, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6089
{"divo.", XO(31,331,1,1), XO_MASK, M601, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6116
{"divso", XO(31,363,1,0), XO_MASK, M601, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6117
{"divso.", XO(31,363,1,1), XO_MASK, M601, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6139
{"divdeuo", XO(31,393,1,0), XO_MASK, POWER7|PPCA2, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6140
{"divdeuo.", XO(31,393,1,1), XO_MASK, POWER7|PPCA2, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6141
{"divweuo", XO(31,395,1,0), XO_MASK, POWER7|PPCA2, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6142
{"divweuo.", XO(31,395,1,1), XO_MASK, POWER7|PPCA2, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6183
{"divdeo", XO(31,425,1,0), XO_MASK, POWER7|PPCA2, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6184
{"divdeo.", XO(31,425,1,1), XO_MASK, POWER7|PPCA2, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6185
{"divweo", XO(31,427,1,0), XO_MASK, POWER7|PPCA2, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6186
{"divweo.", XO(31,427,1,1), XO_MASK, POWER7|PPCA2, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6215
{"divduo", XO(31,457,1,0), XO_MASK, PPC64, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6216
{"divduo.", XO(31,457,1,1), XO_MASK, PPC64, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6218
{"divwuo", XO(31,459,1,0), XO_MASK, PPC, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6219
{"divwuo.", XO(31,459,1,1), XO_MASK, PPC, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6249
{"divdo", XO(31,489,1,0), XO_MASK, PPC64, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6250
{"divdo.", XO(31,489,1,1), XO_MASK, PPC64, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6252
{"divwo", XO(31,491,1,0), XO_MASK, PPC, 0, {RT, RA, RB}},
arch/powerpc/xmon/ppc-opc.c
6253
{"divwo.", XO(31,491,1,1), XO_MASK, PPC, 0, {RT, RA, RB}},