arch/x86/events/amd/core.c

309

static unsigned int event_offsets[X86_PMC_IDX_MAX] __read_mostly;

arch/x86/events/amd/core.c

310

static unsigned int count_offsets[X86_PMC_IDX_MAX] __read_mostly;

arch/x86/events/amd/core.c

439

for_each_set_bit(i, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) {

arch/x86/events/amd/core.c

551

for_each_set_bit(i, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) {

arch/x86/events/amd/core.c

744

for_each_set_bit(idx, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) {

arch/x86/events/amd/core.c

762

for_each_set_bit(idx, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) {

arch/x86/events/amd/core.c

997

for_each_set_bit(idx, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) {

arch/x86/events/core.c

1026

for (i = 0, wmin = X86_PMC_IDX_MAX, wmax = 0; i < n; i++) {

arch/x86/events/core.c

1401

DEFINE_PER_CPU(u64 [X86_PMC_IDX_MAX], pmc_prev_left);

arch/x86/events/core.c

1483

int assign[X86_PMC_IDX_MAX];

arch/x86/events/core.c

1602

for_each_set_bit(idx, cntr_mask, X86_PMC_IDX_MAX) {

arch/x86/events/core.c

1615

for_each_set_bit(idx, fixed_cntr_mask, X86_PMC_IDX_MAX) {

arch/x86/events/core.c

1729

for_each_set_bit(idx, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) {

arch/x86/events/core.c

224

for_each_set_bit(i, (unsigned long *)&cntr_mask, X86_PMC_IDX_MAX) {

arch/x86/events/core.c

229

for_each_set_bit(i, (unsigned long *)&cntr_mask, X86_PMC_IDX_MAX) {

arch/x86/events/core.c

2350

int assign[X86_PMC_IDX_MAX];

arch/x86/events/core.c

240

i = X86_PMC_IDX_MAX;

arch/x86/events/core.c

255

for_each_set_bit(i, (unsigned long *)&cntr_mask, X86_PMC_IDX_MAX) {

arch/x86/events/core.c

2557

if (bitmap_empty(cpuc->dirty, X86_PMC_IDX_MAX))

arch/x86/events/core.c

2560

for_each_set_bit(i, cpuc->dirty, X86_PMC_IDX_MAX) {

arch/x86/events/core.c

2572

bitmap_zero(cpuc->dirty, X86_PMC_IDX_MAX);

arch/x86/events/core.c

280

for_each_set_bit(i, cntr_mask, X86_PMC_IDX_MAX) {

arch/x86/events/core.c

299

for_each_set_bit(i, fixed_cntr_mask, X86_PMC_IDX_MAX) {

arch/x86/events/core.c

710

for_each_set_bit(idx, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) {

arch/x86/events/core.c

767

for_each_set_bit(idx, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) {

arch/x86/events/core.c

905

for_each_set_bit_from(idx, c->idxmsk, X86_PMC_IDX_MAX) {

arch/x86/events/intel/core.c

3626

for_each_set_bit(bit, (unsigned long *)&event->attr.config2, X86_PMC_IDX_MAX) {

arch/x86/events/intel/core.c

3767

for_each_set_bit(bit, (unsigned long *)&guest_pebs_idxs, X86_PMC_IDX_MAX) {

arch/x86/events/intel/core.c

3889

for_each_set_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) {

arch/x86/events/intel/core.c

4459

for_each_set_bit(i, c->idxmsk, X86_PMC_IDX_MAX) {

arch/x86/events/intel/core.c

4511

bitmap_copy(c1->idxmsk, c2->idxmsk, X86_PMC_IDX_MAX);

arch/x86/events/intel/core.c

5361

for_each_set_bit(idx, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) {

arch/x86/events/intel/core.c

5394

for_each_set_bit(idx, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) {

arch/x86/events/intel/core.c

5896

size_t sz = X86_PMC_IDX_MAX * sizeof(struct event_constraint);

arch/x86/events/intel/ds.c

1810

if (WARN_ON(event->hw.idx < 0 || event->hw.idx >= X86_PMC_IDX_MAX))

arch/x86/events/intel/ds.c

3011

for_each_set_bit(bit, (unsigned long *)&pebs_enabled, X86_PMC_IDX_MAX) {

arch/x86/events/intel/ds.c

3146

for_each_set_bit(bit, (unsigned long *)&pebs_status, X86_PMC_IDX_MAX) {

arch/x86/events/intel/ds.c

3173

for_each_set_bit(bit, (unsigned long *)&mask, X86_PMC_IDX_MAX) {

arch/x86/events/intel/ds.c

3250

intel_pmu_pebs_event_update_no_drain(cpuc, X86_PMC_IDX_MAX);

arch/x86/events/intel/knc.c

243

for_each_set_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) {

arch/x86/events/intel/lbr.c

954

int i, j, pos = 0, order[X86_PMC_IDX_MAX];

arch/x86/events/intel/p4.c

1003

for_each_set_bit(idx, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) {

arch/x86/events/intel/p4.c

1045

for_each_set_bit(idx, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) {

arch/x86/events/intel/p4.c

1243

unsigned long used_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];

arch/x86/events/intel/p4.c

1253

bitmap_zero(used_mask, X86_PMC_IDX_MAX);

arch/x86/events/intel/p4.c

1399

for_each_set_bit(i, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) {

arch/x86/events/intel/p4.c

924

for_each_set_bit(idx, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) {

arch/x86/events/intel/p4.c

988

static DEFINE_PER_CPU(unsigned long [BITS_TO_LONGS(X86_PMC_IDX_MAX)], p4_running);

arch/x86/events/perf_event.h

1191

DECLARE_PER_CPU(u64 [X86_PMC_IDX_MAX], pmc_prev_left);

arch/x86/events/perf_event.h

153

struct perf_event *owners[X86_PMC_IDX_MAX];

arch/x86/events/perf_event.h

154

struct event_constraint event_constraints[X86_PMC_IDX_MAX];

arch/x86/events/perf_event.h

236

enum intel_excl_state_type state[X86_PMC_IDX_MAX];

arch/x86/events/perf_event.h

279

struct perf_event *events[X86_PMC_IDX_MAX]; /* in counter order */

arch/x86/events/perf_event.h

280

unsigned long active_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];

arch/x86/events/perf_event.h

281

unsigned long dirty[BITS_TO_LONGS(X86_PMC_IDX_MAX)];

arch/x86/events/perf_event.h

291

int assign[X86_PMC_IDX_MAX]; /* event to counter assignment */

arch/x86/events/perf_event.h

292

u64 tags[X86_PMC_IDX_MAX];

arch/x86/events/perf_event.h

294

struct perf_event *event_list[X86_PMC_IDX_MAX]; /* in enabled order */

arch/x86/events/perf_event.h

295

struct event_constraint *event_constraint[X86_PMC_IDX_MAX];

arch/x86/events/perf_event.h

326

u64 acr_cfg_b[X86_PMC_IDX_MAX];

arch/x86/events/perf_event.h

327

u64 cfg_c_val[X86_PMC_IDX_MAX];

arch/x86/events/perf_event.h

352

struct perf_guest_switch_msr guest_switch_msrs[X86_PMC_IDX_MAX];

arch/x86/events/perf_event.h

58

unsigned long idxmsk[BITS_TO_LONGS(X86_PMC_IDX_MAX)];

arch/x86/events/perf_event.h

750

unsigned long cntr_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];

arch/x86/events/perf_event.h

754

unsigned long fixed_cntr_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];

arch/x86/events/perf_event.h

759

unsigned long acr_cntr_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];

arch/x86/events/perf_event.h

763

unsigned long acr_cause_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];

arch/x86/events/perf_event.h

863

unsigned long cntr_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];

arch/x86/events/perf_event.h

867

unsigned long fixed_cntr_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];

arch/x86/events/perf_event.h

871

unsigned long acr_cntr_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];

arch/x86/events/perf_event.h

875

unsigned long acr_cause_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];

arch/x86/events/zhaoxin/core.c

388

for_each_set_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) {

arch/x86/include/asm/kvm_host.h

606

DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX);

arch/x86/include/asm/kvm_host.h

609

DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX);

arch/x86/include/asm/kvm_host.h

610

DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX);

arch/x86/include/asm/kvm_host.h

612

DECLARE_BITMAP(pmc_counting_instructions, X86_PMC_IDX_MAX);

arch/x86/include/asm/kvm_host.h

613

DECLARE_BITMAP(pmc_counting_branches, X86_PMC_IDX_MAX);

arch/x86/include/asm/kvm_host.h

615

DECLARE_BITMAP(pmc_has_mode_specific_enables, X86_PMC_IDX_MAX);

arch/x86/kvm/pmu.c

1028

DECLARE_BITMAP(bitmask, X86_PMC_IDX_MAX);

arch/x86/kvm/pmu.c

1034

pmu->pmc_in_use, X86_PMC_IDX_MAX);

arch/x86/kvm/pmu.c

1043

bitmap_zero(pmu->pmc_in_use, X86_PMC_IDX_MAX);

arch/x86/kvm/pmu.c

1122

DECLARE_BITMAP(bitmap, X86_PMC_IDX_MAX);

arch/x86/kvm/pmu.c

1127

BUILD_BUG_ON(sizeof(pmu->global_ctrl) * BITS_PER_BYTE != X86_PMC_IDX_MAX);

arch/x86/kvm/pmu.c

1129

if (bitmap_empty(event_pmcs, X86_PMC_IDX_MAX))

arch/x86/kvm/pmu.c

1133

bitmap_copy(bitmap, event_pmcs, X86_PMC_IDX_MAX);

arch/x86/kvm/pmu.c

1135

(unsigned long *)&pmu->global_ctrl, X86_PMC_IDX_MAX))

arch/x86/kvm/pmu.c

651

DECLARE_BITMAP(bitmap, X86_PMC_IDX_MAX);

arch/x86/kvm/pmu.c

656

bitmap_copy(bitmap, pmu->reprogram_pmi, X86_PMC_IDX_MAX);

arch/x86/kvm/pmu.c

939

bitmap_zero(pmu->reprogram_pmi, X86_PMC_IDX_MAX);

arch/x86/kvm/pmu.c

940

bitmap_zero(pmu->pmc_has_mode_specific_enables, X86_PMC_IDX_MAX);

arch/x86/kvm/pmu.c

989

bitmap_zero(pmu->all_valid_pmc_idx, X86_PMC_IDX_MAX);

arch/x86/kvm/pmu.h

118

for_each_set_bit(i, bitmap, X86_PMC_IDX_MAX) \

arch/x86/kvm/pmu.h

271

X86_PMC_IDX_MAX);