XLGMAC_SET_REG_BITS
pdata->rss_table[i] = XLGMAC_SET_REG_BITS(
pdata->rss_options = XLGMAC_SET_REG_BITS(
pdata->rss_options = XLGMAC_SET_REG_BITS(
pdata->rss_options = XLGMAC_SET_REG_BITS(
pkt_info->attributes = XLGMAC_SET_REG_BITS(
regval = XLGMAC_SET_REG_BITS(regval, MAC_VLANTR_EVLRXS_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_VLANTR_DOVLTC_POS,
regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_RQOMR_EHFC_POS,
regval = XLGMAC_SET_REG_BITS(regval,
regval = XLGMAC_SET_REG_BITS(regval, MAC_VLANTR_ERSVLM_POS,
regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_RQOMR_EHFC_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_Q0TFCR_TFE_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_Q0TFCR_PT_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_VLANTR_ESVL_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_RFCR_RFE_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_RFCR_RFE_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_VLANTR_EVLS_POS,
regval = XLGMAC_SET_REG_BITS(regval, DMA_CH_RIWT_RWT_POS,
regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_RQOMR_FEP_POS,
regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_RQOMR_FUP_POS,
regval = XLGMAC_SET_REG_BITS(regval, DMA_CH_RCR_RBSZ_POS,
regval = XLGMAC_SET_REG_BITS(regval, DMA_CH_TCR_TSE_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_VLANTR_EVLS_POS,
regval = XLGMAC_SET_REG_BITS(regval, DMA_CH_CR_SPH_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_HDSMS_POS,
regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_RQOMR_RTC_POS,
regval = XLGMAC_SET_REG_BITS(regval, MTL_OMR_ETSALG_POS,
regval = XLGMAC_SET_REG_BITS(regval, MTL_TC_ETSCR_TSA_POS,
regval = XLGMAC_SET_REG_BITS(regval, MTL_TC_QWR_QW_POS,
regval = XLGMAC_SET_REG_BITS(regval, MTL_OMR_RAA_POS,
regval = XLGMAC_SET_REG_BITS(regval,
regval = XLGMAC_SET_REG_BITS(regval, MAC_PFR_VTFE_POS,
regval = XLGMAC_SET_REG_BITS(regval,
regval = XLGMAC_SET_REG_BITS(regval, MAC_VLANTR_VTHM_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_VLANTR_VTIM_POS,
regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_TQOMR_TQS_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_VLANTR_ETV_POS,
regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_RQOMR_RQS_POS,
regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_RQFCR_RFA_POS,
regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_RQFCR_RFD_POS,
regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_TQOMR_TTC_POS,
regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_RQOMR_RSF_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_VLANTR_VL_POS,
regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_TQOMR_TSF_POS,
regval = XLGMAC_SET_REG_BITS(regval, DMA_CH_TCR_OSP_POS,
regval = XLGMAC_SET_REG_BITS(regval, DMA_CH_CR_PBLX8_POS,
regval = XLGMAC_SET_REG_BITS(regval, DMA_CH_TCR_PBL_POS,
regval = XLGMAC_SET_REG_BITS(regval, DMA_CH_RCR_PBL_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_PFR_VTFE_POS,
regval = XLGMAC_SET_REG_BITS(regval, MMC_CR_MCF_POS,
regval = XLGMAC_SET_REG_BITS(regval, MMC_CR_MCF_POS,
regval = XLGMAC_SET_REG_BITS(regval, MMC_CR_ROR_POS,
regval = XLGMAC_SET_REG_BITS(regval, MMC_CR_CR_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_RSSAR_RSSIA_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_RSSAR_ADDRT_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_RSSAR_CT_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_RSSAR_OB_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_VLANHTR_VLHT_POS,
pdata->rss_table[i] = XLGMAC_SET_REG_BITS(
regval = XLGMAC_SET_REG_BITS(regval, MAC_RSSCR_RSSE_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_RSSCR_RSSE_POS,
dma_ch_ier = XLGMAC_SET_REG_BITS(dma_ch_ier,
dma_ch_ier = XLGMAC_SET_REG_BITS(dma_ch_ier,
dma_ch_ier = XLGMAC_SET_REG_BITS(dma_ch_ier,
dma_ch_ier = XLGMAC_SET_REG_BITS(
dma_ch_ier = XLGMAC_SET_REG_BITS(
dma_ch_ier = XLGMAC_SET_REG_BITS(
mac_ier = XLGMAC_SET_REG_BITS(mac_ier, MAC_IER_TSIE_POS,
regval = XLGMAC_SET_REG_BITS(regval, MMC_RIER_ALL_INTERRUPTS_POS,
regval = XLGMAC_SET_REG_BITS(regval, MMC_TIER_ALL_INTERRUPTS_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_TCR_SS_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_TCR_SS_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_PFR_PR_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_TCR_SS_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_TCR_SS_POS,
pkt_info->attributes = XLGMAC_SET_REG_BITS(
pkt_info->attributes = XLGMAC_SET_REG_BITS(
pkt_info->attributes = XLGMAC_SET_REG_BITS(
pkt_info->attributes = XLGMAC_SET_REG_BITS(
pkt_info->attributes = XLGMAC_SET_REG_BITS(
pkt_info->attributes = XLGMAC_SET_REG_BITS(
pkt_info->attributes = XLGMAC_SET_REG_BITS(
pkt_info->attributes = XLGMAC_SET_REG_BITS(
pkt_info->attributes = XLGMAC_SET_REG_BITS(
pkt_info->attributes = XLGMAC_SET_REG_BITS(
pkt_info->errors = XLGMAC_SET_REG_BITS(
dma_ch_ier = XLGMAC_SET_REG_BITS(
dma_ch_ier = XLGMAC_SET_REG_BITS(
dma_ch_ier = XLGMAC_SET_REG_BITS(
dma_ch_ier = XLGMAC_SET_REG_BITS(
dma_ch_ier = XLGMAC_SET_REG_BITS(
dma_ch_ier = XLGMAC_SET_REG_BITS(
dma_ch_ier = XLGMAC_SET_REG_BITS(
dma_ch_ier = XLGMAC_SET_REG_BITS(
dma_ch_ier = XLGMAC_SET_REG_BITS(
regval = XLGMAC_SET_REG_BITS(regval, MAC_PFR_PM_POS,
dma_ch_ier = XLGMAC_SET_REG_BITS(
dma_ch_ier = XLGMAC_SET_REG_BITS(
dma_ch_ier = XLGMAC_SET_REG_BITS(
dma_ch_ier = XLGMAC_SET_REG_BITS(
dma_ch_ier = XLGMAC_SET_REG_BITS(
dma_ch_ier = XLGMAC_SET_REG_BITS(
dma_ch_ier = XLGMAC_SET_REG_BITS(
dma_ch_ier = XLGMAC_SET_REG_BITS(
dma_ch_ier = XLGMAC_SET_REG_BITS(
regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_TQOMR_FTQ_POS,
regval = XLGMAC_SET_REG_BITS(regval, DMA_SBMR_EAME_POS,
regval = XLGMAC_SET_REG_BITS(regval, DMA_SBMR_UNDEF_POS,
regval = XLGMAC_SET_REG_BITS(regval, DMA_SBMR_BLEN_256_POS,
regval = XLGMAC_SET_REG_BITS(regval, DMA_MR_SWR_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_PFR_HPF_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_PFR_HUC_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_PFR_HMC_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_JE_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_IPC_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_VLANIR_CSVL_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_VLANIR_VLTI_POS,
regval = XLGMAC_SET_REG_BITS(regval, DMA_CH_TCR_ST_POS,
regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_TQOMR_TXQEN_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_TCR_TE_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_IPC_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_TCR_TE_POS,
regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_TQOMR_TXQEN_POS,
regval = XLGMAC_SET_REG_BITS(regval, DMA_CH_TCR_ST_POS,
regval = XLGMAC_SET_REG_BITS(regval, DMA_CH_RCR_SR_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_DCRCC_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_CST_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_ACS_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_RE_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_DCRCC_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_CST_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_ACS_POS,
regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_RE_POS,
regval = XLGMAC_SET_REG_BITS(regval, DMA_CH_RCR_SR_POS,
mac_addr_hi = XLGMAC_SET_REG_BITS(mac_addr_hi,
pkt_info->attributes = XLGMAC_SET_REG_BITS(
pkt_info->attributes = XLGMAC_SET_REG_BITS(
pkt_info->attributes = XLGMAC_SET_REG_BITS(
pkt_info->attributes = XLGMAC_SET_REG_BITS(