X86_CR4_PAE
| X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
__visible unsigned long mmu_cr4_features __ro_after_init = X86_CR4_PAE;
#define KVM_MMU_CR4_ROLE_BITS (X86_CR4_PSE | X86_CR4_PAE | X86_CR4_LA57 | \
BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pae, X86_CR4_PAE);
#define X86_CR4_TLBFLUSH_BITS (X86_CR4_PGE | X86_CR4_PCIDE | X86_CR4_PAE | X86_CR4_SMEP)
#define X86_CR4_PDPTR_BITS (X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_SMEP)
return kvm_is_cr4_bit_set(vcpu, X86_CR4_PAE);
if (cr4 & X86_CR4_PAE)
kvm_set_cr4(vcpu, cr4 & ~X86_CR4_PAE);
if (CC(!(save->cr4 & X86_CR4_PAE)) ||
cr4 |= X86_CR4_PAE;
if (CC(!(vmcs12->host_cr4 & X86_CR4_PAE)))
if (CC(ia32e && !(vmcs12->guest_cr4 & X86_CR4_PAE)) ||
#define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE)
#define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE)
hw_cr4 &= ~X86_CR4_PAE;
} else if (!(cr4 & X86_CR4_PAE)) {
hw_cr4 &= ~X86_CR4_PAE;
cr4_fixed1_update(X86_CR4_PAE, edx, feature_bit(PAE));
if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
else if (((cr4 ^ old_cr4) & X86_CR4_PAE) ||
if (!(cr4 & X86_CR4_PAE))
} else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
sregs.cr4 |= X86_CR4_PAE | X86_CR4_OSFXSR;
X86_CR4_DE | X86_CR4_PSE | X86_CR4_PAE | \
__u64 pae_disabled = *cr4 & ~X86_CR4_PAE;
TEST_ASSERT((run->s.regs.sregs.cr4 & X86_CR4_PAE) &&
!!(run->s.regs.sregs.cr4 & X86_CR4_PAE),