XILINX_DMA_REG_DMASR
return xilinx_dma_poll_timeout(chan, XILINX_DMA_REG_DMASR, val,
return xilinx_dma_poll_timeout(chan, XILINX_DMA_REG_DMASR, val,
err = xilinx_dma_poll_timeout(chan, XILINX_DMA_REG_DMASR, val,
chan, dma_ctrl_read(chan, XILINX_DMA_REG_DMASR));
dma_ctrl_read(chan, XILINX_DMA_REG_DMASR));
status = dma_ctrl_read(chan, XILINX_DMA_REG_DMASR);
dma_ctrl_write(chan, XILINX_DMA_REG_DMASR,
dma_ctrl_write(chan, XILINX_DMA_REG_DMASR,
XILINX_DMA_REG_DMASR));
dma_ctrl_read(chan, XILINX_DMA_REG_DMASR) &