Symbol: X2APIC_MSR
arch/x86/kvm/svm/avic.c
141
svm_set_intercept_for_msr(vcpu, X2APIC_MSR(APIC_TASKPRI), MSR_TYPE_W, intercept);
arch/x86/kvm/svm/avic.c
142
svm_set_intercept_for_msr(vcpu, X2APIC_MSR(APIC_EOI), MSR_TYPE_W, intercept);
arch/x86/kvm/svm/avic.c
143
svm_set_intercept_for_msr(vcpu, X2APIC_MSR(APIC_SELF_IPI), MSR_TYPE_W, intercept);
arch/x86/kvm/svm/avic.c
144
svm_set_intercept_for_msr(vcpu, X2APIC_MSR(APIC_ICR), MSR_TYPE_W, intercept);
arch/x86/kvm/vmx/nested.c
793
X2APIC_MSR(APIC_TASKPRI),
arch/x86/kvm/vmx/nested.c
799
X2APIC_MSR(APIC_EOI),
arch/x86/kvm/vmx/nested.c
803
X2APIC_MSR(APIC_SELF_IPI),
arch/x86/kvm/vmx/tdx.c
2191
case X2APIC_MSR(APIC_ID):
arch/x86/kvm/vmx/tdx.c
2192
case X2APIC_MSR(APIC_LVR):
arch/x86/kvm/vmx/tdx.c
2193
case X2APIC_MSR(APIC_LDR):
arch/x86/kvm/vmx/tdx.c
2194
case X2APIC_MSR(APIC_SPIV):
arch/x86/kvm/vmx/tdx.c
2195
case X2APIC_MSR(APIC_ESR):
arch/x86/kvm/vmx/tdx.c
2196
case X2APIC_MSR(APIC_LVTCMCI):
arch/x86/kvm/vmx/tdx.c
2197
case X2APIC_MSR(APIC_ICR):
arch/x86/kvm/vmx/tdx.c
2198
case X2APIC_MSR(APIC_LVTT):
arch/x86/kvm/vmx/tdx.c
2199
case X2APIC_MSR(APIC_LVTTHMR):
arch/x86/kvm/vmx/tdx.c
2200
case X2APIC_MSR(APIC_LVTPC):
arch/x86/kvm/vmx/tdx.c
2201
case X2APIC_MSR(APIC_LVT0):
arch/x86/kvm/vmx/tdx.c
2202
case X2APIC_MSR(APIC_LVT1):
arch/x86/kvm/vmx/tdx.c
2203
case X2APIC_MSR(APIC_LVTERR):
arch/x86/kvm/vmx/tdx.c
2204
case X2APIC_MSR(APIC_TMICT):
arch/x86/kvm/vmx/tdx.c
2205
case X2APIC_MSR(APIC_TMCCT):
arch/x86/kvm/vmx/tdx.c
2206
case X2APIC_MSR(APIC_TDCR):
arch/x86/kvm/vmx/vmx.c
4182
vmx_set_intercept_for_msr(vcpu, X2APIC_MSR(APIC_TASKPRI), MSR_TYPE_RW,
arch/x86/kvm/vmx/vmx.c
4186
vmx_disable_intercept_for_msr(vcpu, X2APIC_MSR(APIC_EOI), MSR_TYPE_W);
arch/x86/kvm/vmx/vmx.c
4187
vmx_disable_intercept_for_msr(vcpu, X2APIC_MSR(APIC_SELF_IPI), MSR_TYPE_W);
arch/x86/kvm/vmx/vmx.c
4189
vmx_disable_intercept_for_msr(vcpu, X2APIC_MSR(APIC_ICR), MSR_TYPE_RW);