BP_ABS_FUNC
return base + (BP_ABS_FUNC(bp)) * stride;
int func = BP_ABS_FUNC(bp);
int func = BP_ABS_FUNC(bp);
int func = BP_ABS_FUNC(bp);
tmp = BP_ABS_FUNC(bp);
u8 func = BP_ABS_FUNC(bp);
int /*abs*/func = BP_ABS_FUNC(bp);
DP(BNX2X_MSG_SP, "Cleanup after FLR PF[%d]\n", BP_ABS_FUNC(bp));
u32 func = BP_ABS_FUNC(bp);
int func = BP_ABS_FUNC(bp);
u32 bit = MFW_DRV_IND_READ_DONE_OFFSET((BP_ABS_FUNC(bp) >> 1));
func_mf_config[BP_ABS_FUNC(bp)].config);
DP(NETIF_MSG_HW, "starting common init func %d\n", BP_ABS_FUNC(bp));
if (abs_func_id == BP_ABS_FUNC(bp)) {
bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
1 << BP_ABS_FUNC(bp));
BP_ABS_FUNC(bp), load_code);
DP(BNX2X_MSG_SP, "function %d reset_phase %x\n", BP_ABS_FUNC(bp),
bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
val |= (BP_ABS_FUNC(bp) >> 1) << IGU_VF_CONF_PARENT_SHIFT;
bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
(u16)(BP_ABS_FUNC((bp)) | (1<<3) | ((u16)(abs_vfid) << 4))