WRITE_RPS0
WRITE_RPS0(CMD_PAUSE | CMD_OAN | CMD_SIG0 | o_wait);
WRITE_RPS0(CMD_PAUSE | CMD_OAN | CMD_SIG0 | e_wait);
WRITE_RPS0(CMD_WR_REG | (1 << 8) | (MC2/4));
WRITE_RPS0(MASK_27 | MASK_11);
WRITE_RPS0(CMD_WR_REG_MASK | (MC1/4));
WRITE_RPS0(MASK_06 | MASK_22); /* => mask */
WRITE_RPS0(MASK_06 | MASK_22); /* => values */
WRITE_RPS0(CMD_WR_REG_MASK | (MC1/4));
WRITE_RPS0(MASK_05 | MASK_21); /* => mask */
WRITE_RPS0(MASK_05 | MASK_21); /* => values */
WRITE_RPS0(CMD_WR_REG_MASK | (MC1/4));
WRITE_RPS0(MASK_04 | MASK_20); /* => mask */
WRITE_RPS0(MASK_04 | MASK_20); /* => values */
WRITE_RPS0(CMD_PAUSE | o_wait);
WRITE_RPS0(CMD_PAUSE | e_wait);
WRITE_RPS0(CMD_PAUSE | (vv->current_hps_sync == SAA7146_HPS_SYNC_PORT_A ? MASK_10 : MASK_09));
WRITE_RPS0(CMD_PAUSE | o_wait);
WRITE_RPS0(CMD_PAUSE | (vv->current_hps_sync == SAA7146_HPS_SYNC_PORT_A ? MASK_10 : MASK_09));
WRITE_RPS0(CMD_PAUSE | e_wait);
WRITE_RPS0(CMD_WR_REG_MASK | (MC1/4));
WRITE_RPS0(MASK_22 | MASK_06); /* => mask */
WRITE_RPS0(MASK_22); /* => values */
WRITE_RPS0(CMD_WR_REG_MASK | (MC1/4));
WRITE_RPS0(MASK_05 | MASK_21); /* => mask */
WRITE_RPS0(MASK_21); /* => values */
WRITE_RPS0(CMD_WR_REG_MASK | (MC1/4));
WRITE_RPS0(MASK_04 | MASK_20); /* => mask */
WRITE_RPS0(MASK_20); /* => values */
WRITE_RPS0(CMD_INTERRUPT);
WRITE_RPS0(CMD_STOP);