Symbol: XFM_SF
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
180
XFM_SF(OUT_CLAMP_CONTROL_B_CB, OUT_CLAMP_MIN_B_CB, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
181
XFM_SF(OUT_CLAMP_CONTROL_B_CB, OUT_CLAMP_MAX_B_CB, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
182
XFM_SF(OUT_CLAMP_CONTROL_G_Y, OUT_CLAMP_MIN_G_Y, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
183
XFM_SF(OUT_CLAMP_CONTROL_G_Y, OUT_CLAMP_MAX_G_Y, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
184
XFM_SF(OUT_CLAMP_CONTROL_R_CR, OUT_CLAMP_MIN_R_CR, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
185
XFM_SF(OUT_CLAMP_CONTROL_R_CR, OUT_CLAMP_MAX_R_CR, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
186
XFM_SF(OUT_ROUND_CONTROL, OUT_ROUND_TRUNC_MODE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
187
XFM_SF(DCP_SPATIAL_DITHER_CNTL, DCP_SPATIAL_DITHER_EN, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
188
XFM_SF(DCP_SPATIAL_DITHER_CNTL, DCP_SPATIAL_DITHER_MODE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
189
XFM_SF(DCP_SPATIAL_DITHER_CNTL, DCP_SPATIAL_DITHER_DEPTH, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
190
XFM_SF(DCP_SPATIAL_DITHER_CNTL, DCP_FRAME_RANDOM_ENABLE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
191
XFM_SF(DCP_SPATIAL_DITHER_CNTL, DCP_RGB_RANDOM_ENABLE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
192
XFM_SF(DCP_SPATIAL_DITHER_CNTL, DCP_HIGHPASS_RANDOM_ENABLE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
193
XFM_SF(DENORM_CONTROL, DENORM_MODE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
194
XFM_SF(LB_DATA_FORMAT, PIXEL_DEPTH, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
195
XFM_SF(LB_DATA_FORMAT, PIXEL_EXPAN_MODE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
196
XFM_SF(GAMUT_REMAP_C11_C12, GAMUT_REMAP_C11, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
197
XFM_SF(GAMUT_REMAP_C11_C12, GAMUT_REMAP_C12, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
198
XFM_SF(GAMUT_REMAP_C13_C14, GAMUT_REMAP_C13, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
199
XFM_SF(GAMUT_REMAP_C13_C14, GAMUT_REMAP_C14, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
200
XFM_SF(GAMUT_REMAP_C21_C22, GAMUT_REMAP_C21, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
201
XFM_SF(GAMUT_REMAP_C21_C22, GAMUT_REMAP_C22, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
202
XFM_SF(GAMUT_REMAP_C23_C24, GAMUT_REMAP_C23, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
203
XFM_SF(GAMUT_REMAP_C23_C24, GAMUT_REMAP_C24, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
204
XFM_SF(GAMUT_REMAP_C31_C32, GAMUT_REMAP_C31, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
205
XFM_SF(GAMUT_REMAP_C31_C32, GAMUT_REMAP_C32, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
206
XFM_SF(GAMUT_REMAP_C33_C34, GAMUT_REMAP_C33, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
207
XFM_SF(GAMUT_REMAP_C33_C34, GAMUT_REMAP_C34, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
208
XFM_SF(GAMUT_REMAP_CONTROL, GRPH_GAMUT_REMAP_MODE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
209
XFM_SF(OUTPUT_CSC_C11_C12, OUTPUT_CSC_C11, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
210
XFM_SF(OUTPUT_CSC_C11_C12, OUTPUT_CSC_C12, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
211
XFM_SF(OUTPUT_CSC_CONTROL, OUTPUT_CSC_GRPH_MODE, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
212
XFM_SF(REGAMMA_CNTLA_START_CNTL, REGAMMA_CNTLA_EXP_REGION_START, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
213
XFM_SF(REGAMMA_CNTLA_START_CNTL, REGAMMA_CNTLA_EXP_REGION_START_SEGMENT, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
214
XFM_SF(REGAMMA_CNTLA_SLOPE_CNTL, REGAMMA_CNTLA_EXP_REGION_LINEAR_SLOPE, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
215
XFM_SF(REGAMMA_CNTLA_END_CNTL1, REGAMMA_CNTLA_EXP_REGION_END, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
216
XFM_SF(REGAMMA_CNTLA_END_CNTL2, REGAMMA_CNTLA_EXP_REGION_END_BASE, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
217
XFM_SF(REGAMMA_CNTLA_END_CNTL2, REGAMMA_CNTLA_EXP_REGION_END_SLOPE, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
218
XFM_SF(REGAMMA_CNTLA_REGION_0_1, REGAMMA_CNTLA_EXP_REGION0_LUT_OFFSET, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
219
XFM_SF(REGAMMA_CNTLA_REGION_0_1, REGAMMA_CNTLA_EXP_REGION0_NUM_SEGMENTS, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
220
XFM_SF(REGAMMA_CNTLA_REGION_0_1, REGAMMA_CNTLA_EXP_REGION1_LUT_OFFSET, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
221
XFM_SF(REGAMMA_CNTLA_REGION_0_1, REGAMMA_CNTLA_EXP_REGION1_NUM_SEGMENTS, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
222
XFM_SF(REGAMMA_LUT_WRITE_EN_MASK, REGAMMA_LUT_WRITE_EN_MASK, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
223
XFM_SF(REGAMMA_CONTROL, GRPH_REGAMMA_MODE, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
224
XFM_SF(SCL_MODE, SCL_MODE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
225
XFM_SF(SCL_TAP_CONTROL, SCL_H_NUM_OF_TAPS, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
226
XFM_SF(SCL_TAP_CONTROL, SCL_V_NUM_OF_TAPS, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
227
XFM_SF(SCL_CONTROL, SCL_BOUNDARY_MODE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
228
XFM_SF(SCL_BYPASS_CONTROL, SCL_BYPASS_MODE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
229
XFM_SF(EXT_OVERSCAN_LEFT_RIGHT, EXT_OVERSCAN_LEFT, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
230
XFM_SF(EXT_OVERSCAN_LEFT_RIGHT, EXT_OVERSCAN_RIGHT, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
231
XFM_SF(EXT_OVERSCAN_TOP_BOTTOM, EXT_OVERSCAN_TOP, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
232
XFM_SF(EXT_OVERSCAN_TOP_BOTTOM, EXT_OVERSCAN_BOTTOM, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
233
XFM_SF(SCL_COEF_RAM_SELECT, SCL_C_RAM_FILTER_TYPE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
234
XFM_SF(SCL_COEF_RAM_SELECT, SCL_C_RAM_PHASE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
235
XFM_SF(SCL_COEF_RAM_SELECT, SCL_C_RAM_TAP_PAIR_IDX, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
236
XFM_SF(SCL_COEF_RAM_TAP_DATA, SCL_C_RAM_EVEN_TAP_COEF_EN, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
237
XFM_SF(SCL_COEF_RAM_TAP_DATA, SCL_C_RAM_EVEN_TAP_COEF, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
238
XFM_SF(SCL_COEF_RAM_TAP_DATA, SCL_C_RAM_ODD_TAP_COEF_EN, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
239
XFM_SF(SCL_COEF_RAM_TAP_DATA, SCL_C_RAM_ODD_TAP_COEF, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
240
XFM_SF(VIEWPORT_START, VIEWPORT_X_START, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
241
XFM_SF(VIEWPORT_START, VIEWPORT_Y_START, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
242
XFM_SF(VIEWPORT_SIZE, VIEWPORT_HEIGHT, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
243
XFM_SF(VIEWPORT_SIZE, VIEWPORT_WIDTH, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
244
XFM_SF(SCL_HORZ_FILTER_SCALE_RATIO, SCL_H_SCALE_RATIO, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
245
XFM_SF(SCL_VERT_FILTER_SCALE_RATIO, SCL_V_SCALE_RATIO, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
246
XFM_SF(SCL_HORZ_FILTER_INIT, SCL_H_INIT_INT, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
247
XFM_SF(SCL_HORZ_FILTER_INIT, SCL_H_INIT_FRAC, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
248
XFM_SF(SCL_VERT_FILTER_INIT, SCL_V_INIT_INT, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
249
XFM_SF(SCL_VERT_FILTER_INIT, SCL_V_INIT_FRAC, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
250
XFM_SF(LB_MEMORY_CTRL, LB_MEMORY_CONFIG, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
251
XFM_SF(LB_MEMORY_CTRL, LB_MEMORY_SIZE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
252
XFM_SF(SCL_VERT_FILTER_CONTROL, SCL_V_2TAP_HARDCODE_COEF_EN, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
253
XFM_SF(SCL_HORZ_FILTER_CONTROL, SCL_H_2TAP_HARDCODE_COEF_EN, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
254
XFM_SF(SCL_UPDATE, SCL_COEF_UPDATE_COMPLETE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
255
XFM_SF(LB_DATA_FORMAT, ALPHA_EN, mask_sh)
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
265
XFM_SF(DCFE_MEM_PWR_CTRL, SCL_COEFF_MEM_PWR_DIS, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
266
XFM_SF(DCFE_MEM_PWR_STATUS, SCL_COEFF_MEM_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
267
XFM_SF(DCFE_MEM_PWR_CTRL, DCP_REGAMMA_MEM_PWR_DIS, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
268
XFM_SF(DCFE_MEM_PWR_CTRL, DCP_LUT_MEM_PWR_DIS, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
269
XFM_SF(DCFE_MEM_PWR_STATUS, DCP_REGAMMA_MEM_PWR_STATE, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
270
XFM_SF(SCL_MODE, SCL_PSCL_EN, mask_sh)
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
280
XFM_SF(OUT_ROUND_CONTROL, OUT_ROUND_TRUNC_MODE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
281
XFM_SF(DCP_SPATIAL_DITHER_CNTL, DCP_SPATIAL_DITHER_EN, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
282
XFM_SF(DCP_SPATIAL_DITHER_CNTL, DCP_SPATIAL_DITHER_MODE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
283
XFM_SF(DCP_SPATIAL_DITHER_CNTL, DCP_SPATIAL_DITHER_DEPTH, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
284
XFM_SF(DCP_SPATIAL_DITHER_CNTL, DCP_FRAME_RANDOM_ENABLE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
285
XFM_SF(DCP_SPATIAL_DITHER_CNTL, DCP_RGB_RANDOM_ENABLE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
286
XFM_SF(DCP_SPATIAL_DITHER_CNTL, DCP_HIGHPASS_RANDOM_ENABLE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
287
XFM_SF(DENORM_CONTROL, DENORM_MODE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
288
XFM_SF(DATA_FORMAT, INTERLEAVE_EN, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
289
XFM_SF(GAMUT_REMAP_C11_C12, GAMUT_REMAP_C11, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
290
XFM_SF(GAMUT_REMAP_C11_C12, GAMUT_REMAP_C12, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
291
XFM_SF(GAMUT_REMAP_C13_C14, GAMUT_REMAP_C13, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
292
XFM_SF(GAMUT_REMAP_C13_C14, GAMUT_REMAP_C14, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
293
XFM_SF(GAMUT_REMAP_C21_C22, GAMUT_REMAP_C21, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
294
XFM_SF(GAMUT_REMAP_C21_C22, GAMUT_REMAP_C22, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
295
XFM_SF(GAMUT_REMAP_C23_C24, GAMUT_REMAP_C23, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
296
XFM_SF(GAMUT_REMAP_C23_C24, GAMUT_REMAP_C24, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
297
XFM_SF(GAMUT_REMAP_C31_C32, GAMUT_REMAP_C31, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
298
XFM_SF(GAMUT_REMAP_C31_C32, GAMUT_REMAP_C32, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
299
XFM_SF(GAMUT_REMAP_C33_C34, GAMUT_REMAP_C33, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
300
XFM_SF(GAMUT_REMAP_C33_C34, GAMUT_REMAP_C34, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
301
XFM_SF(GAMUT_REMAP_CONTROL, GRPH_GAMUT_REMAP_MODE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
302
XFM_SF(OUTPUT_CSC_C11_C12, OUTPUT_CSC_C11, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
303
XFM_SF(OUTPUT_CSC_C11_C12, OUTPUT_CSC_C12, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
304
XFM_SF(OUTPUT_CSC_CONTROL, OUTPUT_CSC_GRPH_MODE, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
305
XFM_SF(REGAMMA_CNTLA_START_CNTL, REGAMMA_CNTLA_EXP_REGION_START, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
306
XFM_SF(REGAMMA_CNTLA_START_CNTL, REGAMMA_CNTLA_EXP_REGION_START_SEGMENT, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
307
XFM_SF(REGAMMA_CNTLA_SLOPE_CNTL, REGAMMA_CNTLA_EXP_REGION_LINEAR_SLOPE, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
308
XFM_SF(REGAMMA_CNTLA_END_CNTL1, REGAMMA_CNTLA_EXP_REGION_END, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
309
XFM_SF(REGAMMA_CNTLA_END_CNTL2, REGAMMA_CNTLA_EXP_REGION_END_BASE, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
310
XFM_SF(REGAMMA_CNTLA_END_CNTL2, REGAMMA_CNTLA_EXP_REGION_END_SLOPE, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
311
XFM_SF(REGAMMA_CNTLA_REGION_0_1, REGAMMA_CNTLA_EXP_REGION0_LUT_OFFSET, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
312
XFM_SF(REGAMMA_CNTLA_REGION_0_1, REGAMMA_CNTLA_EXP_REGION0_NUM_SEGMENTS, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
313
XFM_SF(REGAMMA_CNTLA_REGION_0_1, REGAMMA_CNTLA_EXP_REGION1_LUT_OFFSET, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
314
XFM_SF(REGAMMA_CNTLA_REGION_0_1, REGAMMA_CNTLA_EXP_REGION1_NUM_SEGMENTS, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
315
XFM_SF(REGAMMA_LUT_WRITE_EN_MASK, REGAMMA_LUT_WRITE_EN_MASK, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
316
XFM_SF(REGAMMA_CONTROL, GRPH_REGAMMA_MODE, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
317
XFM_SF(SCL_TAP_CONTROL, SCL_H_NUM_OF_TAPS, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
318
XFM_SF(SCL_TAP_CONTROL, SCL_V_NUM_OF_TAPS, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
319
XFM_SF(SCL_BYPASS_CONTROL, SCL_BYPASS_MODE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
320
XFM_SF(EXT_OVERSCAN_LEFT_RIGHT, EXT_OVERSCAN_LEFT, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
321
XFM_SF(EXT_OVERSCAN_LEFT_RIGHT, EXT_OVERSCAN_RIGHT, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
322
XFM_SF(EXT_OVERSCAN_TOP_BOTTOM, EXT_OVERSCAN_TOP, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
323
XFM_SF(EXT_OVERSCAN_TOP_BOTTOM, EXT_OVERSCAN_BOTTOM, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
324
XFM_SF(SCL_COEF_RAM_SELECT, SCL_C_RAM_FILTER_TYPE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
325
XFM_SF(SCL_COEF_RAM_SELECT, SCL_C_RAM_PHASE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
326
XFM_SF(SCL_COEF_RAM_SELECT, SCL_C_RAM_TAP_PAIR_IDX, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
327
XFM_SF(SCL_COEF_RAM_TAP_DATA, SCL_C_RAM_EVEN_TAP_COEF_EN, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
328
XFM_SF(SCL_COEF_RAM_TAP_DATA, SCL_C_RAM_EVEN_TAP_COEF, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
329
XFM_SF(SCL_COEF_RAM_TAP_DATA, SCL_C_RAM_ODD_TAP_COEF_EN, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
330
XFM_SF(SCL_COEF_RAM_TAP_DATA, SCL_C_RAM_ODD_TAP_COEF, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
331
XFM_SF(VIEWPORT_START, VIEWPORT_X_START, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
332
XFM_SF(VIEWPORT_START, VIEWPORT_Y_START, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
333
XFM_SF(VIEWPORT_SIZE, VIEWPORT_HEIGHT, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
334
XFM_SF(VIEWPORT_SIZE, VIEWPORT_WIDTH, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
335
XFM_SF(SCL_HORZ_FILTER_SCALE_RATIO, SCL_H_SCALE_RATIO, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
336
XFM_SF(SCL_VERT_FILTER_SCALE_RATIO, SCL_V_SCALE_RATIO, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
337
XFM_SF(SCL_HORZ_FILTER_INIT_RGB_LUMA, SCL_H_INIT_INT_RGB_Y, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
338
XFM_SF(SCL_HORZ_FILTER_INIT_RGB_LUMA, SCL_H_INIT_FRAC_RGB_Y, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
339
XFM_SF(SCL_HORZ_FILTER_INIT_CHROMA, SCL_H_INIT_INT_CBCR, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
340
XFM_SF(SCL_HORZ_FILTER_INIT_CHROMA, SCL_H_INIT_FRAC_CBCR, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
341
XFM_SF(SCL_VERT_FILTER_INIT, SCL_V_INIT_INT, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
342
XFM_SF(SCL_VERT_FILTER_INIT, SCL_V_INIT_FRAC, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
343
XFM_SF(SCL_HORZ_FILTER_CONTROL, SCL_H_FILTER_PICK_NEAREST, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
344
XFM_SF(SCL_VERT_FILTER_CONTROL, SCL_V_FILTER_PICK_NEAREST, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
345
XFM_SF(DC_LB_MEMORY_SPLIT, DC_LB_MEMORY_CONFIG, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
346
XFM_SF(DC_LB_MEM_SIZE, DC_LB_MEM_SIZE, mask_sh)
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
350
XFM_SF(DCP0_OUT_CLAMP_CONTROL_B_CB, OUT_CLAMP_MIN_B_CB, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
351
XFM_SF(DCP0_OUT_CLAMP_CONTROL_B_CB, OUT_CLAMP_MAX_B_CB, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
352
XFM_SF(DCP0_OUT_CLAMP_CONTROL_G_Y, OUT_CLAMP_MIN_G_Y, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
353
XFM_SF(DCP0_OUT_CLAMP_CONTROL_G_Y, OUT_CLAMP_MAX_G_Y, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
354
XFM_SF(DCP0_OUT_CLAMP_CONTROL_R_CR, OUT_CLAMP_MIN_R_CR, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
355
XFM_SF(DCP0_OUT_CLAMP_CONTROL_R_CR, OUT_CLAMP_MAX_R_CR, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
356
XFM_SF(DCP0_OUT_ROUND_CONTROL, OUT_ROUND_TRUNC_MODE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
357
XFM_SF(DCP0_DCP_SPATIAL_DITHER_CNTL, DCP_SPATIAL_DITHER_EN, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
358
XFM_SF(DCP0_DCP_SPATIAL_DITHER_CNTL, DCP_SPATIAL_DITHER_MODE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
359
XFM_SF(DCP0_DCP_SPATIAL_DITHER_CNTL, DCP_SPATIAL_DITHER_DEPTH, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
360
XFM_SF(DCP0_DCP_SPATIAL_DITHER_CNTL, DCP_FRAME_RANDOM_ENABLE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
361
XFM_SF(DCP0_DCP_SPATIAL_DITHER_CNTL, DCP_RGB_RANDOM_ENABLE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
362
XFM_SF(DCP0_DCP_SPATIAL_DITHER_CNTL, DCP_HIGHPASS_RANDOM_ENABLE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
363
XFM_SF(DCP0_DENORM_CONTROL, DENORM_MODE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
364
XFM_SF(LB0_LB_DATA_FORMAT, PIXEL_DEPTH, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
365
XFM_SF(LB0_LB_DATA_FORMAT, PIXEL_EXPAN_MODE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
366
XFM_SF(DCP0_GAMUT_REMAP_C11_C12, GAMUT_REMAP_C11, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
367
XFM_SF(DCP0_GAMUT_REMAP_C11_C12, GAMUT_REMAP_C12, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
368
XFM_SF(DCP0_GAMUT_REMAP_C13_C14, GAMUT_REMAP_C13, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
369
XFM_SF(DCP0_GAMUT_REMAP_C13_C14, GAMUT_REMAP_C14, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
370
XFM_SF(DCP0_GAMUT_REMAP_C21_C22, GAMUT_REMAP_C21, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
371
XFM_SF(DCP0_GAMUT_REMAP_C21_C22, GAMUT_REMAP_C22, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
372
XFM_SF(DCP0_GAMUT_REMAP_C23_C24, GAMUT_REMAP_C23, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
373
XFM_SF(DCP0_GAMUT_REMAP_C23_C24, GAMUT_REMAP_C24, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
374
XFM_SF(DCP0_GAMUT_REMAP_C31_C32, GAMUT_REMAP_C31, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
375
XFM_SF(DCP0_GAMUT_REMAP_C31_C32, GAMUT_REMAP_C32, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
376
XFM_SF(DCP0_GAMUT_REMAP_C33_C34, GAMUT_REMAP_C33, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
377
XFM_SF(DCP0_GAMUT_REMAP_C33_C34, GAMUT_REMAP_C34, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
378
XFM_SF(DCP0_GAMUT_REMAP_CONTROL, GRPH_GAMUT_REMAP_MODE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
379
XFM_SF(DCP0_OUTPUT_CSC_C11_C12, OUTPUT_CSC_C11, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
380
XFM_SF(DCP0_OUTPUT_CSC_C11_C12, OUTPUT_CSC_C12, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
381
XFM_SF(DCP0_OUTPUT_CSC_CONTROL, OUTPUT_CSC_GRPH_MODE, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
382
XFM_SF(DCP0_REGAMMA_CNTLA_START_CNTL, REGAMMA_CNTLA_EXP_REGION_START, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
383
XFM_SF(DCP0_REGAMMA_CNTLA_START_CNTL, REGAMMA_CNTLA_EXP_REGION_START_SEGMENT, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
384
XFM_SF(DCP0_REGAMMA_CNTLA_SLOPE_CNTL, REGAMMA_CNTLA_EXP_REGION_LINEAR_SLOPE, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
385
XFM_SF(DCP0_REGAMMA_CNTLA_END_CNTL1, REGAMMA_CNTLA_EXP_REGION_END, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
386
XFM_SF(DCP0_REGAMMA_CNTLA_END_CNTL2, REGAMMA_CNTLA_EXP_REGION_END_BASE, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
387
XFM_SF(DCP0_REGAMMA_CNTLA_END_CNTL2, REGAMMA_CNTLA_EXP_REGION_END_SLOPE, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
388
XFM_SF(DCP0_REGAMMA_CNTLA_REGION_0_1, REGAMMA_CNTLA_EXP_REGION0_LUT_OFFSET, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
389
XFM_SF(DCP0_REGAMMA_CNTLA_REGION_0_1, REGAMMA_CNTLA_EXP_REGION0_NUM_SEGMENTS, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
390
XFM_SF(DCP0_REGAMMA_CNTLA_REGION_0_1, REGAMMA_CNTLA_EXP_REGION1_LUT_OFFSET, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
391
XFM_SF(DCP0_REGAMMA_CNTLA_REGION_0_1, REGAMMA_CNTLA_EXP_REGION1_NUM_SEGMENTS, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
392
XFM_SF(DCP0_REGAMMA_CONTROL, GRPH_REGAMMA_MODE, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
393
XFM_SF(DCP0_REGAMMA_LUT_WRITE_EN_MASK, REGAMMA_LUT_WRITE_EN_MASK, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
394
XFM_SF(SCL0_SCL_MODE, SCL_MODE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
395
XFM_SF(SCL0_SCL_TAP_CONTROL, SCL_H_NUM_OF_TAPS, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
396
XFM_SF(SCL0_SCL_TAP_CONTROL, SCL_V_NUM_OF_TAPS, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
397
XFM_SF(SCL0_SCL_CONTROL, SCL_BOUNDARY_MODE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
398
XFM_SF(SCL0_SCL_BYPASS_CONTROL, SCL_BYPASS_MODE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
399
XFM_SF(SCL0_EXT_OVERSCAN_LEFT_RIGHT, EXT_OVERSCAN_LEFT, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
400
XFM_SF(SCL0_EXT_OVERSCAN_LEFT_RIGHT, EXT_OVERSCAN_RIGHT, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
401
XFM_SF(SCL0_EXT_OVERSCAN_TOP_BOTTOM, EXT_OVERSCAN_TOP, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
402
XFM_SF(SCL0_EXT_OVERSCAN_TOP_BOTTOM, EXT_OVERSCAN_BOTTOM, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
403
XFM_SF(SCL0_SCL_COEF_RAM_SELECT, SCL_C_RAM_FILTER_TYPE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
404
XFM_SF(SCL0_SCL_COEF_RAM_SELECT, SCL_C_RAM_PHASE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
405
XFM_SF(SCL0_SCL_COEF_RAM_SELECT, SCL_C_RAM_TAP_PAIR_IDX, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
406
XFM_SF(SCL0_SCL_COEF_RAM_TAP_DATA, SCL_C_RAM_EVEN_TAP_COEF_EN, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
407
XFM_SF(SCL0_SCL_COEF_RAM_TAP_DATA, SCL_C_RAM_EVEN_TAP_COEF, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
408
XFM_SF(SCL0_SCL_COEF_RAM_TAP_DATA, SCL_C_RAM_ODD_TAP_COEF_EN, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
409
XFM_SF(SCL0_SCL_COEF_RAM_TAP_DATA, SCL_C_RAM_ODD_TAP_COEF, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
410
XFM_SF(SCL0_VIEWPORT_START, VIEWPORT_X_START, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
411
XFM_SF(SCL0_VIEWPORT_START, VIEWPORT_Y_START, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
412
XFM_SF(SCL0_VIEWPORT_SIZE, VIEWPORT_HEIGHT, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
413
XFM_SF(SCL0_VIEWPORT_SIZE, VIEWPORT_WIDTH, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
414
XFM_SF(SCL0_SCL_HORZ_FILTER_SCALE_RATIO, SCL_H_SCALE_RATIO, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
415
XFM_SF(SCL0_SCL_VERT_FILTER_SCALE_RATIO, SCL_V_SCALE_RATIO, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
416
XFM_SF(SCL0_SCL_HORZ_FILTER_INIT, SCL_H_INIT_INT, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
417
XFM_SF(SCL0_SCL_HORZ_FILTER_INIT, SCL_H_INIT_FRAC, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
418
XFM_SF(SCL0_SCL_VERT_FILTER_INIT, SCL_V_INIT_INT, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
419
XFM_SF(SCL0_SCL_VERT_FILTER_INIT, SCL_V_INIT_FRAC, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
420
XFM_SF(LB0_LB_MEMORY_CTRL, LB_MEMORY_CONFIG, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
421
XFM_SF(LB0_LB_MEMORY_CTRL, LB_MEMORY_SIZE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
422
XFM_SF(SCL0_SCL_VERT_FILTER_CONTROL, SCL_V_2TAP_HARDCODE_COEF_EN, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
423
XFM_SF(SCL0_SCL_HORZ_FILTER_CONTROL, SCL_H_2TAP_HARDCODE_COEF_EN, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
424
XFM_SF(SCL0_SCL_UPDATE, SCL_COEF_UPDATE_COMPLETE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
425
XFM_SF(LB0_LB_DATA_FORMAT, ALPHA_EN, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
426
XFM_SF(DCFE0_DCFE_MEM_PWR_CTRL, SCL_COEFF_MEM_PWR_DIS, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
427
XFM_SF(DCFE0_DCFE_MEM_PWR_CTRL, DCP_REGAMMA_MEM_PWR_DIS, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
428
XFM_SF(DCFE0_DCFE_MEM_PWR_CTRL, DCP_LUT_MEM_PWR_DIS, mask_sh),\
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
429
XFM_SF(DCFE0_DCFE_MEM_PWR_STATUS, SCL_COEFF_MEM_PWR_STATE, mask_sh), \
drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
430
XFM_SF(SCL0_SCL_MODE, SCL_PSCL_EN, mask_sh)