XE_PAGE_SIZE
return ALIGN(stride, XE_PAGE_SIZE);
xe_bo_addr(obj, 0, XE_PAGE_SIZE);
XE_PAGE_SIZE);
for (x = 0; x < size / XE_PAGE_SIZE; x++) {
u64 addr = xe_bo_addr(bo, x * XE_PAGE_SIZE, XE_PAGE_SIZE);
u64 addr = xe_bo_addr(bo, src_idx * XE_PAGE_SIZE, XE_PAGE_SIZE);
*ggtt_ofs += XE_PAGE_SIZE;
*ggtt_ofs += (dst_stride - height) * XE_PAGE_SIZE;
align = XE_PAGE_SIZE;
size = intel_rotation_info_size(&view->rotated) * XE_PAGE_SIZE;
u64 addr = xe_bo_addr(bo, src_idx * XE_PAGE_SIZE, XE_PAGE_SIZE);
u64 addr = xe_bo_addr(bo, src_idx * XE_PAGE_SIZE, XE_PAGE_SIZE);
dpt_size = ALIGN(size / XE_PAGE_SIZE * 8, XE_PAGE_SIZE);
XE_PAGE_SIZE);
pt = xe_bo_create_pin_map(xe, tile, m->q->vm, XE_PAGE_SIZE,
(unsigned long)xe_bo_main_addr(m->q->vm->pt_root[id]->bo, XE_PAGE_SIZE),
(unsigned long)xe_bo_main_addr(m->pt_bo, XE_PAGE_SIZE));
xe_map_wr(xe, &bo->vmap, XE_PAGE_SIZE * (NUM_KERNEL_PDE - 1), u64,
&src_it, XE_PAGE_SIZE, pt->ttm.resource);
retval = xe_map_rd(xe, &bo->vmap, XE_PAGE_SIZE * (NUM_KERNEL_PDE - 1),
emit_copy(gt, bb, src_L0_ofs, dst_L0_ofs, src_L0, XE_PAGE_SIZE);
#define XE_PTE_MASK (XE_PAGE_SIZE - 1)
start += XE_PAGE_SIZE;
start += XE_PAGE_SIZE;
start += XE_PAGE_SIZE;
return ioread64(ggtt->gsm + (offset / XE_PAGE_SIZE));
scratch_pte = xe_bo_addr(ggtt->scratch, 0, XE_PAGE_SIZE) |
start += XE_PAGE_SIZE;
ggtt_size = (gsm_size / 8) * (u64)XE_PAGE_SIZE - ggtt_start;
ggtt->scratch = xe_managed_bo_create_pin_map(xe, ggtt->tile, XE_PAGE_SIZE, flags);
xe_tile_assert(ggtt->tile, IS_ALIGNED(start, XE_PAGE_SIZE));
xe_tile_assert(ggtt->tile, IS_ALIGNED(end, XE_PAGE_SIZE));
return node->base.size / XE_PAGE_SIZE * sizeof(u64);
cur.remaining; xe_res_next(&cur, XE_PAGE_SIZE))
cur.remaining; xe_res_next(&cur, XE_PAGE_SIZE))
u64 alignment = bo->min_align > 0 ? bo->min_align : XE_PAGE_SIZE;
pt->level, (u64)xe_bo_main_addr(pt->bo, XE_PAGE_SIZE));
dma_addr_t offset = xe_bo_main_addr(lmtt->pd->bo, XE_PAGE_SIZE);
pt_addr = xe_bo_main_addr(pt->bo, XE_PAGE_SIZE);
pt_addr = xe_bo_main_addr(pt->bo, XE_PAGE_SIZE);
lmtt_debug(lmtt, "level=%u addr=%#llx\n", level, (u64)xe_bo_main_addr(bo, XE_PAGE_SIZE));
return (NUM_KERNEL_PDE - 2) * XE_PAGE_SIZE;
emit_copy(gt, bb, vram_L0_ofs, sysmem_L0_ofs, vram_L0, XE_PAGE_SIZE);
emit_copy(gt, bb, sysmem_L0_ofs, vram_L0_ofs, vram_L0, XE_PAGE_SIZE);
ofs = map_ofs + XE_PAGE_SIZE * level + vram_offset * 8;
emit_clear(gt, bb, clear_L0_ofs, clear_L0, XE_PAGE_SIZE, clear_vram);
XE_PAGE_SIZE), false);
ofs = ppgtt_ofs * XE_PAGE_SIZE + page_ofs;
(page_ofs / sizeof(u64)) * XE_PAGE_SIZE;
pt_bo->update_index * XE_PAGE_SIZE,
u64 entries = DIV_U64_ROUND_UP(size, XE_PAGE_SIZE);
BUILD_BUG_ON(NUM_PT_SLOTS > SZ_2M/XE_PAGE_SIZE);
BUILD_BUG_ON(NUM_PT_SLOTS * XE_PAGE_SIZE % SZ_64K);
chunk = ALIGN_DOWN(chunk, PAGE_SIZE / XE_PAGE_SIZE);
addr += XE_PAGE_SIZE;
num_entries * XE_PAGE_SIZE,
build_pt_update_batch_sram(m, bb, pt_slot * XE_PAGE_SIZE,
pt29_ofs = xe_bo_size(bo) - 3 * XE_PAGE_SIZE;
map_ofs = (num_entries - num_setup) * XE_PAGE_SIZE;
entry = vm->pt_ops->pte_encode_bo(bo, i * XE_PAGE_SIZE,
m->batch_base_ofs = NUM_PT_SLOTS * XE_PAGE_SIZE;
XE_PAGE_SIZE) {
XE_PAGE_SIZE) {
u64 batch_addr = xe_bo_addr(batch, 0, XE_PAGE_SIZE);
batch_addr = xe_bo_addr(batch, 0, XE_PAGE_SIZE);
XE_PAGE_SIZE);
xe_map_wr(xe, &bo->vmap, map_ofs + XE_PAGE_SIZE * level, u64,
for (i = 0; i < map_ofs / XE_PAGE_SIZE; i++) {
entry = vm->pt_ops->pde_encode_bo(bo, (u64)i * XE_PAGE_SIZE);
xe_map_wr(xe, &bo->vmap, map_ofs + XE_PAGE_SIZE +
m->large_page_copy_pdes = map_ofs + XE_PAGE_SIZE * level +
xe_map_wr(xe, &bo->vmap, map_ofs + XE_PAGE_SIZE * level + 255 * 8, u64,
u64 pt30_ofs = xe_bo_size(bo) - 2 * XE_PAGE_SIZE;
u64 pt31_ofs = xe_bo_size(bo) - XE_PAGE_SIZE;
#define VM_SA_UPDATE_UNIT_SIZE (XE_PAGE_SIZE / NUM_VMUSA_UNIT_PER_PAGE)
(size_t)(map_ofs / XE_PAGE_SIZE - NUM_KERNEL_PDE) *
u32 num_4k_pages = (size + XE_PAGE_SIZE - 1) >> XE_PTE_SHIFT;
u64 ofs = (u64)at_pt * XE_PAGE_SIZE;
ptes = DIV_ROUND_UP(size, XE_PAGE_SIZE);
u64 va = cur_ofs * XE_PAGE_SIZE / 8;
num_pages = DIV_ROUND_UP(size, XE_PAGE_SIZE);
emit_copy(gt, bb, src_L0_ofs, dst_L0_ofs, src_L0, XE_PAGE_SIZE);
config_length = ALIGN(sizeof(u32) * config_length, XE_PAGE_SIZE) / sizeof(u32);
err = allocate_gsc_client_resources(pxp->gt, &pxp->gsc_res, XE_PAGE_SIZE);
#define PXP_BB_SIZE XE_PAGE_SIZE
ptes = DIV_ROUND_UP_ULL(sys_mem_size + ccs_mem_size, XE_PAGE_SIZE);
pde = xe_bo_addr(bo, bo_offset, XE_PAGE_SIZE);
pte = xe_bo_addr(bo, bo_offset, XE_PAGE_SIZE);
args->reserved[0] = xe_bo_main_addr(vm->pt_root[0]->bo, XE_PAGE_SIZE);