Symbol: WM_A
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
508
ranges->writer_wm_sets[0].wm_inst = WM_A;
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c
437
table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A;
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c
351
.wm_inst = WM_A,
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c
388
.wm_inst = WM_A,
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c
476
table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A;
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c
417
.wm_inst = WM_A,
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c
454
.wm_inst = WM_A,
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c
547
table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A;
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c
313
.wm_inst = WM_A,
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c
350
.wm_inst = WM_A,
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c
439
table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A;
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c
279
.wm_inst = WM_A,
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c
316
.wm_inst = WM_A,
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c
405
table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A;
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
785
.wm_inst = WM_A,
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
822
.wm_inst = WM_A,
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
933
table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A;
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c
189
clk_mgr->bw_params->wm_table.nv_entries[WM_A].valid = true;
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c
190
clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.wm_type = WATERMARKS_CLOCK_RANGE;
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c
191
clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_dcfclk = (uint16_t)min_dcfclk_mhz;
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c
192
clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_dcfclk = 0xFFFF;
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c
193
clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_uclk = (uint16_t)min_uclk_mhz;
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c
194
clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_uclk = 0xFFFF;
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c
692
table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A;
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c
709
if (clk_mgr_base->bw_params->wm_table.entries[WM_A].valid == true)
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42b/dcn42b_clk_mgr.c
261
.wm_inst = WM_A,
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42b/dcn42b_clk_mgr.c
298
.wm_inst = WM_A,
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c
1395
ranges.reader_wm_sets[0].wm_inst = WM_A;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c
1400
ranges.writer_wm_sets[0].wm_inst = WM_A;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c
1407
ranges.reader_wm_sets[0].wm_inst = WM_A;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c
1412
ranges.writer_wm_sets[0].wm_inst = WM_A;
drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
2325
table_entry = &bw_params->wm_table.entries[WM_A];
drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
770
.wm_inst = WM_A,
drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
807
.wm_inst = WM_A,
drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
844
.wm_inst = WM_A,
drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
881
.wm_inst = WM_A,
drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
918
.wm_inst = WM_A,
drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
955
.wm_inst = WM_A,
drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
298
if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].valid) {
drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
301
context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us;
drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
302
context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.sr_enter_plus_exit_time_us;
drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
303
context->bw_ctx.dml.soc.sr_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.sr_exit_time_us;
drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
346
context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us;
drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
521
dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us;
drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
675
base->bw_params->wm_table.nv_entries[WM_A].valid = true;
drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
676
base->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us = pstate_latency_us;
drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
677
base->bw_params->wm_table.nv_entries[WM_A].dml_input.sr_exit_time_us = sr_exit_time_us;
drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
678
base->bw_params->wm_table.nv_entries[WM_A].dml_input.sr_enter_plus_exit_time_us = sr_enter_plus_exit_time_us;
drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
679
base->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.wm_type = WATERMARKS_CLOCK_RANGE;
drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
680
base->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_dcfclk = 0;
drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
681
base->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_dcfclk = 0xFFFF;
drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
682
base->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_uclk = min_uclk_mhz;
drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
683
base->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_uclk = 0xFFFF;
drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c
221
.wm_inst = WM_A,
drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c
258
.wm_inst = WM_A,
drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c
463
table_entry = &bw_params->wm_table.entries[WM_A];
drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c
458
if (dc->clk_mgr->bw_params->wm_table.entries[WM_A].valid) {
drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c
459
context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.entries[WM_A].pstate_latency_us;
drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c
460
context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.entries[WM_A].sr_enter_plus_exit_time_us;
drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c
461
context->bw_ctx.dml.soc.sr_exit_time_us = dc->clk_mgr->bw_params->wm_table.entries[WM_A].sr_exit_time_us;
drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c
469
if (dc->clk_mgr->bw_params->wm_table.entries[WM_A].valid) {
drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c
474
context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.entries[WM_A].pstate_latency_us;
drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c
476
dc->clk_mgr->bw_params->wm_table.entries[WM_A].sr_enter_plus_exit_time_us;
drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c
478
dc->clk_mgr->bw_params->wm_table.entries[WM_A].sr_exit_time_us;
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
214
clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].valid = true;
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
215
clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us = pstate_latency_us;
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
216
clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].dml_input.fclk_change_latency_us = fclk_change_latency_us;
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
217
clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].dml_input.sr_exit_time_us = sr_exit_time_us;
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
218
clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].dml_input.sr_enter_plus_exit_time_us = sr_enter_plus_exit_time_us;
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
219
clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.wm_type = WATERMARKS_CLOCK_RANGE;
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
220
clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_dcfclk = min_dcfclk_mhz;
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
221
clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_dcfclk = 0xFFFF;
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
222
clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_uclk = min_uclk_mhz;
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
223
clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_uclk = 0xFFFF;
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
2320
dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us;
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
2358
dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us;
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
2388
context->bw_ctx.dml.soc.fclk_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.fclk_change_latency_us;
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
2549
context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us;
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
2550
context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.sr_enter_plus_exit_time_us;
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
2551
context->bw_ctx.dml.soc.sr_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.sr_exit_time_us;
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
2599
dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us;
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
2604
dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.fclk_change_latency_us;