arch/xtensa/include/asm/initialize_mmu.h

153

movi a5, XCHAL_KIO_BYPASS_VADDR + XCHAL_KIO_TLB_WAY

arch/xtensa/include/asm/io.h

23

#define IOADDR(x) (XCHAL_KIO_BYPASS_VADDR + (x))

arch/xtensa/include/asm/io.h

25

#define PCI_IOBASE ((void __iomem *)XCHAL_KIO_BYPASS_VADDR)

arch/xtensa/include/asm/io.h

40

return (void*)(offset-XCHAL_KIO_PADDR+XCHAL_KIO_BYPASS_VADDR);

arch/xtensa/mm/ioremap.c

29

(va >= XCHAL_KIO_BYPASS_VADDR &&

arch/xtensa/mm/ioremap.c

30

va - XCHAL_KIO_BYPASS_VADDR < XCHAL_KIO_SIZE))

arch/xtensa/mm/mmu.c

115

XCHAL_KIO_BYPASS_VADDR + 6);

arch/xtensa/mm/mmu.c

117

XCHAL_KIO_BYPASS_VADDR + 6);