arch/x86/include/asm/kvm_host.h

141

| X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \

arch/x86/include/asm/tlbflush.h

513

native_write_cr4(cr4 ^ X86_CR4_PGE);

arch/x86/kernel/cpu/cacheinfo.c

681

__write_cr4(saved_cr4 & ~X86_CR4_PGE);

arch/x86/kernel/cpu/mtrr/cyrix.c

144

__write_cr4(cr4 & ~X86_CR4_PGE);

arch/x86/kvm/kvm_cache_regs.h

10

| X86_CR4_OSXMMEXCPT | X86_CR4_PGE | X86_CR4_TSD | X86_CR4_FSGSBASE \

arch/x86/kvm/kvm_cache_regs.h

14

#define X86_CR4_TLBFLUSH_BITS (X86_CR4_PGE | X86_CR4_PCIDE | X86_CR4_PAE | X86_CR4_SMEP)

arch/x86/kvm/kvm_cache_regs.h

15

#define X86_CR4_PDPTR_BITS (X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_SMEP)

arch/x86/kvm/vmx/vmx.c

7979

cr4_fixed1_update(X86_CR4_PGE, edx, feature_bit(PGE));

arch/x86/kvm/x86.c

1354

if (((cr4 ^ old_cr4) & X86_CR4_PGE) ||

arch/x86/mm/init.c

243

cr4_set_bits_and_update_boot(X86_CR4_PGE);

arch/x86/xen/enlighten_pv.c

1079

cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE);

tools/testing/selftests/kvm/x86/set_sregs_test.c

46

X86_CR4_MCE | X86_CR4_PGE | X86_CR4_PCE | \