X16CLK
up->curregs[R4] = PAR_EVEN | X16CLK | SB1;
up->curregs[R4] |= X16CLK;
write_zsreg(uap, 4, X16CLK | SB_MASK);
uap->curregs[R4] = X16CLK | SB1;
uap->curregs[R4] = X16CLK;
uap->curregs[R4] = X16CLK;
up->curregs[R4] = PAR_EVEN | X16CLK | SB1;
up->curregs[R4] = PAR_EVEN | X16CLK | SB1;
up->curregs[R4] |= X16CLK;
X16CLK | SB1, /* write 4 */
zport->regs[4] |= X16CLK;