drivers/clk/xilinx/clk-xlnx-clock-wizard.c

1030

WZRD_CLKFBOUT_H_MASK) >> WZRD_CLKFBOUT_H_SHIFT;

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

1088

WZRD_CLKFBOUT_H_MASK) >> WZRD_CLKFBOUT_H_SHIFT;

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

208

valh = readl(div_addr + 4) >> WZRD_CLKFBOUT_H_SHIFT;

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

261

regval = regh | regh << WZRD_CLKFBOUT_H_SHIFT;

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

470

regval1 = regh | regh << WZRD_CLKFBOUT_H_SHIFT;

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

480

regval1 = regh | regh << WZRD_CLKFBOUT_H_SHIFT;

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

492

regval1 |= edged << WZRD_CLKFBOUT_H_SHIFT;

drivers/clk/xilinx/clk-xlnx-clock-wizard.c

501

regval = regh | regh << WZRD_CLKFBOUT_H_SHIFT;