WUCSR
return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
for (i = MAC_CR; i <= WUCSR; i++) {
WUCSR
ret = lan78xx_write_reg(dev, WUCSR, 0);
ret = lan78xx_read_reg(dev, WUCSR, &buf);
ret = lan78xx_write_reg(dev, WUCSR, buf);
ret = lan78xx_write_reg(dev, WUCSR, 0);
ret = lan78xx_write_reg(dev, WUCSR, temp_wucsr);
ret = lan78xx_write_reg(dev, WUCSR, 0);
ret = lan78xx_write_reg(dev, WUCSR, 0);
ret = lan78xx_write_reg(dev, WUCSR, WUCSR_EEE_TX_WAKE_ |
ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
ret = smsc95xx_read_reg(dev, WUCSR, &val);
ret = smsc95xx_write_reg(dev, WUCSR, val);
ret = smsc95xx_read_reg(dev, WUCSR, &val);
ret = smsc95xx_write_reg(dev, WUCSR, val);
ret = smsc95xx_read_reg(dev, WUCSR, &val);
ret = smsc95xx_write_reg(dev, WUCSR, val);
ret = smsc95xx_read_reg(dev, WUCSR, &val);
ret = smsc95xx_write_reg(dev, WUCSR, val);
ret = smsc95xx_read_reg(dev, WUCSR, &val);
ret = smsc95xx_write_reg(dev, WUCSR, val);