drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1015

WREG32_SDMA(i, mmSDMA0_PHASE0_QUANTUM, phase_quantum);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1016

WREG32_SDMA(i, mmSDMA0_PHASE1_QUANTUM, phase_quantum);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1017

WREG32_SDMA(i, mmSDMA0_PHASE2_QUANTUM, phase_quantum);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1019

WREG32_SDMA(i, mmSDMA0_CNTL, f32_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1029

WREG32_SDMA(i, mmSDMA0_PUB_DUMMY_REG2, enable);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1031

WREG32_SDMA(i, mmSDMA0_UTCL1_TIMEOUT, 0x00800080);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1059

WREG32_SDMA(i, mmSDMA0_F32_CNTL, f32_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1099

WREG32_SDMA(i, mmSDMA0_GFX_RB_CNTL, rb_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1102

WREG32_SDMA(i, mmSDMA0_GFX_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1103

WREG32_SDMA(i, mmSDMA0_GFX_RB_RPTR_HI, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1104

WREG32_SDMA(i, mmSDMA0_GFX_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1105

WREG32_SDMA(i, mmSDMA0_GFX_RB_WPTR_HI, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1108

WREG32_SDMA(i, mmSDMA0_GFX_RB_RPTR_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1110

WREG32_SDMA(i, mmSDMA0_GFX_RB_RPTR_ADDR_LO,

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1116

WREG32_SDMA(i, mmSDMA0_GFX_RB_BASE, ring->gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1117

WREG32_SDMA(i, mmSDMA0_GFX_RB_BASE_HI, ring->gpu_addr >> 40);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1122

WREG32_SDMA(i, mmSDMA0_GFX_MINOR_PTR_UPDATE, 1);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1132

WREG32_SDMA(i, mmSDMA0_GFX_DOORBELL, doorbell);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1133

WREG32_SDMA(i, mmSDMA0_GFX_DOORBELL_OFFSET, doorbell_offset);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1138

WREG32_SDMA(i, mmSDMA0_GFX_MINOR_PTR_UPDATE, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1142

WREG32_SDMA(i, mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO,

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1144

WREG32_SDMA(i, mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1150

WREG32_SDMA(i, mmSDMA0_GFX_RB_WPTR_POLL_CNTL, wptr_poll_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1154

WREG32_SDMA(i, mmSDMA0_GFX_RB_CNTL, rb_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1162

WREG32_SDMA(i, mmSDMA0_GFX_IB_CNTL, ib_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1184

WREG32_SDMA(i, mmSDMA0_PAGE_RB_CNTL, rb_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1187

WREG32_SDMA(i, mmSDMA0_PAGE_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1188

WREG32_SDMA(i, mmSDMA0_PAGE_RB_RPTR_HI, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1189

WREG32_SDMA(i, mmSDMA0_PAGE_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1190

WREG32_SDMA(i, mmSDMA0_PAGE_RB_WPTR_HI, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1193

WREG32_SDMA(i, mmSDMA0_PAGE_RB_RPTR_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1195

WREG32_SDMA(i, mmSDMA0_PAGE_RB_RPTR_ADDR_LO,

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1201

WREG32_SDMA(i, mmSDMA0_PAGE_RB_BASE, ring->gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1202

WREG32_SDMA(i, mmSDMA0_PAGE_RB_BASE_HI, ring->gpu_addr >> 40);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1207

WREG32_SDMA(i, mmSDMA0_PAGE_MINOR_PTR_UPDATE, 1);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1217

WREG32_SDMA(i, mmSDMA0_PAGE_DOORBELL, doorbell);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1218

WREG32_SDMA(i, mmSDMA0_PAGE_DOORBELL_OFFSET, doorbell_offset);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1224

WREG32_SDMA(i, mmSDMA0_PAGE_MINOR_PTR_UPDATE, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1228

WREG32_SDMA(i, mmSDMA0_PAGE_RB_WPTR_POLL_ADDR_LO,

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1230

WREG32_SDMA(i, mmSDMA0_PAGE_RB_WPTR_POLL_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1236

WREG32_SDMA(i, mmSDMA0_PAGE_RB_WPTR_POLL_CNTL, wptr_poll_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1240

WREG32_SDMA(i, mmSDMA0_PAGE_RB_CNTL, rb_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1248

WREG32_SDMA(i, mmSDMA0_PAGE_IB_CNTL, ib_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1361

WREG32_SDMA(i, mmSDMA0_UCODE_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1364

WREG32_SDMA(i, mmSDMA0_UCODE_DATA,

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1367

WREG32_SDMA(i, mmSDMA0_UCODE_ADDR,

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1408

WREG32_SDMA(i, mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1416

WREG32_SDMA(i, mmSDMA0_CNTL, temp);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1422

WREG32_SDMA(i, mmSDMA0_F32_CNTL, temp);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

2069

WREG32_SDMA(type, mmSDMA0_CNTL, sdma_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

2159

WREG32_SDMA(type, mmSDMA0_EDC_CONFIG, sdma_edc_config);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

2254

WREG32_SDMA(i, mmSDMA0_CLK_CTRL, data);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

2268

WREG32_SDMA(i, mmSDMA0_CLK_CTRL, data);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

2287

WREG32_SDMA(0, mmSDMA0_POWER_CNTL, data);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

2295

WREG32_SDMA(0, mmSDMA0_POWER_CNTL, data);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

607

WREG32_SDMA(i, mmSDMA0_ULV_CNTL, temp);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

726

WREG32_SDMA(ring->me, mmSDMA0_GFX_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

728

WREG32_SDMA(ring->me, mmSDMA0_GFX_RB_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

777

WREG32_SDMA(ring->me, mmSDMA0_PAGE_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

779

WREG32_SDMA(ring->me, mmSDMA0_PAGE_RB_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

930

WREG32_SDMA(i, mmSDMA0_GFX_RB_CNTL, rb_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

933

WREG32_SDMA(i, mmSDMA0_GFX_IB_CNTL, ib_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

965

WREG32_SDMA(i, mmSDMA0_PAGE_RB_CNTL, rb_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

969

WREG32_SDMA(i, mmSDMA0_PAGE_IB_CNTL, ib_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

1004

WREG32_SDMA(i, regSDMA_CNTL, temp);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

1009

WREG32_SDMA(i, regSDMA_CNTL, temp);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

1016

WREG32_SDMA(i, regSDMA_F32_CNTL, temp);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

173

WREG32_SDMA(i, regSDMA_GB_ADDR_CONFIG, val);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

1756

WREG32_SDMA(type, regSDMA_CNTL, sdma_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

180

WREG32_SDMA(i, regSDMA_GB_ADDR_CONFIG_READ, val);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

1855

WREG32_SDMA(type, regSDMA_CNTL, sdma_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

1957

WREG32_SDMA(i, regSDMA_POWER_CNTL, data);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

1965

WREG32_SDMA(i, regSDMA_POWER_CNTL, data);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

1990

WREG32_SDMA(i, regSDMA_CLK_CTRL, data);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

2002

WREG32_SDMA(i, regSDMA_CLK_CTRL, data);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

293

WREG32_SDMA(ring->me, regSDMA_GFX_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

295

WREG32_SDMA(ring->me, regSDMA_GFX_RB_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

344

WREG32_SDMA(ring->me, regSDMA_PAGE_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

346

WREG32_SDMA(ring->me, regSDMA_PAGE_RB_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

504

WREG32_SDMA(i, regSDMA_GFX_RB_CNTL, rb_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

507

WREG32_SDMA(i, regSDMA_GFX_IB_CNTL, ib_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

510

WREG32_SDMA(i, regSDMA_CNTL, sdma_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

520

WREG32_SDMA(i, regSDMA_GFX_DOORBELL, doorbell);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

521

WREG32_SDMA(i, regSDMA_GFX_DOORBELL_OFFSET, doorbell_offset);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

558

WREG32_SDMA(i, regSDMA_PAGE_RB_CNTL, rb_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

562

WREG32_SDMA(i, regSDMA_PAGE_IB_CNTL, ib_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

610

WREG32_SDMA(i, regSDMA_PHASE0_QUANTUM, phase_quantum);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

611

WREG32_SDMA(i, regSDMA_PHASE1_QUANTUM, phase_quantum);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

612

WREG32_SDMA(i, regSDMA_PHASE2_QUANTUM, phase_quantum);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

614

WREG32_SDMA(i, regSDMA_CNTL, f32_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

617

WREG32_SDMA(i, regSDMA_UTCL1_TIMEOUT, 0x00800080);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

654

WREG32_SDMA(i, regSDMA_F32_CNTL, f32_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

700

WREG32_SDMA(i, regSDMA_GFX_RB_CNTL, rb_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

703

WREG32_SDMA(i, regSDMA_GFX_RB_RPTR_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

705

WREG32_SDMA(i, regSDMA_GFX_RB_RPTR_ADDR_LO,

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

711

WREG32_SDMA(i, regSDMA_GFX_RB_BASE, ring->gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

712

WREG32_SDMA(i, regSDMA_GFX_RB_BASE_HI, ring->gpu_addr >> 40);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

718

WREG32_SDMA(i, regSDMA_GFX_MINOR_PTR_UPDATE, 1);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

730

WREG32_SDMA(i, regSDMA_GFX_RB_RPTR, lower_32_bits(rwptr << 2));

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

731

WREG32_SDMA(i, regSDMA_GFX_RB_RPTR_HI, upper_32_bits(rwptr << 2));

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

732

WREG32_SDMA(i, regSDMA_GFX_RB_WPTR, lower_32_bits(rwptr << 2));

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

733

WREG32_SDMA(i, regSDMA_GFX_RB_WPTR_HI, upper_32_bits(rwptr << 2));

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

735

WREG32_SDMA(i, regSDMA_GFX_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

736

WREG32_SDMA(i, regSDMA_GFX_RB_RPTR_HI, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

737

WREG32_SDMA(i, regSDMA_GFX_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

738

WREG32_SDMA(i, regSDMA_GFX_RB_WPTR_HI, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

749

WREG32_SDMA(i, regSDMA_GFX_DOORBELL, doorbell);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

750

WREG32_SDMA(i, regSDMA_GFX_DOORBELL_OFFSET, doorbell_offset);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

755

WREG32_SDMA(i, regSDMA_GFX_MINOR_PTR_UPDATE, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

759

WREG32_SDMA(i, regSDMA_GFX_RB_WPTR_POLL_ADDR_LO,

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

761

WREG32_SDMA(i, regSDMA_GFX_RB_WPTR_POLL_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

767

WREG32_SDMA(i, regSDMA_GFX_RB_WPTR_POLL_CNTL, wptr_poll_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

771

WREG32_SDMA(i, regSDMA_GFX_RB_CNTL, rb_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

779

WREG32_SDMA(i, regSDMA_GFX_IB_CNTL, ib_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

806

WREG32_SDMA(i, regSDMA_PAGE_RB_CNTL, rb_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

818

WREG32_SDMA(i, regSDMA_PAGE_RB_RPTR, lower_32_bits(rwptr << 2));

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

819

WREG32_SDMA(i, regSDMA_PAGE_RB_RPTR_HI, upper_32_bits(rwptr << 2));

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

820

WREG32_SDMA(i, regSDMA_PAGE_RB_WPTR, lower_32_bits(rwptr << 2));

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

821

WREG32_SDMA(i, regSDMA_PAGE_RB_WPTR_HI, upper_32_bits(rwptr << 2));

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

823

WREG32_SDMA(i, regSDMA_PAGE_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

824

WREG32_SDMA(i, regSDMA_PAGE_RB_RPTR_HI, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

825

WREG32_SDMA(i, regSDMA_PAGE_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

826

WREG32_SDMA(i, regSDMA_PAGE_RB_WPTR_HI, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

830

WREG32_SDMA(i, regSDMA_PAGE_RB_RPTR_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

832

WREG32_SDMA(i, regSDMA_PAGE_RB_RPTR_ADDR_LO,

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

838

WREG32_SDMA(i, regSDMA_PAGE_RB_BASE, ring->gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

839

WREG32_SDMA(i, regSDMA_PAGE_RB_BASE_HI, ring->gpu_addr >> 40);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

845

WREG32_SDMA(i, regSDMA_PAGE_MINOR_PTR_UPDATE, 1);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

855

WREG32_SDMA(i, regSDMA_PAGE_DOORBELL, doorbell);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

856

WREG32_SDMA(i, regSDMA_PAGE_DOORBELL_OFFSET, doorbell_offset);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

862

WREG32_SDMA(i, regSDMA_PAGE_MINOR_PTR_UPDATE, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

866

WREG32_SDMA(i, regSDMA_PAGE_RB_WPTR_POLL_ADDR_LO,

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

868

WREG32_SDMA(i, regSDMA_PAGE_RB_WPTR_POLL_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

874

WREG32_SDMA(i, regSDMA_PAGE_RB_WPTR_POLL_CNTL, wptr_poll_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

878

WREG32_SDMA(i, regSDMA_PAGE_RB_CNTL, rb_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

886

WREG32_SDMA(i, regSDMA_PAGE_IB_CNTL, ib_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

943

WREG32_SDMA(i, regSDMA_UCODE_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

946

WREG32_SDMA(i, regSDMA_UCODE_DATA,

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

949

WREG32_SDMA(i, regSDMA_UCODE_ADDR,

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

996

WREG32_SDMA(i, regSDMA_SEM_WAIT_FAIL_TIMER_CNTL, 0);