drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

151

WREG32_SOC15(GC, 0, mmCPC_INT_CNTL,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

234

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

263

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_LO,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

265

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

267

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

269

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

273

WREG32_SOC15(GC, 0, mmCP_PQ_WPTR_POLL_CNTL1,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

278

WREG32_SOC15(GC, 0, mmCP_HQD_EOP_RPTR,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

283

WREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

607

WREG32_SOC15(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, type);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

685

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, gfx_index_val);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

686

WREG32_SOC15(GC, 0, mmSQ_CMD, sq_cmd);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

695

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

88

WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, sh_mem_config);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

89

WREG32_SOC15(GC, 0, mmSH_MEM_BASES, sh_mem_bases);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

120

WREG32_SOC15(GC, 0, mmCPC_INT_CNTL,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

205

WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS, value);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

220

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

249

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_LO,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

251

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

253

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

255

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

259

WREG32_SOC15(GC, 0, mmCP_PQ_WPTR_POLL_CNTL1,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

269

WREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

530

WREG32_SOC15(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, type);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

597

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, gfx_index_val);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

607

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

88

WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, sh_mem_config);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

89

WREG32_SOC15(GC, 0, mmSH_MEM_BASES, sh_mem_bases);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

116

WREG32_SOC15(GC, 0, regCPC_INT_CNTL,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

67

WREG32_SOC15(GC, 0, regCPC_INT_CNTL,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12_1.c

67

WREG32_SOC15(GC, GET_INST(GC, inst), regCPC_INT_CNTL,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

1111

WREG32_SOC15(GC, GET_INST(GC, inst), mmSQ_SHADER_TBA_LO,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

1113

WREG32_SOC15(GC, GET_INST(GC, inst), mmSQ_SHADER_TBA_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

1119

WREG32_SOC15(GC, GET_INST(GC, inst), mmSQ_SHADER_TMA_LO,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

1121

WREG32_SOC15(GC, GET_INST(GC, inst), mmSQ_SHADER_TMA_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

1201

WREG32_SOC15(GC, GET_INST(GC, inst), mmSPI_COMPUTE_QUEUE_RESET, 0x1);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

1211

WREG32_SOC15(GC, GET_INST(GC, inst), mmCP_MEC_CNTL, pipe_reset_data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

1212

WREG32_SOC15(GC, GET_INST(GC, inst), mmCP_MEC_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

171

WREG32_SOC15(GC, GET_INST(GC, inst), mmCPC_INT_CNTL,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

636

WREG32_SOC15(GC, GET_INST(GC, inst), mmSQ_CMD, sq_cmd);

drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h

46

WREG32_SOC15(JPEG, GET_INST(JPEG, inst_idx), \

drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h

48

WREG32_SOC15( \

drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h

64

WREG32_SOC15(JPEG, inst_idx, mmUVD_DPG_LMA_CTL, \

drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h

73

WREG32_SOC15(JPEG, GET_INST(JPEG, inst_idx), \

drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h

75

WREG32_SOC15(JPEG, GET_INST(JPEG, inst_idx), \

drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h

77

WREG32_SOC15( \

drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h

87

WREG32_SOC15(JPEG, GET_INST(JPEG, inst_idx), \

drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h

89

WREG32_SOC15(JPEG, GET_INST(JPEG, inst_idx), \

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h

137

WREG32_SOC15(VCN, inst_idx, mmUVD_DPG_LMA_CTL, \

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h

147

WREG32_SOC15(VCN, GET_INST(VCN, inst_idx), \

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h

149

WREG32_SOC15( \

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h

200

WREG32_SOC15(VCN, GET_INST(VCN, inst_idx), \

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h

202

WREG32_SOC15( \

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h

81

({ WREG32_SOC15(ip, inst_idx, mmUVD_DPG_LMA_MASK, mask); \

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h

82

WREG32_SOC15(ip, inst_idx, mmUVD_DPG_LMA_CTL, \

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h

92

WREG32_SOC15(ip, inst_idx, mmUVD_DPG_LMA_DATA, value); \

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h

93

WREG32_SOC15(ip, inst_idx, mmUVD_DPG_LMA_MASK, mask); \

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h

94

WREG32_SOC15(ip, inst_idx, mmUVD_DPG_LMA_CTL, \

drivers/gpu/drm/amd/amdgpu/athub_v1_0.c

45

WREG32_SOC15(ATHUB, 0, mmATHUB_MISC_CNTL, data);

drivers/gpu/drm/amd/amdgpu/athub_v1_0.c

62

WREG32_SOC15(ATHUB, 0, mmATHUB_MISC_CNTL, data);

drivers/gpu/drm/amd/amdgpu/athub_v2_0.c

50

WREG32_SOC15(ATHUB, 0, mmATHUB_MISC_CNTL, data);

drivers/gpu/drm/amd/amdgpu/athub_v2_0.c

71

WREG32_SOC15(ATHUB, 0, mmATHUB_MISC_CNTL, data);

drivers/gpu/drm/amd/amdgpu/athub_v2_1.c

46

WREG32_SOC15(ATHUB, 0, mmATHUB_MISC_CNTL, data);

drivers/gpu/drm/amd/amdgpu/athub_v2_1.c

64

WREG32_SOC15(ATHUB, 0, mmATHUB_MISC_CNTL, data);

drivers/gpu/drm/amd/amdgpu/athub_v3_0.c

59

WREG32_SOC15(ATHUB, 0, regATHUB_MISC_CNTL_V3_0_1, data);

drivers/gpu/drm/amd/amdgpu/athub_v3_0.c

62

WREG32_SOC15(ATHUB, 0, regATHUB_MISC_CNTL_V3_3_0, data);

drivers/gpu/drm/amd/amdgpu/athub_v3_0.c

65

WREG32_SOC15(ATHUB, 0, regATHUB_MISC_CNTL, data);

drivers/gpu/drm/amd/amdgpu/athub_v4_1_0.c

49

WREG32_SOC15(ATHUB, 0, regATHUB_MISC_CNTL, data);

drivers/gpu/drm/amd/amdgpu/df_v1_7.c

51

WREG32_SOC15(DF, 0, mmFabricConfigAccessControl, tmp);

drivers/gpu/drm/amd/amdgpu/df_v1_7.c

53

WREG32_SOC15(DF, 0, mmFabricConfigAccessControl,

drivers/gpu/drm/amd/amdgpu/df_v1_7.c

91

WREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater, tmp);

drivers/gpu/drm/amd/amdgpu/df_v1_7.c

96

WREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater, tmp);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

270

WREG32_SOC15(DF, 0, mmFabricConfigAccessControl, tmp);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

272

WREG32_SOC15(DF, 0, mmFabricConfigAccessControl,

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

318

WREG32_SOC15(DF, 0,

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

325

WREG32_SOC15(DF, 0,

drivers/gpu/drm/amd/amdgpu/df_v4_15.c

39

WREG32_SOC15(DF, 0, regNCSConfigurationRegister1, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

10066

WREG32_SOC15(GC, 0, mmGC_USER_SHADER_ARRAY_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

10210

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

10215

WREG32_SOC15(GC, 0, mmGC_CAC_IND_INDEX, ixPWRBRK_STALL_PATTERN_CTRL);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

10216

WREG32_SOC15(GC, 0, mmGC_CAC_IND_DATA,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

10222

WREG32_SOC15(GC, 0, mmGC_THROTTLE_CTRL_Sienna_Cichlid,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

10227

WREG32_SOC15(GC, 0, mmDIDT_IND_INDEX, ixDIDT_SQ_THROTTLE_CTRL);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

10229

WREG32_SOC15(GC, 0, mmDIDT_IND_DATA,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

3835

WREG32_SOC15(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, 0x2);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

3836

WREG32_SOC15(GC, 0, mmSPI_COMPUTE_QUEUE_RESET, 0x1);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

3846

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

3853

WREG32_SOC15(GC, 0, mmCP_VMID_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

4479

WREG32_SOC15(GC, 0, mmSQ_IND_INDEX,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

4489

WREG32_SOC15(GC, 0, mmSQ_IND_INDEX,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

4566

WREG32_SOC15(GC, 0, mmRLC_PERFMON_CLK_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5081

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5215

WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, DEFAULT_SH_MEM_CONFIG);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5216

WREG32_SOC15(GC, 0, mmSH_MEM_BASES, sh_mem_bases);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5308

WREG32_SOC15(GC, 0, mmUTCL1_UTCL0_INVREQ_DISABLE, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5314

WREG32_SOC15(GC, 0, mmGCRD_SA_TARGETS_DISABLE, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5360

WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, DEFAULT_SH_MEM_CONFIG);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5366

WREG32_SOC15(GC, 0, mmSH_MEM_BASES, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5460

WREG32_SOC15(GC, 0, mmRLC_CSIB_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5462

WREG32_SOC15(GC, 0, mmRLC_CSIB_ADDR_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5464

WREG32_SOC15(GC, 0, mmRLC_CSIB_LENGTH, adev->gfx.rlc.clear_state_size);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5474

WREG32_SOC15(GC, 0, mmRLC_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5504

WREG32_SOC15(GC, 0, mmRLC_PG_CNTL, rlc_pg_cntl);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5528

WREG32_SOC15(GC, 0, mmRLC_SRM_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5547

WREG32_SOC15(GC, 0, mmRLC_GPM_UCODE_ADDR,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5551

WREG32_SOC15(GC, 0, mmRLC_GPM_UCODE_DATA,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5554

WREG32_SOC15(GC, 0, mmRLC_GPM_UCODE_ADDR, adev->gfx.rlc_fw_version);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5585

WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5588

WREG32_SOC15(GC, 0, mmRLC_PG_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5862

WREG32_SOC15(GC, 0, mmRLC_HYP_BOOTLOAD_ADDR_HI, upper_32_bits(gpu_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5863

WREG32_SOC15(GC, 0, mmRLC_HYP_BOOTLOAD_ADDR_LO, lower_32_bits(gpu_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5864

WREG32_SOC15(GC, 0, mmRLC_HYP_BOOTLOAD_SIZE, rlc_g_size);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5892

WREG32_SOC15(GC, 0, mmCP_ME_IC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5911

WREG32_SOC15(GC, 0, mmCP_ME_IC_BASE_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5913

WREG32_SOC15(GC, 0, mmCP_ME_IC_BASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5929

WREG32_SOC15(GC, 0, mmCP_CE_IC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5948

WREG32_SOC15(GC, 0, mmCP_CE_IC_BASE_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5950

WREG32_SOC15(GC, 0, mmCP_CE_IC_BASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5966

WREG32_SOC15(GC, 0, mmCP_PFP_IC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5985

WREG32_SOC15(GC, 0, mmCP_PFP_IC_BASE_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5987

WREG32_SOC15(GC, 0, mmCP_PFP_IC_BASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6003

WREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6022

WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6024

WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6085

WREG32_SOC15(GC, 0, mmCP_ME_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6139

WREG32_SOC15(GC, 0, mmCP_PFP_IC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6163

WREG32_SOC15(GC, 0, mmCP_PFP_IC_BASE_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6164

WREG32_SOC15(GC, 0, mmCP_PFP_IC_BASE_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6166

WREG32_SOC15(GC, 0, mmCP_PFP_IC_BASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6169

WREG32_SOC15(GC, 0, mmCP_HYP_PFP_UCODE_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6172

WREG32_SOC15(GC, 0, mmCP_HYP_PFP_UCODE_DATA,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6175

WREG32_SOC15(GC, 0, mmCP_HYP_PFP_UCODE_ADDR, adev->gfx.pfp_fw_version);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6217

WREG32_SOC15(GC, 0, mmCP_CE_IC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6241

WREG32_SOC15(GC, 0, mmCP_CE_IC_BASE_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6243

WREG32_SOC15(GC, 0, mmCP_CE_IC_BASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6246

WREG32_SOC15(GC, 0, mmCP_HYP_CE_UCODE_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6249

WREG32_SOC15(GC, 0, mmCP_HYP_CE_UCODE_DATA,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6252

WREG32_SOC15(GC, 0, mmCP_HYP_CE_UCODE_ADDR, adev->gfx.ce_fw_version);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6294

WREG32_SOC15(GC, 0, mmCP_ME_IC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6318

WREG32_SOC15(GC, 0, mmCP_ME_IC_BASE_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6320

WREG32_SOC15(GC, 0, mmCP_ME_IC_BASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6323

WREG32_SOC15(GC, 0, mmCP_HYP_ME_UCODE_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6326

WREG32_SOC15(GC, 0, mmCP_HYP_ME_UCODE_DATA,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6329

WREG32_SOC15(GC, 0, mmCP_HYP_ME_UCODE_ADDR, adev->gfx.me_fw_version);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6373

WREG32_SOC15(GC, 0, mmCP_MAX_CONTEXT,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6375

WREG32_SOC15(GC, 0, mmCP_DEVICE_ID, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6452

WREG32_SOC15(GC, 0, mmGRBM_GFX_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6471

WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_CONTROL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6484

WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_RANGE_LOWER, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6486

WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_RANGE_UPPER,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6492

WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_RANGE_LOWER, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6494

WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_RANGE_UPPER,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6508

WREG32_SOC15(GC, 0, mmCP_RB_WPTR_DELAY, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6511

WREG32_SOC15(GC, 0, mmCP_RB_VMID, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6525

WREG32_SOC15(GC, 0, mmCP_RB0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6529

WREG32_SOC15(GC, 0, mmCP_RB0_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6530

WREG32_SOC15(GC, 0, mmCP_RB0_WPTR_HI, upper_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6534

WREG32_SOC15(GC, 0, mmCP_RB0_RPTR_ADDR, lower_32_bits(rptr_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6535

WREG32_SOC15(GC, 0, mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) &

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6539

WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6541

WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6545

WREG32_SOC15(GC, 0, mmCP_RB0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6548

WREG32_SOC15(GC, 0, mmCP_RB0_BASE, rb_addr);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6549

WREG32_SOC15(GC, 0, mmCP_RB0_BASE_HI, upper_32_bits(rb_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6551

WREG32_SOC15(GC, 0, mmCP_RB_ACTIVE, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6565

WREG32_SOC15(GC, 0, mmCP_RB1_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6568

WREG32_SOC15(GC, 0, mmCP_RB1_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6569

WREG32_SOC15(GC, 0, mmCP_RB1_WPTR_HI, upper_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6572

WREG32_SOC15(GC, 0, mmCP_RB1_RPTR_ADDR, lower_32_bits(rptr_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6573

WREG32_SOC15(GC, 0, mmCP_RB1_RPTR_ADDR_HI, upper_32_bits(rptr_addr) &

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6576

WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6578

WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6582

WREG32_SOC15(GC, 0, mmCP_RB1_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6585

WREG32_SOC15(GC, 0, mmCP_RB1_BASE, rb_addr);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6586

WREG32_SOC15(GC, 0, mmCP_RB1_BASE_HI, upper_32_bits(rb_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6587

WREG32_SOC15(GC, 0, mmCP_RB1_ACTIVE, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6615

WREG32_SOC15(GC, 0, mmCP_MEC_CNTL_Sienna_Cichlid, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6618

WREG32_SOC15(GC, 0, mmCP_MEC_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6631

WREG32_SOC15(GC, 0, mmCP_MEC_CNTL_Sienna_Cichlid,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6636

WREG32_SOC15(GC, 0, mmCP_MEC_CNTL,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6669

WREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6692

WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6694

WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_LO, adev->gfx.mec.mec_fw_gpu_addr &

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6696

WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6700

WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6703

WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_DATA,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6706

WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR, adev->gfx.mec_fw_version);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6734

WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS_Sienna_Cichlid, tmp | 0x80);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

6740

WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS, tmp | 0x80);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7031

WREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7038

WREG32_SOC15(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7044

WREG32_SOC15(GC, 0, mmCP_HQD_DEQUEUE_REQUEST,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7046

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_RPTR,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7048

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7050

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7055

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7058

WREG32_SOC15(GC, 0, mmCP_HQD_EOP_BASE_ADDR,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7060

WREG32_SOC15(GC, 0, mmCP_HQD_EOP_BASE_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7064

WREG32_SOC15(GC, 0, mmCP_HQD_EOP_CONTROL,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7068

WREG32_SOC15(GC, 0, mmCP_MQD_BASE_ADDR,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7070

WREG32_SOC15(GC, 0, mmCP_MQD_BASE_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7074

WREG32_SOC15(GC, 0, mmCP_MQD_CONTROL,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7078

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_BASE,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7080

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_BASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7084

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_CONTROL,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7088

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_RPTR_REPORT_ADDR,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7090

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7094

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7096

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7101

WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_LOWER,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7103

WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7107

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7111

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7113

WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7117

WREG32_SOC15(GC, 0, mmCP_HQD_VMID, mqd->cp_hqd_vmid);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7119

WREG32_SOC15(GC, 0, mmCP_HQD_PERSISTENT_STATE,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7123

WREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7296

WREG32_SOC15(GC, 0, mmVGT_ESGS_RING_SIZE_Sienna_Cichlid, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7297

WREG32_SOC15(GC, 0, mmVGT_ESGS_RING_SIZE_UMD, pattern);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7300

WREG32_SOC15(GC, 0, mmVGT_ESGS_RING_SIZE_UMD, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7303

WREG32_SOC15(GC, 0, mmVGT_ESGS_RING_SIZE_Sienna_Cichlid, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7312

WREG32_SOC15(GC, 0, mmVGT_ESGS_RING_SIZE, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7313

WREG32_SOC15(GC, 0, mmVGT_ESGS_RING_SIZE_UMD, pattern);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7316

WREG32_SOC15(GC, 0, mmVGT_ESGS_RING_SIZE_UMD, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7319

WREG32_SOC15(GC, 0, mmVGT_ESGS_RING_SIZE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7337

WREG32_SOC15(GC, 0, mmGRBM_CAM_INDEX, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7353

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7354

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7361

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7362

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7369

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7370

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7377

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7378

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7385

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7386

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7393

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7394

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7408

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7409

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7416

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7417

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7424

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7425

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7432

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7433

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7440

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7441

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7448

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7449

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7459

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7460

WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7469

WREG32_SOC15(GC, 0, mmCPC_PSP_DEBUG, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7473

WREG32_SOC15(GC, 0, mmCPG_PSP_DEBUG, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7675

WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7681

WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7881

WREG32_SOC15(GC, 0, mmRLC_SAFE_MODE_Sienna_Cichlid, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7892

WREG32_SOC15(GC, 0, mmRLC_SAFE_MODE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7919

WREG32_SOC15(GC, 0, mmRLC_SAFE_MODE_Sienna_Cichlid, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7922

WREG32_SOC15(GC, 0, mmRLC_SAFE_MODE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7938

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xe0000000);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7939

WREG32_SOC15(GC, 0, mmCGTT_WD_CLK_CTRL, 0xff000000);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7940

WREG32_SOC15(GC, 0, mmCGTT_VGT_CLK_CTRL, 0xff000000);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7941

WREG32_SOC15(GC, 0, mmCGTT_IA_CLK_CTRL, 0xff000000);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7953

WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7962

WREG32_SOC15(GC, 0, mmRLC_MEM_SLP_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7969

WREG32_SOC15(GC, 0, mmCP_MEM_SLP_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7982

WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7988

WREG32_SOC15(GC, 0, mmCP_MEM_SLP_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

7995

WREG32_SOC15(GC, 0, mmRLC_MEM_SLP_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8020

WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8035

WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8042

WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8056

WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8080

WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8095

WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8102

WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8115

WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8133

WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8140

WREG32_SOC15(GC, 0, mmRLC_CLK_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8147

WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8154

WREG32_SOC15(GC, 0, mmRLC_CLK_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8318

WREG32_SOC15(GC, 0, mmRLC_SPM_MC_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8368

WREG32_SOC15(GC, 0, mmRLC_PG_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8387

WREG32_SOC15(GC, 0, mmRLC_PG_DELAY_3, data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8576

WREG32_SOC15(GC, 0, mmCP_RB0_WPTR,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8578

WREG32_SOC15(GC, 0, mmCP_RB0_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9422

WREG32_SOC15(GC, 0, mmCPC_INT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

9432

WREG32_SOC15(GC, 0, mmCPC_INT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

1523

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_BOOTLOADER_ADDR_HI, upper_32_bits(gpu_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

1524

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_BOOTLOADER_ADDR_LO, lower_32_bits(gpu_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

1526

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_BOOTLOADER_SIZE, rlc_g_size);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

1983

WREG32_SOC15(GC, 0, regGRBM_GFX_INDEX, data);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2078

WREG32_SOC15(GC, 0, regSH_MEM_CONFIG, DEFAULT_SH_MEM_CONFIG);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2079

WREG32_SOC15(GC, 0, regSH_MEM_BASES, sh_mem_bases);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2084

WREG32_SOC15(GC, 0, regSPI_GDBG_PER_VMID_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2159

WREG32_SOC15(GC, 0, regSH_MEM_CONFIG, DEFAULT_SH_MEM_CONFIG);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2165

WREG32_SOC15(GC, 0, regSH_MEM_BASES, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2250

WREG32_SOC15(GC, 0, regRLC_CSIB_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2252

WREG32_SOC15(GC, 0, regRLC_CSIB_ADDR_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2254

WREG32_SOC15(GC, 0, regRLC_CSIB_LENGTH, adev->gfx.rlc.clear_state_size);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2264

WREG32_SOC15(GC, 0, regRLC_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2294

WREG32_SOC15(GC, 0, regRLC_PG_CNTL, rlc_pg_cntl);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2330

WREG32_SOC15(GC, 0, regRLC_GPM_UCODE_ADDR,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2334

WREG32_SOC15(GC, 0, regRLC_GPM_UCODE_DATA,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2337

WREG32_SOC15(GC, 0, regRLC_GPM_UCODE_ADDR, adev->gfx.rlc_fw_version);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2353

WREG32_SOC15(GC, 0, regRLC_LX6_IRAM_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2358

WREG32_SOC15(GC, 0, regRLC_LX6_IRAM_DATA,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2362

WREG32_SOC15(GC, 0, regRLC_LX6_IRAM_ADDR, adev->gfx.rlc_fw_version);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2368

WREG32_SOC15(GC, 0, regRLC_LX6_DRAM_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2372

WREG32_SOC15(GC, 0, regRLC_LX6_DRAM_DATA,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2376

WREG32_SOC15(GC, 0, regRLC_LX6_IRAM_ADDR, adev->gfx.rlc_fw_version);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2381

WREG32_SOC15(GC, 0, regRLC_LX6_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2397

WREG32_SOC15(GC, 0, regRLC_PACE_UCODE_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2402

WREG32_SOC15(GC, 0, regRLC_PACE_UCODE_DATA,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2406

WREG32_SOC15(GC, 0, regRLC_PACE_UCODE_ADDR, adev->gfx.rlc_fw_version);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2410

WREG32_SOC15(GC, 0, regRLC_GPM_THREAD_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2416

WREG32_SOC15(GC, 0, regRLC_GPU_IOV_UCODE_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2421

WREG32_SOC15(GC, 0, regRLC_GPU_IOV_UCODE_DATA,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2425

WREG32_SOC15(GC, 0, regRLC_GPU_IOV_UCODE_ADDR, adev->gfx.rlc_fw_version);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2429

WREG32_SOC15(GC, 0, regRLC_GPU_IOV_F32_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2480

WREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2483

WREG32_SOC15(GC, 0, regRLC_PG_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2508

WREG32_SOC15(GC, 0, regCP_ME_IC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2532

WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2535

WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2537

WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2552

WREG32_SOC15(GC, 0, regCP_PFP_IC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2576

WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2579

WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2581

WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2597

WREG32_SOC15(GC, 0, regCP_CPC_IC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2620

WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2623

WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2625

WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2641

WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2643

WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2650

WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2673

WREG32_SOC15(GC, 0, regCP_PFP_IC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2691

WREG32_SOC15(GC, 0, regCP_PFP_PRGRM_CNTR_START,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2694

WREG32_SOC15(GC, 0, regCP_PFP_PRGRM_CNTR_START_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2708

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2717

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2719

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE0_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2721

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE0_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2730

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2735

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2763

WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2765

WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2772

WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2795

WREG32_SOC15(GC, 0, regCP_ME_IC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2814

WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2817

WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2831

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2840

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2842

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE1_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2844

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE1_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2853

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2858

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2890

WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2895

WREG32_SOC15(GC, 0, regCP_MEC_DC_BASE_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2901

WREG32_SOC15(GC, 0, regCP_MEC_MDBASE_LO, addr2);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2902

WREG32_SOC15(GC, 0, regCP_MEC_MDBASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2905

WREG32_SOC15(GC, 0, regCP_MEC_RS64_PRGRM_CNTR_START,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2908

WREG32_SOC15(GC, 0, regCP_MEC_RS64_PRGRM_CNTR_START_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2911

WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_LO, addr);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2912

WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2921

WREG32_SOC15(GC, 0, regCP_MEC_DC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2940

WREG32_SOC15(GC, 0, regCP_CPC_IC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2976

WREG32_SOC15(GC, 0, regCP_PFP_PRGRM_CNTR_START,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2979

WREG32_SOC15(GC, 0, regCP_PFP_PRGRM_CNTR_START_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2988

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2993

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2998

WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3001

WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3010

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3015

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3020

WREG32_SOC15(GC, 0, regCP_MEC_RS64_PRGRM_CNTR_START,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3023

WREG32_SOC15(GC, 0, regCP_MEC_RS64_PRGRM_CNTR_START_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3034

WREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3041

WREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3133

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3181

WREG32_SOC15(GC, 0, regCP_HYP_PFP_UCODE_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3184

WREG32_SOC15(GC, 0, regCP_HYP_PFP_UCODE_DATA,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3187

WREG32_SOC15(GC, 0, regCP_HYP_PFP_UCODE_ADDR, adev->gfx.pfp_fw_version);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3253

WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3255

WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3262

WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3285

WREG32_SOC15(GC, 0, regCP_PFP_IC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3303

WREG32_SOC15(GC, 0, regCP_PFP_PRGRM_CNTR_START,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3306

WREG32_SOC15(GC, 0, regCP_PFP_PRGRM_CNTR_START_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3320

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3329

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3331

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE0_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3333

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE0_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3342

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3347

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3399

WREG32_SOC15(GC, 0, regCP_HYP_ME_UCODE_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3402

WREG32_SOC15(GC, 0, regCP_HYP_ME_UCODE_DATA,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3405

WREG32_SOC15(GC, 0, regCP_HYP_ME_UCODE_ADDR, adev->gfx.me_fw_version);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3471

WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3473

WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3480

WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3503

WREG32_SOC15(GC, 0, regCP_ME_IC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3522

WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3525

WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3539

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3548

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3550

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE1_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3552

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE1_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3561

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3566

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3623

WREG32_SOC15(GC, 0, regCP_MAX_CONTEXT,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3625

WREG32_SOC15(GC, 0, regCP_DEVICE_ID, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3698

WREG32_SOC15(GC, 0, regGRBM_GFX_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3716

WREG32_SOC15(GC, 0, regCP_RB_DOORBELL_CONTROL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3720

WREG32_SOC15(GC, 0, regCP_RB_DOORBELL_RANGE_LOWER, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3722

WREG32_SOC15(GC, 0, regCP_RB_DOORBELL_RANGE_UPPER,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3734

WREG32_SOC15(GC, 0, regCP_RB_WPTR_DELAY, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3737

WREG32_SOC15(GC, 0, regCP_RB_VMID, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3748

WREG32_SOC15(GC, 0, regCP_RB0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3752

WREG32_SOC15(GC, 0, regCP_RB0_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3753

WREG32_SOC15(GC, 0, regCP_RB0_WPTR_HI, upper_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3757

WREG32_SOC15(GC, 0, regCP_RB0_RPTR_ADDR, lower_32_bits(rptr_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3758

WREG32_SOC15(GC, 0, regCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) &

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3762

WREG32_SOC15(GC, 0, regCP_RB_WPTR_POLL_ADDR_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3764

WREG32_SOC15(GC, 0, regCP_RB_WPTR_POLL_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3768

WREG32_SOC15(GC, 0, regCP_RB0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3771

WREG32_SOC15(GC, 0, regCP_RB0_BASE, rb_addr);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3772

WREG32_SOC15(GC, 0, regCP_RB0_BASE_HI, upper_32_bits(rb_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3774

WREG32_SOC15(GC, 0, regCP_RB_ACTIVE, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3788

WREG32_SOC15(GC, 0, regCP_RB1_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3791

WREG32_SOC15(GC, 0, regCP_RB1_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3792

WREG32_SOC15(GC, 0, regCP_RB1_WPTR_HI, upper_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3795

WREG32_SOC15(GC, 0, regCP_RB1_RPTR_ADDR, lower_32_bits(rptr_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3796

WREG32_SOC15(GC, 0, regCP_RB1_RPTR_ADDR_HI, upper_32_bits(rptr_addr) &

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3799

WREG32_SOC15(GC, 0, regCP_RB_WPTR_POLL_ADDR_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3801

WREG32_SOC15(GC, 0, regCP_RB_WPTR_POLL_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3805

WREG32_SOC15(GC, 0, regCP_RB1_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3808

WREG32_SOC15(GC, 0, regCP_RB1_BASE, rb_addr);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3809

WREG32_SOC15(GC, 0, regCP_RB1_BASE_HI, upper_32_bits(rb_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3810

WREG32_SOC15(GC, 0, regCP_RB1_ACTIVE, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3852

WREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3865

WREG32_SOC15(GC, 0, regCP_MEC_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3911

WREG32_SOC15(GC, 0, regCP_MEC_ME1_UCODE_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3914

WREG32_SOC15(GC, 0, regCP_MEC_ME1_UCODE_DATA,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3917

WREG32_SOC15(GC, 0, regCP_MEC_ME1_UCODE_ADDR, adev->gfx.mec_fw_version);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3985

WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3990

WREG32_SOC15(GC, 0, regCP_MEC_DC_BASE_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3996

WREG32_SOC15(GC, 0, regCP_MEC_MDBASE_LO, adev->gfx.mec.mec_fw_data_gpu_addr);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

3997

WREG32_SOC15(GC, 0, regCP_MEC_MDBASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4000

WREG32_SOC15(GC, 0, regCP_MEC_RS64_PRGRM_CNTR_START,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4003

WREG32_SOC15(GC, 0, regCP_MEC_RS64_PRGRM_CNTR_START_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4006

WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_LO, adev->gfx.mec.mec_fw_gpu_addr);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4007

WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4016

WREG32_SOC15(GC, 0, regCP_MEC_DC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4035

WREG32_SOC15(GC, 0, regCP_CPC_IC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4063

WREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS, tmp | 0x80);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4069

WREG32_SOC15(GC, 0, regCP_RB_DOORBELL_RANGE_LOWER,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4071

WREG32_SOC15(GC, 0, regCP_RB_DOORBELL_RANGE_UPPER,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4075

WREG32_SOC15(GC, 0, regCP_MEC_DOORBELL_RANGE_LOWER,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4077

WREG32_SOC15(GC, 0, regCP_MEC_DOORBELL_RANGE_UPPER,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4387

WREG32_SOC15(GC, 0, regCP_HQD_ACTIVE, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4393

WREG32_SOC15(GC, 0, regCP_HQD_EOP_BASE_ADDR,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4395

WREG32_SOC15(GC, 0, regCP_HQD_EOP_BASE_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4399

WREG32_SOC15(GC, 0, regCP_HQD_EOP_CONTROL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4403

WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4408

WREG32_SOC15(GC, 0, regCP_HQD_DEQUEUE_REQUEST, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4414

WREG32_SOC15(GC, 0, regCP_HQD_DEQUEUE_REQUEST,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4416

WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4418

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4420

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4425

WREG32_SOC15(GC, 0, regCP_MQD_BASE_ADDR,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4427

WREG32_SOC15(GC, 0, regCP_MQD_BASE_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4431

WREG32_SOC15(GC, 0, regCP_MQD_CONTROL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4435

WREG32_SOC15(GC, 0, regCP_HQD_PQ_BASE,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4437

WREG32_SOC15(GC, 0, regCP_HQD_PQ_BASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4441

WREG32_SOC15(GC, 0, regCP_HQD_PQ_CONTROL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4445

WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR_REPORT_ADDR,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4447

WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR_REPORT_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4451

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4453

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4458

WREG32_SOC15(GC, 0, regCP_MEC_DOORBELL_RANGE_LOWER,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4460

WREG32_SOC15(GC, 0, regCP_MEC_DOORBELL_RANGE_UPPER,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4464

WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4468

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4470

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4474

WREG32_SOC15(GC, 0, regCP_HQD_VMID, mqd->cp_hqd_vmid);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4476

WREG32_SOC15(GC, 0, regCP_HQD_PERSISTENT_STATE,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4480

WREG32_SOC15(GC, 0, regCP_HQD_ACTIVE,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4693

WREG32_SOC15(GC, 0, regCP_GFX_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4697

WREG32_SOC15(GC, 0, regCP_MEC_ISA_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4746

WREG32_SOC15(GC, 0, regCPC_PSP_DEBUG, data);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4750

WREG32_SOC15(GC, 0, regCPG_PSP_DEBUG, data);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

4986

WREG32_SOC15(GC, 0, regCP_GFX_INDEX_MUTEX, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5023

WREG32_SOC15(GC, 0, regCP_INT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5031

WREG32_SOC15(GC, 0, regCP_HQD_DEQUEUE_REQUEST, 0x2);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5032

WREG32_SOC15(GC, 0, regSPI_COMPUTE_QUEUE_RESET, 0x1);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5041

WREG32_SOC15(GC, 0, regCP_GFX_HQD_DEQUEUE_REQUEST, 0x1);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5057

WREG32_SOC15(GC, 0, regCP_VMID_RESET, 0xfffffffe);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5096

WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, grbm_soft_reset);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5109

WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, grbm_soft_reset);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5113

WREG32_SOC15(GC, 0, regCP_SOFT_RESET_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5115

WREG32_SOC15(GC, 0, regCP_ME_CNTL, 0x0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5116

WREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL, 0x0);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5133

WREG32_SOC15(GC, 0, regCP_INT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5320

WREG32_SOC15(GC, 0, regRLC_SAFE_MODE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5333

WREG32_SOC15(GC, 0, regRLC_SAFE_MODE, RLC_SAFE_MODE__CMD_MASK);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5352

WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5371

WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5390

WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5412

WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5423

WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5454

WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5472

WREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5490

WREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL_3D, data);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5500

WREG32_SOC15(GC, 0, regCP_RB_WPTR_POLL_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5507

WREG32_SOC15(GC, 0, regCP_INT_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5511

WREG32_SOC15(GC, 0, regSDMA0_RLC_CGCG_CTRL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5517

WREG32_SOC15(GC, 0, regSDMA1_RLC_CGCG_CTRL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5530

WREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5541

WREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL_3D, data);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5545

WREG32_SOC15(GC, 0, regSDMA0_RLC_CGCG_CTRL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5551

WREG32_SOC15(GC, 0, regSDMA1_RLC_CGCG_CTRL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5603

WREG32_SOC15(GC, 0, regRLC_SPM_MC_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5639

WREG32_SOC15(GC, 0, regRLC_PG_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5651

WREG32_SOC15(GC, 0, regRLC_PG_DELAY_3, RLC_PG_DELAY_3_DEFAULT_GC_11_0_1);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5808

WREG32_SOC15(GC, 0, regCP_RB0_WPTR,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

5810

WREG32_SOC15(GC, 0, regCP_RB0_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6714

WREG32_SOC15(GC, 0, regCPC_INT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6724

WREG32_SOC15(GC, 0, regCPC_INT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6809

WREG32_SOC15(GC, 0, regCP_ME_CNTL, reset_pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6810

WREG32_SOC15(GC, 0, regCP_ME_CNTL, clean_pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6909

WREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL, reset_pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6910

WREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL, clean_pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6975

WREG32_SOC15(GC, 0, regCP_MEC_CNTL, reset_pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

6976

WREG32_SOC15(GC, 0, regCP_MEC_CNTL, clean_pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

7442

WREG32_SOC15(GC, 0, regGC_USER_SHADER_ARRAY_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

979

WREG32_SOC15(GC, 0, regSQ_IND_INDEX,

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

989

WREG32_SOC15(GC, 0, regSQ_IND_INDEX,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1326

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_BOOTLOADER_ADDR_HI, upper_32_bits(gpu_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1327

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_BOOTLOADER_ADDR_LO, lower_32_bits(gpu_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1329

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_BOOTLOADER_SIZE, rlc_g_size);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1348

WREG32_SOC15(GC, 0, regRLC_GPM_THREAD_ENABLE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1349

WREG32_SOC15(GC, 0, regRLC_CNTL, RLC_CNTL__RLC_ENABLE_F32_MASK);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1691

WREG32_SOC15(GC, 0, regGRBM_GFX_INDEX, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1785

WREG32_SOC15(GC, 0, regSH_MEM_CONFIG, DEFAULT_SH_MEM_CONFIG);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1786

WREG32_SOC15(GC, 0, regSH_MEM_BASES, sh_mem_bases);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1791

WREG32_SOC15(GC, 0, regSPI_GDBG_PER_VMID_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1825

WREG32_SOC15(GC, 0, regSH_MEM_CONFIG, DEFAULT_SH_MEM_CONFIG);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1831

WREG32_SOC15(GC, 0, regSH_MEM_BASES, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1909

WREG32_SOC15(GC, 0, regRLC_CSIB_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1911

WREG32_SOC15(GC, 0, regRLC_CSIB_ADDR_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1913

WREG32_SOC15(GC, 0, regRLC_CSIB_LENGTH, adev->gfx.rlc.clear_state_size);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1923

WREG32_SOC15(GC, 0, regRLC_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1953

WREG32_SOC15(GC, 0, regRLC_PG_CNTL, rlc_pg_cntl);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1989

WREG32_SOC15(GC, 0, regRLC_GPM_UCODE_ADDR,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1993

WREG32_SOC15(GC, 0, regRLC_GPM_UCODE_DATA,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1996

WREG32_SOC15(GC, 0, regRLC_GPM_UCODE_ADDR, adev->gfx.rlc_fw_version);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2012

WREG32_SOC15(GC, 0, regRLC_LX6_IRAM_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2017

WREG32_SOC15(GC, 0, regRLC_LX6_IRAM_DATA,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2021

WREG32_SOC15(GC, 0, regRLC_LX6_IRAM_ADDR, adev->gfx.rlc_fw_version);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2027

WREG32_SOC15(GC, 0, regRLC_LX6_DRAM_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2031

WREG32_SOC15(GC, 0, regRLC_LX6_DRAM_DATA,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2035

WREG32_SOC15(GC, 0, regRLC_LX6_IRAM_ADDR, adev->gfx.rlc_fw_version);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2040

WREG32_SOC15(GC, 0, regRLC_LX6_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2089

WREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2092

WREG32_SOC15(GC, 0, regRLC_PG_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2126

WREG32_SOC15(GC, 0, regCP_PFP_PRGRM_CNTR_START,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2129

WREG32_SOC15(GC, 0, regCP_PFP_PRGRM_CNTR_START_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2138

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2143

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2148

WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2151

WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2160

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2165

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2170

WREG32_SOC15(GC, 0, regCP_MEC_RS64_PRGRM_CNTR_START,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2173

WREG32_SOC15(GC, 0, regCP_MEC_RS64_PRGRM_CNTR_START_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2184

WREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2191

WREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2204

WREG32_SOC15(GC, 0, regCP_PFP_PRGRM_CNTR_START,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2207

WREG32_SOC15(GC, 0, regCP_PFP_PRGRM_CNTR_START_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2221

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2230

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2246

WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2249

WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2263

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2272

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2288

WREG32_SOC15(GC, 0, regCP_MEC_RS64_PRGRM_CNTR_START,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2291

WREG32_SOC15(GC, 0, regCP_MEC_RS64_PRGRM_CNTR_START_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2339

WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2410

WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2412

WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2419

WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2442

WREG32_SOC15(GC, 0, regCP_PFP_IC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2461

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE0_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2463

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE0_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2472

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2477

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2554

WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2556

WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2563

WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2586

WREG32_SOC15(GC, 0, regCP_ME_IC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2606

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE1_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2608

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE1_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2617

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_BASE_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2622

WREG32_SOC15(GC, 0, regCP_GFX_RS64_DC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2669

WREG32_SOC15(GC, 0, regCP_MAX_CONTEXT,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2671

WREG32_SOC15(GC, 0, regCP_DEVICE_ID, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2687

WREG32_SOC15(GC, 0, regGRBM_GFX_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2705

WREG32_SOC15(GC, 0, regCP_RB_DOORBELL_CONTROL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2709

WREG32_SOC15(GC, 0, regCP_RB_DOORBELL_RANGE_LOWER, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2711

WREG32_SOC15(GC, 0, regCP_RB_DOORBELL_RANGE_UPPER,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2723

WREG32_SOC15(GC, 0, regCP_RB_WPTR_DELAY, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2726

WREG32_SOC15(GC, 0, regCP_RB_VMID, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2737

WREG32_SOC15(GC, 0, regCP_RB0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2741

WREG32_SOC15(GC, 0, regCP_RB0_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2742

WREG32_SOC15(GC, 0, regCP_RB0_WPTR_HI, upper_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2746

WREG32_SOC15(GC, 0, regCP_RB0_RPTR_ADDR, lower_32_bits(rptr_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2747

WREG32_SOC15(GC, 0, regCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) &

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2751

WREG32_SOC15(GC, 0, regCP_RB_WPTR_POLL_ADDR_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2753

WREG32_SOC15(GC, 0, regCP_RB_WPTR_POLL_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2757

WREG32_SOC15(GC, 0, regCP_RB0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2760

WREG32_SOC15(GC, 0, regCP_RB0_BASE, rb_addr);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2761

WREG32_SOC15(GC, 0, regCP_RB0_BASE_HI, upper_32_bits(rb_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2763

WREG32_SOC15(GC, 0, regCP_RB_ACTIVE, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2803

WREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2873

WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2878

WREG32_SOC15(GC, 0, regCP_MEC_DC_BASE_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2884

WREG32_SOC15(GC, 0, regCP_MEC_MDBASE_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2887

WREG32_SOC15(GC, 0, regCP_MEC_MDBASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2891

WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2893

WREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2902

WREG32_SOC15(GC, 0, regCP_MEC_DC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2921

WREG32_SOC15(GC, 0, regCP_CPC_IC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2951

WREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS, tmp | 0x80);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2957

WREG32_SOC15(GC, 0, regCP_RB_DOORBELL_RANGE_LOWER,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2959

WREG32_SOC15(GC, 0, regCP_RB_DOORBELL_RANGE_UPPER,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2963

WREG32_SOC15(GC, 0, regCP_MEC_DOORBELL_RANGE_LOWER,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

2965

WREG32_SOC15(GC, 0, regCP_MEC_DOORBELL_RANGE_UPPER,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3257

WREG32_SOC15(GC, 0, regCP_HQD_ACTIVE, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3263

WREG32_SOC15(GC, 0, regCP_HQD_EOP_BASE_ADDR,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3265

WREG32_SOC15(GC, 0, regCP_HQD_EOP_BASE_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3269

WREG32_SOC15(GC, 0, regCP_HQD_EOP_CONTROL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3273

WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3278

WREG32_SOC15(GC, 0, regCP_HQD_DEQUEUE_REQUEST, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3284

WREG32_SOC15(GC, 0, regCP_HQD_DEQUEUE_REQUEST,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3286

WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3288

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3290

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3295

WREG32_SOC15(GC, 0, regCP_MQD_BASE_ADDR,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3297

WREG32_SOC15(GC, 0, regCP_MQD_BASE_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3301

WREG32_SOC15(GC, 0, regCP_MQD_CONTROL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3305

WREG32_SOC15(GC, 0, regCP_HQD_PQ_BASE,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3307

WREG32_SOC15(GC, 0, regCP_HQD_PQ_BASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3311

WREG32_SOC15(GC, 0, regCP_HQD_PQ_CONTROL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3315

WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR_REPORT_ADDR,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3317

WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR_REPORT_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3321

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3323

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3328

WREG32_SOC15(GC, 0, regCP_MEC_DOORBELL_RANGE_LOWER,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3330

WREG32_SOC15(GC, 0, regCP_MEC_DOORBELL_RANGE_UPPER,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3334

WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3338

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3340

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3344

WREG32_SOC15(GC, 0, regCP_HQD_VMID, mqd->cp_hqd_vmid);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3346

WREG32_SOC15(GC, 0, regCP_HQD_PERSISTENT_STATE,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3350

WREG32_SOC15(GC, 0, regCP_HQD_ACTIVE,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3584

WREG32_SOC15(GC, 0, regCPC_PSP_DEBUG, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3588

WREG32_SOC15(GC, 0, regCPG_PSP_DEBUG, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3775

WREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3927

WREG32_SOC15(GC, 0, regRLC_SAFE_MODE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3941

WREG32_SOC15(GC, 0, regRLC_SAFE_MODE, RLC_SAFE_MODE__CMD_MASK);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3960

WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

3982

WREG32_SOC15(GC, 0, regRLC_SPM_MC_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4066

WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4084

WREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4102

WREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL_3D, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4112

WREG32_SOC15(GC, 0, regCP_RB_WPTR_POLL_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4119

WREG32_SOC15(GC, 0, regCP_INT_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4123

WREG32_SOC15(GC, 0, regSDMA0_RLC_CGCG_CTRL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4129

WREG32_SOC15(GC, 0, regSDMA1_RLC_CGCG_CTRL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4142

WREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4153

WREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL_3D, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4175

WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4186

WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4209

WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4228

WREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4353

WREG32_SOC15(GC, 0, regCP_RB0_WPTR,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

4355

WREG32_SOC15(GC, 0, regCP_RB0_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5272

WREG32_SOC15(GC, 0, regCP_ME_CNTL, reset_pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5273

WREG32_SOC15(GC, 0, regCP_ME_CNTL, clean_pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5370

WREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL, reset_pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5371

WREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL, clean_pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5391

WREG32_SOC15(GC, 0, regCP_MEC_CNTL, reset_pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5392

WREG32_SOC15(GC, 0, regCP_MEC_CNTL, clean_pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

5676

WREG32_SOC15(GC, 0, regGC_USER_SHADER_ARRAY_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

818

WREG32_SOC15(GC, 0, regSQ_IND_INDEX,

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

828

WREG32_SOC15(GC, 0, regSQ_IND_INDEX,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1109

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1112

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1115

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1131

WREG32_SOC15(GC, GET_INST(GC, i), regRLC_GPM_THREAD_ENABLE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1132

WREG32_SOC15(GC, GET_INST(GC, i), regRLC_CNTL, RLC_CNTL__RLC_ENABLE_F32_MASK);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1419

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regSH_MEM_CONFIG, DEFAULT_SH_MEM_CONFIG);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1420

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regSH_MEM_BASES, sh_mem_bases);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1425

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regSPI_GDBG_PER_VMID_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1430

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regSQ_DEBUG, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1457

WREG32_SOC15(GC, GET_INST(GC, xcc_id),

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1464

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regSH_MEM_BASES, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1508

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_INT_CNTL_RING0, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1516

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CSIB_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1518

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CSIB_ADDR_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1520

WREG32_SOC15(GC, GET_INST(GC, xcc_id),

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1532

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1583

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_PG_CNTL, rlc_pg_cntl);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1632

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_GPM_UCODE_ADDR,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1636

WREG32_SOC15(GC, GET_INST(GC, xcc_id),

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1640

WREG32_SOC15(GC, GET_INST(GC, xcc_id),

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1659

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_LX6_IRAM_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1664

WREG32_SOC15(GC, GET_INST(GC, xcc_id),

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1669

WREG32_SOC15(GC, GET_INST(GC, xcc_id),

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1676

WREG32_SOC15(GC, GET_INST(GC, xcc_id),

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1681

WREG32_SOC15(GC, GET_INST(GC, xcc_id),

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1686

WREG32_SOC15(GC, GET_INST(GC, xcc_id),

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1692

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_LX6_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1743

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGCG_CGLS_CTRL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1746

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_PG_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1789

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MEC_RS64_PRGRM_CNTR_START,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1792

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MEC_RS64_PRGRM_CNTR_START_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1803

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MEC_RS64_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1810

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MEC_RS64_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1834

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MEC_RS64_PRGRM_CNTR_START,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1837

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MEC_RS64_PRGRM_CNTR_START_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1915

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MEC_RS64_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2010

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_CPC_IC_BASE_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2015

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MEC_DC_BASE_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2021

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MEC_MDBASE_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2025

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MEC_MDBASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2030

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_CPC_IC_BASE_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2032

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_CPC_IC_BASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2041

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MEC_DC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2060

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_CPC_IC_OP_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2091

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CP_SCHEDULERS, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2093

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CP_SCHEDULERS, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2100

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_RB_DOORBELL_RANGE_LOWER, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2101

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_RB_DOORBELL_RANGE_UPPER, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2104

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MEC_DOORBELL_RANGE_LOWER,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2108

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MEC_DOORBELL_RANGE_UPPER,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2255

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_ACTIVE, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2261

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_EOP_BASE_ADDR,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2263

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_EOP_BASE_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2267

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_EOP_CONTROL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2271

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2276

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_DEQUEUE_REQUEST, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2282

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_DEQUEUE_REQUEST,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2284

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_RPTR,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2286

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_WPTR_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2288

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2293

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MQD_BASE_ADDR,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2295

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MQD_BASE_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2299

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MQD_CONTROL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2303

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_BASE,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2305

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_BASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2309

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_CONTROL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2313

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_RPTR_REPORT_ADDR,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2315

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_RPTR_REPORT_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2319

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_WPTR_POLL_ADDR,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2321

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_WPTR_POLL_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2324

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2328

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_WPTR_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2330

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2334

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_VMID, mqd->cp_hqd_vmid);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2336

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PERSISTENT_STATE,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2340

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_ACTIVE,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2625

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCPC_PSP_DEBUG, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2629

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCPG_PSP_DEBUG, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2646

WREG32_SOC15(GC, GET_INST(GC, xcc_id),

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2659

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regTCP_UTCL0_CNTL1, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2665

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regGL1_DRAM_BURST_CTRL, 0xf);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2666

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regGLARB_DRAM_BURST_CTRL, 0xf);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2677

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regTCP_CNTL3, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2688

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regTCP_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2791

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CP_SCHEDULERS, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2922

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_SAFE_MODE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2936

WREG32_SOC15(GC, GET_INST(GC, xcc_id),

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

2969

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_SPM_MC_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3053

WREG32_SOC15(GC, GET_INST(GC, xcc_id),

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3072

WREG32_SOC15(GC, GET_INST(GC, xcc_id),

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3084

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_RB_WPTR_POLL_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3091

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_INT_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3103

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGCG_CGLS_CTRL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3125

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3136

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3159

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3178

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3197

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3937

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regGC_USER_SHADER_ARRAY_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

630

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regSQ_IND_INDEX,

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

641

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regSQ_IND_INDEX,

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1057

WREG32_SOC15(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, 0x2);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1058

WREG32_SOC15(GC, 0, mmSPI_COMPUTE_QUEUE_RESET, 0x1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1692

WREG32_SOC15(GC, 0, mmRLC_PG_ALWAYS_ON_CU_MASK, cu_bitmap);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1702

WREG32_SOC15(GC, 0, mmRLC_LB_ALWAYS_ACTIVE_CU_MASK, cu_bitmap);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1715

WREG32_SOC15(GC, 0, mmRLC_LB_THR_CONFIG_1, 0x0000007F);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1716

WREG32_SOC15(GC, 0, mmRLC_LB_THR_CONFIG_2, 0x0333A5A7);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1717

WREG32_SOC15(GC, 0, mmRLC_LB_THR_CONFIG_3, 0x00000077);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1718

WREG32_SOC15(GC, 0, mmRLC_LB_THR_CONFIG_4, (0x30 | 0x40 << 8 | 0x02FA << 16));

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1721

WREG32_SOC15(GC, 0, mmRLC_LB_CNTR_INIT, 0x00000000);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1724

WREG32_SOC15(GC, 0, mmRLC_LB_CNTR_MAX, 0x00000500);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1729

WREG32_SOC15(GC, 0, mmRLC_LB_INIT_CU_MASK, 0xffffffff);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1735

WREG32_SOC15(GC, 0, mmRLC_LB_PARAMS, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1741

WREG32_SOC15(GC, 0, mmRLC_GPM_GENERAL_7, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1753

WREG32_SOC15(GC, 0, mmRLC_LB_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1764

WREG32_SOC15(GC, 0, mmRLC_LB_THR_CONFIG_1, 0x0000007F);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1765

WREG32_SOC15(GC, 0, mmRLC_LB_THR_CONFIG_2, 0x033388F8);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1766

WREG32_SOC15(GC, 0, mmRLC_LB_THR_CONFIG_3, 0x00000077);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1767

WREG32_SOC15(GC, 0, mmRLC_LB_THR_CONFIG_4, (0x10 | 0x27 << 8 | 0x02FA << 16));

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1770

WREG32_SOC15(GC, 0, mmRLC_LB_CNTR_INIT, 0x00000000);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1773

WREG32_SOC15(GC, 0, mmRLC_LB_CNTR_MAX, 0x00000800);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1778

WREG32_SOC15(GC, 0, mmRLC_LB_INIT_CU_MASK, 0xffffffff);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1784

WREG32_SOC15(GC, 0, mmRLC_LB_PARAMS, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1790

WREG32_SOC15(GC, 0, mmRLC_GPM_GENERAL_7, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1802

WREG32_SOC15(GC, 0, mmRLC_LB_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2654

WREG32_SOC15(GC, 0, mmSQ_CONFIG, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2769

WREG32_SOC15(GC, 0, mmCP_INT_CNTL_RING0, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2874

WREG32_SOC15(GC, 0, mmRLC_GPM_SCRATCH_DATA, register_list_format[i++]);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2878

WREG32_SOC15(GC, 0, mmRLC_GPM_SCRATCH_DATA, register_list_format[i++]);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2879

WREG32_SOC15(GC, 0, mmRLC_GPM_SCRATCH_DATA, register_list_format[i++]);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2883

WREG32_SOC15(GC, 0, mmRLC_GPM_SCRATCH_DATA, j);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3117

WREG32_SOC15(GC, 0, mmRLC_JUMP_TABLE_RESTORE,

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3161

WREG32_SOC15(GC, 0, mmRLC_GPM_TIMER_INT_3, 0x9C4);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3165

WREG32_SOC15(GC, 0, mmRLC_GPM_GENERAL_12, 0x100);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3186

WREG32_SOC15(GC, 0, mmRLC_GPM_UCODE_ADDR,

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3189

WREG32_SOC15(GC, 0, mmRLC_GPM_UCODE_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3190

WREG32_SOC15(GC, 0, mmRLC_GPM_UCODE_ADDR, adev->gfx.rlc_fw_version);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3207

WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3294

WREG32_SOC15(GC, 0, mmCP_PFP_UCODE_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3296

WREG32_SOC15(GC, 0, mmCP_PFP_UCODE_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3297

WREG32_SOC15(GC, 0, mmCP_PFP_UCODE_ADDR, adev->gfx.pfp_fw_version);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3304

WREG32_SOC15(GC, 0, mmCP_CE_UCODE_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3306

WREG32_SOC15(GC, 0, mmCP_CE_UCODE_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3307

WREG32_SOC15(GC, 0, mmCP_CE_UCODE_ADDR, adev->gfx.ce_fw_version);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3314

WREG32_SOC15(GC, 0, mmCP_ME_RAM_WADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3316

WREG32_SOC15(GC, 0, mmCP_ME_RAM_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3317

WREG32_SOC15(GC, 0, mmCP_ME_RAM_WADDR, adev->gfx.me_fw_version);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3330

WREG32_SOC15(GC, 0, mmCP_MAX_CONTEXT, adev->gfx.config.max_hw_contexts - 1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3331

WREG32_SOC15(GC, 0, mmCP_DEVICE_ID, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3400

WREG32_SOC15(GC, 0, mmCP_RB_WPTR_DELAY, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3403

WREG32_SOC15(GC, 0, mmCP_RB_VMID, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3413

WREG32_SOC15(GC, 0, mmCP_RB0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3417

WREG32_SOC15(GC, 0, mmCP_RB0_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3418

WREG32_SOC15(GC, 0, mmCP_RB0_WPTR_HI, upper_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3422

WREG32_SOC15(GC, 0, mmCP_RB0_RPTR_ADDR, lower_32_bits(rptr_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3423

WREG32_SOC15(GC, 0, mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & CP_RB_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3426

WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO, lower_32_bits(wptr_gpu_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3427

WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_HI, upper_32_bits(wptr_gpu_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3430

WREG32_SOC15(GC, 0, mmCP_RB0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3433

WREG32_SOC15(GC, 0, mmCP_RB0_BASE, rb_addr);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3434

WREG32_SOC15(GC, 0, mmCP_RB0_BASE_HI, upper_32_bits(rb_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3445

WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_CONTROL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3449

WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_RANGE_LOWER, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3451

WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_RANGE_UPPER,

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3502

WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3504

WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3506

WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3510

WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR,

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3513

WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_DATA,

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3516

WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR,

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3755

WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_LOWER,

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3763

WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3766

WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

4012

WREG32_SOC15(GC, 0, mmTCP_ADDR_CONFIG, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

4184

WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

4190

WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

4301

WREG32_SOC15(GC, 0, mmRLC_CAPTURE_GPU_CLOCK_COUNT, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

4593

WREG32_SOC15(GC, 0, mmGDS_VMID0_BASE, 0x00000000);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

4594

WREG32_SOC15(GC, 0, mmGDS_VMID0_SIZE, adev->gds.gds_size);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

4619

WREG32_SOC15(GC, 0, mmGDS_VMID0_SIZE, 0x00000000);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

4906

WREG32_SOC15(GC, 0, mmRLC_SAFE_MODE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

4921

WREG32_SOC15(GC, 0, mmRLC_SAFE_MODE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

4982

WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

4991

WREG32_SOC15(GC, 0, mmRLC_MEM_SLP_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

4998

WREG32_SOC15(GC, 0, mmCP_MEM_SLP_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5014

WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5020

WREG32_SOC15(GC, 0, mmRLC_MEM_SLP_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5027

WREG32_SOC15(GC, 0, mmCP_MEM_SLP_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5048

WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5063

WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5070

WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5079

WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5098

WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5113

WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5120

WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5127

WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5175

WREG32_SOC15(GC, 0, mmRLC_SPM_MC_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5378

WREG32_SOC15(GC, 0, mmCP_RB0_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5379

WREG32_SOC15(GC, 0, mmCP_RB0_WPTR_HI, upper_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

5950

WREG32_SOC15(GC, 0, mmSQ_CMD, value);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6875

WREG32_SOC15(GC, 0, mmVM_L2_MEM_ECC_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6876

WREG32_SOC15(GC, 0, mmVM_L2_MEM_ECC_CNT, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6877

WREG32_SOC15(GC, 0, mmVM_L2_WALKER_MEM_ECC_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6878

WREG32_SOC15(GC, 0, mmVM_L2_WALKER_MEM_ECC_CNT, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6879

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_EDC_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6880

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_EDC_CNT, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6881

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_EDC_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6882

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_EDC_CNT, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6885

WREG32_SOC15(GC, 0, mmVM_L2_MEM_ECC_INDEX, i);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6904

WREG32_SOC15(GC, 0, mmVM_L2_WALKER_MEM_ECC_INDEX, i);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6925

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_EDC_INDEX, i);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6938

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_EDC_INDEX, i);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6958

WREG32_SOC15(GC, 0, mmVM_L2_MEM_ECC_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6959

WREG32_SOC15(GC, 0, mmVM_L2_WALKER_MEM_ECC_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6960

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_EDC_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

6961

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_EDC_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7025

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xe0000000);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7028

WREG32_SOC15(GC, 0, mmVM_L2_MEM_ECC_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7029

WREG32_SOC15(GC, 0, mmVM_L2_MEM_ECC_CNT, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7030

WREG32_SOC15(GC, 0, mmVM_L2_WALKER_MEM_ECC_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7031

WREG32_SOC15(GC, 0, mmVM_L2_WALKER_MEM_ECC_CNT, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7032

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_EDC_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7033

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_EDC_CNT, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7034

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_EDC_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7035

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_EDC_CNT, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7038

WREG32_SOC15(GC, 0, mmVM_L2_MEM_ECC_INDEX, i);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7043

WREG32_SOC15(GC, 0, mmVM_L2_WALKER_MEM_ECC_INDEX, i);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7048

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_EDC_INDEX, i);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7053

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_EDC_INDEX, i);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7057

WREG32_SOC15(GC, 0, mmVM_L2_MEM_ECC_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7058

WREG32_SOC15(GC, 0, mmVM_L2_WALKER_MEM_ECC_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7059

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_EDC_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7060

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_EDC_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

7824

WREG32_SOC15(GC, 0, mmGC_USER_SHADER_ARRAY_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

694

WREG32_SOC15(GC, 0, mmVML2_MEM_ECC_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

695

WREG32_SOC15(GC, 0, mmVML2_MEM_ECC_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

696

WREG32_SOC15(GC, 0, mmVML2_WALKER_MEM_ECC_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

697

WREG32_SOC15(GC, 0, mmVML2_WALKER_MEM_ECC_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

698

WREG32_SOC15(GC, 0, mmUTCL2_MEM_ECC_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

699

WREG32_SOC15(GC, 0, mmUTCL2_MEM_ECC_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

701

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_DSM_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

702

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_DSM_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

703

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_DSM_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

704

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_DSM_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

707

WREG32_SOC15(GC, 0, mmVML2_MEM_ECC_INDEX, i);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

728

WREG32_SOC15(GC, 0, mmVML2_WALKER_MEM_ECC_INDEX, i);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

751

WREG32_SOC15(GC, 0, mmUTCL2_MEM_ECC_INDEX, i);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

772

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_DSM_INDEX, i);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

795

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_DSM_INDEX, i);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

817

WREG32_SOC15(GC, 0, mmVML2_MEM_ECC_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

818

WREG32_SOC15(GC, 0, mmVML2_WALKER_MEM_ECC_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

819

WREG32_SOC15(GC, 0, mmUTCL2_MEM_ECC_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

820

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_DSM_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

821

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_DSM_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

925

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xe0000000);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

928

WREG32_SOC15(GC, 0, mmVML2_MEM_ECC_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

929

WREG32_SOC15(GC, 0, mmVML2_MEM_ECC_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

930

WREG32_SOC15(GC, 0, mmVML2_WALKER_MEM_ECC_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

931

WREG32_SOC15(GC, 0, mmVML2_WALKER_MEM_ECC_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

932

WREG32_SOC15(GC, 0, mmUTCL2_MEM_ECC_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

933

WREG32_SOC15(GC, 0, mmUTCL2_MEM_ECC_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

935

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_DSM_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

936

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_DSM_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

937

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_DSM_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

938

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_DSM_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

941

WREG32_SOC15(GC, 0, mmVML2_MEM_ECC_INDEX, i);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

946

WREG32_SOC15(GC, 0, mmVML2_WALKER_MEM_ECC_INDEX, i);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

951

WREG32_SOC15(GC, 0, mmUTCL2_MEM_ECC_INDEX, i);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

956

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_DSM_INDEX, i);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

961

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_DSM_INDEX, i);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

965

WREG32_SOC15(GC, 0, mmVML2_MEM_ECC_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

966

WREG32_SOC15(GC, 0, mmVML2_WALKER_MEM_ECC_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

967

WREG32_SOC15(GC, 0, mmUTCL2_MEM_ECC_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

968

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_DSM_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

969

WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_DSM_INDEX, 255);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

1681

WREG32_SOC15(GC, 0, regUTCL2_MEM_ECC_STATUS, 0x3);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

1682

WREG32_SOC15(GC, 0, regVML2_MEM_ECC_STATUS, 0x3);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

1683

WREG32_SOC15(GC, 0, regVML2_WALKER_MEM_ECC_STATUS, 0x3);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

1753

WREG32_SOC15(GC, 0, regUTCL2_MEM_ECC_STATUS, 0x3);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

1759

WREG32_SOC15(GC, 0, regVML2_MEM_ECC_STATUS, 0x3);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

1765

WREG32_SOC15(GC, 0, regVML2_WALKER_MEM_ECC_STATUS, 0x3);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

1810

WREG32_SOC15(GC, 0, regSQ_TIMEOUT_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

1894

WREG32_SOC15(GC, 0, regSQ_TIMEOUT_STATUS, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

1916

WREG32_SOC15(GC, 0, regSQ_TIMEOUT_STATUS, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

759

WREG32_SOC15(GC, 0, regSQ_CONFIG1, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

797

WREG32_SOC15(GC, 0, regGC_THROTTLE_CTRL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

801

WREG32_SOC15(GC, 0, regGC_THROTTLE_CTRL1, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

803

WREG32_SOC15(GC, 0, regGC_CAC_IND_INDEX, ixPWRBRK_STALL_PATTERN_CTRL);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

806

WREG32_SOC15(GC, 0, regGC_CAC_IND_DATA, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1294

WREG32_SOC15(GC, xcc_id, regSQ_CONFIG1, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1395

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCPC_PSP_DEBUG, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1417

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_SAFE_MODE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1433

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_SAFE_MODE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1519

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_INT_CNTL_RING0, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1590

WREG32_SOC15(GC, GET_INST(GC, i), regRLC_GPM_TIMER_INT_3, 0x9C4);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1594

WREG32_SOC15(GC, GET_INST(GC, i), regRLC_GPM_GENERAL_12, 0x100);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1617

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_GPM_UCODE_ADDR,

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1624

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_GPM_UCODE_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1626

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_GPM_UCODE_ADDR, adev->gfx.rlc_fw_version);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1646

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGCG_CGLS_CTRL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1688

WREG32_SOC15(GC, GET_INST(GC, inst), regRLC_SPM_MC_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1776

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_CPC_IC_BASE_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1778

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_CPC_IC_BASE_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1780

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_CPC_IC_BASE_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2032

WREG32_SOC15(

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2038

WREG32_SOC15(

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2469

WREG32_SOC15(GC, GET_INST(GC, 0), regGRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2475

WREG32_SOC15(GC, GET_INST(GC, 0), regGRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2572

WREG32_SOC15(GC, GET_INST(GC, xcc_id),

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2594

WREG32_SOC15(GC, GET_INST(GC, xcc_id),

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2615

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2624

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_MEM_SLP_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2631

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MEM_SLP_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2644

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2650

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_MEM_SLP_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2657

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MEM_SLP_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2680

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2692

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGCG_CGLS_CTRL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2699

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_RB_WPTR_POLL_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

2706

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGCG_CGLS_CTRL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

304

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_DEQUEUE_REQUEST, 0x2);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

3047

WREG32_SOC15(GC, GET_INST(GC, ring->xcc_id), regSQ_CMD, value);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

305

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regSPI_COMPUTE_QUEUE_RESET, 0x1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

3537

WREG32_SOC15(GC, GET_INST(GC, ring->xcc_id), regCP_MEC_CNTL, reset_pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

3538

WREG32_SOC15(GC, GET_INST(GC, ring->xcc_id), regCP_MEC_CNTL, clean_pipe);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

355

WREG32_SOC15(GC, dev_inst, regGB_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

4519

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regSQ_TIMEOUT_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

4870

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regGC_USER_SHADER_ARRAY_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

4948

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_CPC_DEBUG, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

514

WREG32_SOC15(GC, GET_INST(GC, 0), regRLC_CAPTURE_GPU_CLOCK_COUNT, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

817

WREG32_SOC15(GC, GET_INST(GC, i), regCP_HYP_XCP_CTL,

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

144

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

146

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

149

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

151

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

159

WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BASE, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

160

WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

161

WREG32_SOC15(GC, 0, regGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

164

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

167

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

172

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

174

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

178

WREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

180

WREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

204

WREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

229

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

234

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

246

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL3, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

251

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL4, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

255

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL5, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

267

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

278

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

280

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

283

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

285

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

288

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

289

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

363

WREG32_SOC15(GC, 0, regGCMC_VM_FB_LOCATION_BASE,

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

365

WREG32_SOC15(GC, 0, regGCMC_VM_FB_LOCATION_TOP,

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

399

WREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

403

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL3, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

420

WREG32_SOC15(GC, 0, regCP_DEBUG, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c

458

WREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

147

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

149

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

152

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

154

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

163

WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BASE, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

164

WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

165

WREG32_SOC15(GC, 0, regGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

168

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

170

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

176

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

178

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

182

WREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

184

WREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

209

WREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

234

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

239

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

251

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL3, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

256

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL4, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

260

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL5, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

272

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

283

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

285

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

288

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

290

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

293

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

294

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

368

WREG32_SOC15(GC, 0, regGCMC_VM_FB_LOCATION_BASE,

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

370

WREG32_SOC15(GC, 0, regGCMC_VM_FB_LOCATION_TOP,

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

404

WREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

408

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL3, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

425

WREG32_SOC15(GC, 0, regCP_DEBUG, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c

463

WREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

111

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

114

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

118

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

121

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

125

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

128

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

132

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

135

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

170

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

173

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

176

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

179

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

185

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

188

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

193

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

196

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

206

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

214

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

216

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

218

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

221

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

223

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

225

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

227

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

229

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

231

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

234

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

237

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

239

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

360

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

371

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

374

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

378

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

381

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

385

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

388

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

488

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

491

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

494

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

497

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

555

WREG32_SOC15(GC, GET_INST(GC, j), regGCVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

556

WREG32_SOC15(GC, GET_INST(GC, j), regGCVM_L2_CNTL3, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

625

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c

634

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

126

WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

128

WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

132

WREG32_SOC15(GC, 0, mmVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

134

WREG32_SOC15(GC, 0, mmVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

145

WREG32_SOC15(GC, 0, mmMC_VM_FB_LOCATION_TOP, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

146

WREG32_SOC15(GC, 0, mmMC_VM_FB_LOCATION_BASE, 0x00FFFFFF);

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

147

WREG32_SOC15(GC, 0, mmMC_VM_AGP_TOP, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

148

WREG32_SOC15(GC, 0, mmMC_VM_AGP_BOT, 0xFFFFFF);

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

149

WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR, 0x3FFFFFFF);

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

150

WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

230

WREG32_SOC15(GC, 0, mmVM_CONTEXT0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

235

WREG32_SOC15(GC, 0, mmVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

237

WREG32_SOC15(GC, 0, mmVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

240

WREG32_SOC15(GC, 0, mmVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

242

WREG32_SOC15(GC, 0, mmVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

245

WREG32_SOC15(GC, 0, mmVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

246

WREG32_SOC15(GC, 0, mmVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

367

WREG32_SOC15(GC, 0, mmVM_L2_CNTL3, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

412

WREG32_SOC15(GC, 0, mmVM_L2_PROTECTION_FAULT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

69

WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

71

WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

74

WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

76

WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

79

WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

81

WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

84

WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

86

WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

101

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

104

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

108

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

111

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

115

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

118

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

165

WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

167

WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

171

WREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

173

WREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

179

WREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

186

WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_FB_LOCATION_TOP, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

187

WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_FB_LOCATION_BASE, 0x00FFFFFF);

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

188

WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_AGP_TOP, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

189

WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_AGP_BOT, 0xFFFFFF);

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

190

WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_SYSTEM_APERTURE_LOW_ADDR, 0x3FFFFFFF);

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

191

WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_SYSTEM_APERTURE_HIGH_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

286

WREG32_SOC15(GC, GET_INST(GC, i), regVM_CONTEXT0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

297

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

300

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

304

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

307

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

311

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

313

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

472

WREG32_SOC15(GC, GET_INST(GC, j), regVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

473

WREG32_SOC15(GC, GET_INST(GC, j), regVM_L2_CNTL3, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

525

WREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

94

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

97

WREG32_SOC15(GC, GET_INST(GC, i),

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

140

WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

142

WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

145

WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

147

WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

157

WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BASE, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

158

WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

159

WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

162

WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

164

WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

169

WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

171

WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

176

WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

178

WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

202

WREG32_SOC15(GC, 0, mmGCMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

225

WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

230

WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

242

WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL3, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

247

WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL4, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

251

WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL5, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

263

WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

268

WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

270

WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

273

WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

275

WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

278

WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

279

WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

377

WREG32_SOC15(GC, 0, mmGCMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

382

WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL3, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

427

WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

143

WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

145

WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

148

WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

150

WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

162

WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BASE, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

163

WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

164

WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

167

WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

169

WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

174

WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

176

WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

180

WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

182

WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

206

WREG32_SOC15(GC, 0, mmGCMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

231

WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

236

WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

248

WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL3, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

253

WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL4, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

257

WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL5, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

269

WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

280

WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

282

WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

285

WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

287

WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

290

WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

291

WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

365

WREG32_SOC15(GC, 0, mmGCMC_VM_FB_LOCATION_BASE,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

367

WREG32_SOC15(GC, 0, mmGCMC_VM_FB_LOCATION_TOP,

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

401

WREG32_SOC15(GC, 0, mmGCMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

408

WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL3, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

458

WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

542

WREG32_SOC15(GC, 0, mmGCUTCL2_HARVEST_BYPASS_GROUPS_YELLOW_CARP, disabled_sa);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

588

WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL, adev->gmc.VM_L2_CNTL);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

589

WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL2, adev->gmc.VM_L2_CNTL2);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

590

WREG32_SOC15(GC, 0, mmGCVM_DUMMY_PAGE_FAULT_CNTL, adev->gmc.VM_DUMMY_PAGE_FAULT_CNTL);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

591

WREG32_SOC15(GC, 0, mmGCVM_DUMMY_PAGE_FAULT_ADDR_LO32, adev->gmc.VM_DUMMY_PAGE_FAULT_ADDR_LO32);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

592

WREG32_SOC15(GC, 0, mmGCVM_DUMMY_PAGE_FAULT_ADDR_HI32, adev->gmc.VM_DUMMY_PAGE_FAULT_ADDR_HI32);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

593

WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL, adev->gmc.VM_L2_PROTECTION_FAULT_CNTL);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

594

WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL2, adev->gmc.VM_L2_PROTECTION_FAULT_CNTL2);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

595

WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_MM_CNTL3, adev->gmc.VM_L2_PROTECTION_FAULT_MM_CNTL3);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

596

WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_MM_CNTL4, adev->gmc.VM_L2_PROTECTION_FAULT_MM_CNTL4);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

597

WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_ADDR_LO32, adev->gmc.VM_L2_PROTECTION_FAULT_ADDR_LO32);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

598

WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_ADDR_HI32, adev->gmc.VM_L2_PROTECTION_FAULT_ADDR_HI32);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

599

WREG32_SOC15(GC, 0, mmGCVM_DEBUG, adev->gmc.VM_DEBUG);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

600

WREG32_SOC15(GC, 0, mmGCVM_L2_MM_GROUP_RT_CLASSES, adev->gmc.VM_L2_MM_GROUP_RT_CLASSES);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

601

WREG32_SOC15(GC, 0, mmGCVM_L2_BANK_SELECT_RESERVED_CID, adev->gmc.VM_L2_BANK_SELECT_RESERVED_CID);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

602

WREG32_SOC15(GC, 0, mmGCVM_L2_BANK_SELECT_RESERVED_CID2, adev->gmc.VM_L2_BANK_SELECT_RESERVED_CID2);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

603

WREG32_SOC15(GC, 0, mmGCVM_L2_CACHE_PARITY_CNTL, adev->gmc.VM_L2_CACHE_PARITY_CNTL);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

604

WREG32_SOC15(GC, 0, mmGCVM_L2_IH_LOG_CNTL, adev->gmc.VM_L2_IH_LOG_CNTL);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

616

WREG32_SOC15(GC, 0, mmGCMC_VM_FB_LOCATION_BASE, adev->gmc.vram_start >> 24);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

617

WREG32_SOC15(GC, 0, mmGCMC_VM_FB_LOCATION_TOP, adev->gmc.vram_end >> 24);

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

618

WREG32_SOC15(GC, 0, mmGCMC_VM_MX_L1_TLB_CNTL, adev->gmc.MC_VM_MX_L1_TLB_CNTL);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

139

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

141

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

144

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

146

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

155

WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BASE, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

156

WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

157

WREG32_SOC15(GC, 0, regGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

161

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

163

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

168

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

170

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

174

WREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

176

WREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

201

WREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

226

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

231

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

243

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL3, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

248

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL4, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

252

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL5, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

264

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

275

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

277

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

280

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

282

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

285

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

286

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

360

WREG32_SOC15(GC, 0, regGCMC_VM_FB_LOCATION_BASE,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

362

WREG32_SOC15(GC, 0, regGCMC_VM_FB_LOCATION_TOP,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

396

WREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

400

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL3, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

417

WREG32_SOC15(GC, 0, regCP_DEBUG, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c

455

WREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

142

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

144

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

147

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

149

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

161

WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BASE, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

162

WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

163

WREG32_SOC15(GC, 0, regGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

166

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

168

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

173

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

175

WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

179

WREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

181

WREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

206

WREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

231

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

236

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

248

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL3, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

253

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL4, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

257

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL5, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

269

WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

280

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

282

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

285

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

287

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

290

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

291

WREG32_SOC15(GC, 0, regGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

389

WREG32_SOC15(GC, 0, regGCMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

393

WREG32_SOC15(GC, 0, regGCVM_L2_CNTL3, 0);

drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c

443

WREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

2106

WREG32_SOC15(DCE, 0, mmDCHUBBUB_SDPIF_MMIO_CNTRL_0, adev->gmc.sdpif_register);

drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c

156

WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE, (adev->gmc.vram_start >> 8));

drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c

157

WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE_HI, (adev->gmc.vram_start >> 40));

drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c

77

WREG32_SOC15(HDP, 0, mmHDP_EDC_CNT, 0);

drivers/gpu/drm/amd/amdgpu/hdp_v5_0.c

124

WREG32_SOC15(HDP, 0, mmHDP_MEM_POWER_CTRL, hdp_mem_pwr_cntl);

drivers/gpu/drm/amd/amdgpu/hdp_v5_0.c

133

WREG32_SOC15(HDP, 0, mmHDP_CLK_CNTL, hdp_clk_cntl);

drivers/gpu/drm/amd/amdgpu/hdp_v5_0.c

164

WREG32_SOC15(HDP, 0, mmHDP_CLK_CNTL, hdp_clk_cntl);

drivers/gpu/drm/amd/amdgpu/hdp_v5_0.c

205

WREG32_SOC15(HDP, 0, mmHDP_MISC_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/hdp_v5_0.c

62

WREG32_SOC15(HDP, 0, mmHDP_CLK_CNTL, hdp_clk_cntl);

drivers/gpu/drm/amd/amdgpu/hdp_v5_0.c

82

WREG32_SOC15(HDP, 0, mmHDP_MEM_POWER_CTRL, hdp_mem_pwr_cntl);

drivers/gpu/drm/amd/amdgpu/hdp_v5_2.c

127

WREG32_SOC15(HDP, 0, regHDP_MEM_POWER_CTRL, hdp_mem_pwr_cntl);

drivers/gpu/drm/amd/amdgpu/hdp_v5_2.c

136

WREG32_SOC15(HDP, 0, regHDP_CLK_CNTL, hdp_clk_cntl);

drivers/gpu/drm/amd/amdgpu/hdp_v5_2.c

167

WREG32_SOC15(HDP, 0, regHDP_CLK_CNTL, hdp_clk_cntl);

drivers/gpu/drm/amd/amdgpu/hdp_v5_2.c

73

WREG32_SOC15(HDP, 0, regHDP_CLK_CNTL, hdp_clk_cntl);

drivers/gpu/drm/amd/amdgpu/hdp_v5_2.c

92

WREG32_SOC15(HDP, 0, regHDP_MEM_POWER_CTRL, hdp_mem_pwr_cntl);

drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c

112

WREG32_SOC15(HDP, 0, regHDP_MEM_POWER_CTRL, hdp_mem_pwr_cntl);

drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c

120

WREG32_SOC15(HDP, 0, regHDP_CLK_CNTL_V6_1, hdp_clk_cntl);

drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c

122

WREG32_SOC15(HDP, 0, regHDP_CLK_CNTL, hdp_clk_cntl);

drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c

55

WREG32_SOC15(HDP, 0, regHDP_CLK_CNTL_V6_1, hdp_clk_cntl);

drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c

57

WREG32_SOC15(HDP, 0, regHDP_CLK_CNTL, hdp_clk_cntl);

drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c

76

WREG32_SOC15(HDP, 0, regHDP_MEM_POWER_CTRL, hdp_mem_pwr_cntl);

drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c

103

WREG32_SOC15(HDP, 0, regHDP_MEM_POWER_CTRL, hdp_mem_pwr_cntl);

drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c

110

WREG32_SOC15(HDP, 0, regHDP_CLK_CNTL, hdp_clk_cntl);

drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c

48

WREG32_SOC15(HDP, 0, regHDP_CLK_CNTL, hdp_clk_cntl);

drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c

67

WREG32_SOC15(HDP, 0, regHDP_MEM_POWER_CTRL, hdp_mem_pwr_cntl);

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

112

WREG32_SOC15(OSSSYS, 0, regIH_RB_CNTL_RING1, ih_rb_cntl);

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

115

WREG32_SOC15(OSSSYS, 0, regIH_CNTL2, ih_cntl);

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

342

WREG32_SOC15(OSSSYS, 0, regIH_CHICKEN, ih_chicken);

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

362

WREG32_SOC15(OSSSYS, 0, regIH_STORM_CLIENT_LIST_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

366

WREG32_SOC15(OSSSYS, 0, regIH_INT_FLOOD_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

376

WREG32_SOC15(OSSSYS, 0, regIH_MSI_STORM_CTRL, tmp);

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

382

WREG32_SOC15(OSSSYS, 0, regIH_RING1_CLIENT_CFG_INDEX, tmp);

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

390

WREG32_SOC15(OSSSYS, 0, regIH_RING1_CLIENT_CFG_DATA, tmp);

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

695

WREG32_SOC15(OSSSYS, 0, regIH_CLK_CTRL, data);

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

718

WREG32_SOC15(OSSSYS, 0, regIH_MEM_POWER_CTRL, ih_mem_pwr_cntl);

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

759

WREG32_SOC15(OSSSYS, 0, regIH_MEM_POWER_CTRL, ih_mem_pwr_cntl);

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

112

WREG32_SOC15(OSSSYS, 0, regIH_RB_CNTL_RING1, ih_rb_cntl);

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

115

WREG32_SOC15(OSSSYS, 0, regIH_CNTL2, ih_cntl);

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

314

WREG32_SOC15(OSSSYS, 0, regIH_CHICKEN, ih_chicken);

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

333

WREG32_SOC15(OSSSYS, 0, regIH_STORM_CLIENT_LIST_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

337

WREG32_SOC15(OSSSYS, 0, regIH_INT_FLOOD_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

347

WREG32_SOC15(OSSSYS, 0, regIH_MSI_STORM_CTRL, tmp);

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

353

WREG32_SOC15(OSSSYS, 0, regIH_RING1_CLIENT_CFG_INDEX, tmp);

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

361

WREG32_SOC15(OSSSYS, 0, regIH_RING1_CLIENT_CFG_DATA, tmp);

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

670

WREG32_SOC15(OSSSYS, 0, regIH_CLK_CTRL, data);

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

695

WREG32_SOC15(OSSSYS, 0, regIH_MEM_POWER_CTRL, ih_mem_pwr_cntl);

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

736

WREG32_SOC15(OSSSYS, 0, regIH_MEM_POWER_CTRL, ih_mem_pwr_cntl);

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

112

WREG32_SOC15(OSSSYS, 0, regIH_RB_CNTL_RING1, ih_rb_cntl);

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

115

WREG32_SOC15(OSSSYS, 0, regIH_CNTL2, ih_cntl);

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

324

WREG32_SOC15(OSSSYS, 0, regIH_CHICKEN, ih_chicken);

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

343

WREG32_SOC15(OSSSYS, 0, regIH_STORM_CLIENT_LIST_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

347

WREG32_SOC15(OSSSYS, 0, regIH_INT_FLOOD_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

357

WREG32_SOC15(OSSSYS, 0, regIH_MSI_STORM_CTRL, tmp);

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

363

WREG32_SOC15(OSSSYS, 0, regIH_RING1_CLIENT_CFG_INDEX, tmp);

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

371

WREG32_SOC15(OSSSYS, 0, regIH_RING1_CLIENT_CFG_DATA, tmp);

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

379

WREG32_SOC15(OSSSYS, 0, regIH_DOORBELL_RETRY_CAM,

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

386

WREG32_SOC15(OSSSYS, 0, regIH_RETRY_INT_CAM_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

688

WREG32_SOC15(OSSSYS, 0, regIH_CLK_CTRL, data);

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

713

WREG32_SOC15(OSSSYS, 0, regIH_MEM_POWER_CTRL, ih_mem_pwr_cntl);

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

754

WREG32_SOC15(OSSSYS, 0, regIH_MEM_POWER_CTRL, ih_mem_pwr_cntl);

drivers/gpu/drm/amd/amdgpu/imu_v11_0.c

109

WREG32_SOC15(GC, 0, regGFX_IMU_I_RAM_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/imu_v11_0.c

112

WREG32_SOC15(GC, 0, regGFX_IMU_I_RAM_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/imu_v11_0.c

114

WREG32_SOC15(GC, 0, regGFX_IMU_I_RAM_ADDR, adev->gfx.imu_fw_version);

drivers/gpu/drm/amd/amdgpu/imu_v11_0.c

121

WREG32_SOC15(GC, 0, regGFX_IMU_D_RAM_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/imu_v11_0.c

124

WREG32_SOC15(GC, 0, regGFX_IMU_D_RAM_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/imu_v11_0.c

126

WREG32_SOC15(GC, 0, regGFX_IMU_D_RAM_ADDR, adev->gfx.imu_fw_version);

drivers/gpu/drm/amd/amdgpu/imu_v11_0.c

155

WREG32_SOC15(GC, 0, regGFX_IMU_C2PMSG_ACCESS_CTRL0, 0xffffff);

drivers/gpu/drm/amd/amdgpu/imu_v11_0.c

156

WREG32_SOC15(GC, 0, regGFX_IMU_C2PMSG_ACCESS_CTRL1, 0xffff);

drivers/gpu/drm/amd/amdgpu/imu_v11_0.c

161

WREG32_SOC15(GC, 0, regGFX_IMU_C2PMSG_16, imu_reg_val);

drivers/gpu/drm/amd/amdgpu/imu_v11_0.c

167

WREG32_SOC15(GC, 0, regGFX_IMU_SCRATCH_10, imu_reg_val);

drivers/gpu/drm/amd/amdgpu/imu_v11_0.c

177

WREG32_SOC15(GC, 0, regGFX_IMU_CORE_CTRL, imu_reg_val);

drivers/gpu/drm/amd/amdgpu/imu_v11_0.c

348

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_HIGH, 0);

drivers/gpu/drm/amd/amdgpu/imu_v11_0.c

349

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_LOW, reg);

drivers/gpu/drm/amd/amdgpu/imu_v11_0.c

350

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_DATA, data);

drivers/gpu/drm/amd/amdgpu/imu_v11_0.c

353

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_HIGH, 0);

drivers/gpu/drm/amd/amdgpu/imu_v11_0.c

354

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_LOW, 0);

drivers/gpu/drm/amd/amdgpu/imu_v11_0.c

355

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_DATA, 0);

drivers/gpu/drm/amd/amdgpu/imu_v11_0.c

362

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_INDEX, 0x2);

drivers/gpu/drm/amd/amdgpu/imu_v11_0.c

384

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_INDEX, reg_data);

drivers/gpu/drm/amd/amdgpu/imu_v11_0_3.c

130

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_HIGH, 0);

drivers/gpu/drm/amd/amdgpu/imu_v11_0_3.c

131

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_LOW, reg);

drivers/gpu/drm/amd/amdgpu/imu_v11_0_3.c

132

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_DATA, data);

drivers/gpu/drm/amd/amdgpu/imu_v11_0_3.c

135

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_HIGH, 0);

drivers/gpu/drm/amd/amdgpu/imu_v11_0_3.c

136

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_LOW, 0);

drivers/gpu/drm/amd/amdgpu/imu_v11_0_3.c

137

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_DATA, 0);

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

102

WREG32_SOC15(GC, 0, regGFX_IMU_I_RAM_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

105

WREG32_SOC15(GC, 0, regGFX_IMU_I_RAM_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

107

WREG32_SOC15(GC, 0, regGFX_IMU_I_RAM_ADDR, adev->gfx.imu_fw_version);

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

114

WREG32_SOC15(GC, 0, regGFX_IMU_D_RAM_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

117

WREG32_SOC15(GC, 0, regGFX_IMU_D_RAM_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

119

WREG32_SOC15(GC, 0, regGFX_IMU_D_RAM_ADDR, adev->gfx.imu_fw_version);

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

148

WREG32_SOC15(GC, 0, regGFX_IMU_C2PMSG_ACCESS_CTRL0, 0xffffff);

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

149

WREG32_SOC15(GC, 0, regGFX_IMU_C2PMSG_ACCESS_CTRL1, 0xffff);

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

154

WREG32_SOC15(GC, 0, regGFX_IMU_C2PMSG_16, imu_reg_val);

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

158

WREG32_SOC15(GC, 0, regGFX_IMU_SCRATCH_10, imu_reg_val);

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

169

WREG32_SOC15(GC, 0, regGFX_IMU_CORE_CTRL, imu_reg_val);

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

279

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_HIGH, 0);

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

280

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_LOW, reg);

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

281

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_DATA, data);

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

360

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_HIGH, val_h);

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

361

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_LOW, reg | val_l);

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

362

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_DATA, data);

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

373

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_INDEX, 0x2);

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

390

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_HIGH, 0);

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

391

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_LOW, 0);

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

392

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_DATA, 0);

drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

396

WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_INDEX, reg_data);

drivers/gpu/drm/amd/amdgpu/imu_v12_1.c

100

WREG32_SOC15(GC, GET_INST(GC, xcc_id),

drivers/gpu/drm/amd/amdgpu/imu_v12_1.c

109

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regGFX_IMU_D_RAM_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/imu_v12_1.c

112

WREG32_SOC15(GC, GET_INST(GC, xcc_id),

drivers/gpu/drm/amd/amdgpu/imu_v12_1.c

116

WREG32_SOC15(GC, GET_INST(GC, xcc_id),

drivers/gpu/drm/amd/amdgpu/imu_v12_1.c

93

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regGFX_IMU_I_RAM_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/imu_v12_1.c

96

WREG32_SOC15(GC, GET_INST(GC, xcc_id),

drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c

172

WREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c

536

WREG32_SOC15(JPEG, 0, mmUVD_LMI_JRBC_RB_VMID, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c

537

WREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_CNTL, UVD_JRBC_RB_CNTL__RB_NO_FETCH_MASK |

drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c

539

WREG32_SOC15(JPEG, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW, lower_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c

540

WREG32_SOC15(JPEG, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_HIGH, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c

541

WREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c

542

WREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c

543

WREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_CNTL, UVD_JRBC_RB_CNTL__RB_RPTR_WR_EN_MASK);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

294

WREG32_SOC15(JPEG, 0, mmJPEG_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

302

WREG32_SOC15(JPEG, 0, mmJPEG_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

317

WREG32_SOC15(JPEG, 0, mmJPEG_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

325

WREG32_SOC15(JPEG, 0, mmJPEG_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

351

WREG32_SOC15(JPEG, 0, mmJPEG_DEC_GFX10_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

362

WREG32_SOC15(JPEG, 0, mmUVD_LMI_JRBC_RB_VMID, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

363

WREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_CNTL, (0x00000001L | 0x00000002L));

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

364

WREG32_SOC15(JPEG, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

366

WREG32_SOC15(JPEG, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

368

WREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

369

WREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

370

WREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_CNTL, 0x00000002L);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

371

WREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

453

WREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

311

WREG32_SOC15(JPEG, inst, mmJPEG_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

318

WREG32_SOC15(JPEG, inst, mmJPEG_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

325

WREG32_SOC15(JPEG, inst, mmJPEG_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

338

WREG32_SOC15(JPEG, inst, mmJPEG_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

352

WREG32_SOC15(JPEG, i, mmJPEG_DEC_GFX8_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

354

WREG32_SOC15(JPEG, i, mmJPEG_DEC_GFX10_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

366

WREG32_SOC15(JPEG, i, mmUVD_LMI_JRBC_RB_VMID, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

367

WREG32_SOC15(JPEG, i, mmUVD_JRBC_RB_CNTL, (0x00000001L | 0x00000002L));

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

368

WREG32_SOC15(JPEG, i, mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

370

WREG32_SOC15(JPEG, i, mmUVD_LMI_JRBC_RB_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

372

WREG32_SOC15(JPEG, i, mmUVD_JRBC_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

373

WREG32_SOC15(JPEG, i, mmUVD_JRBC_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

374

WREG32_SOC15(JPEG, i, mmUVD_JRBC_RB_CNTL, 0x00000002L);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

375

WREG32_SOC15(JPEG, i, mmUVD_JRBC_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

481

WREG32_SOC15(JPEG, ring->me, mmUVD_JRBC_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

256

WREG32_SOC15(JPEG, 0, mmJPEG_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

264

WREG32_SOC15(JPEG, 0, mmJPEG_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

271

WREG32_SOC15(JPEG, 0, mmJPEG_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

284

WREG32_SOC15(JPEG, 0, mmJPEG_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

368

WREG32_SOC15(JPEG, 0, mmJPEG_DEC_GFX10_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

370

WREG32_SOC15(JPEG, 0, mmJPEG_ENC_GFX10_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

382

WREG32_SOC15(JPEG, 0, mmUVD_LMI_JRBC_RB_VMID, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

383

WREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_CNTL, (0x00000001L | 0x00000002L));

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

384

WREG32_SOC15(JPEG, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

386

WREG32_SOC15(JPEG, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

388

WREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

389

WREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

390

WREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_CNTL, 0x00000002L);

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

391

WREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

472

WREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

201

WREG32_SOC15(VCN, 0, regVCN_JPEG_DB_CTRL,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

290

WREG32_SOC15(JPEG, 0, regJPEG_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

297

WREG32_SOC15(JPEG, 0, regJPEG_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

314

WREG32_SOC15(JPEG, 0, regJPEG_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

321

WREG32_SOC15(JPEG, 0, regJPEG_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

405

WREG32_SOC15(JPEG, 0, regJPEG_DEC_GFX10_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

418

WREG32_SOC15(JPEG, 0, regUVD_LMI_JRBC_RB_VMID, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

419

WREG32_SOC15(JPEG, 0, regUVD_JRBC_RB_CNTL, (0x00000001L | 0x00000002L));

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

420

WREG32_SOC15(JPEG, 0, regUVD_LMI_JRBC_RB_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

422

WREG32_SOC15(JPEG, 0, regUVD_LMI_JRBC_RB_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

424

WREG32_SOC15(JPEG, 0, regUVD_JRBC_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

425

WREG32_SOC15(JPEG, 0, regUVD_JRBC_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

426

WREG32_SOC15(JPEG, 0, regUVD_JRBC_RB_CNTL, 0x00000002L);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

427

WREG32_SOC15(JPEG, 0, regUVD_JRBC_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

505

WREG32_SOC15(VCN, 0, regMMSCH_VF_CTX_ADDR_LO, lower_32_bits(ctx_addr));

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

506

WREG32_SOC15(VCN, 0, regMMSCH_VF_CTX_ADDR_HI, upper_32_bits(ctx_addr));

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

513

WREG32_SOC15(VCN, 0, regMMSCH_VF_VMID, tmp);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

517

WREG32_SOC15(VCN, 0, regMMSCH_VF_CTX_SIZE, size);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

520

WREG32_SOC15(VCN, 0, regMMSCH_VF_MAILBOX_RESP, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

526

WREG32_SOC15(VCN, 0, regMMSCH_VF_MAILBOX_HOST, param);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

632

WREG32_SOC15(JPEG, 0, regUVD_JRBC_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

1134

WREG32_SOC15(JPEG, jpeg_inst, regJPEG_CORE_RST_CTRL, 1 << ring->pipe);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

1141

WREG32_SOC15(JPEG, jpeg_inst, regJPEG_CORE_RST_CTRL, 0x00);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

319

WREG32_SOC15(VCN, jpeg_inst, regMMSCH_VF_CTX_ADDR_LO, lower_32_bits(ctx_addr));

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

320

WREG32_SOC15(VCN, jpeg_inst, regMMSCH_VF_CTX_ADDR_HI, upper_32_bits(ctx_addr));

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

325

WREG32_SOC15(VCN, jpeg_inst, regMMSCH_VF_VMID, tmp);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

328

WREG32_SOC15(VCN, jpeg_inst, regMMSCH_VF_CTX_SIZE, size);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

330

WREG32_SOC15(VCN, jpeg_inst, regMMSCH_VF_MAILBOX_RESP, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

333

WREG32_SOC15(VCN, jpeg_inst, regMMSCH_VF_MAILBOX_HOST, param);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

509

WREG32_SOC15(JPEG, jpeg_inst, regJPEG_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

515

WREG32_SOC15(JPEG, jpeg_inst, regJPEG_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

534

WREG32_SOC15(JPEG, jpeg_inst, regJPEG_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

540

WREG32_SOC15(JPEG, jpeg_inst, regJPEG_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

547

WREG32_SOC15(JPEG, jpeg_inst, regUVD_PGFSM_CONFIG,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

562

WREG32_SOC15(JPEG, jpeg_inst, regJPEG_DEC_GFX8_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

564

WREG32_SOC15(JPEG, jpeg_inst, regJPEG_DEC_GFX10_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

321

WREG32_SOC15(JPEG, inst, regJPEG_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

328

WREG32_SOC15(JPEG, inst, regJPEG_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

345

WREG32_SOC15(JPEG, inst, regJPEG_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

352

WREG32_SOC15(JPEG, inst, regJPEG_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

430

WREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS, reg_data);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

442

WREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS, reg_data);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

463

WREG32_SOC15(JPEG, inst_idx, regUVD_LMI_JRBC_RB_VMID, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

464

WREG32_SOC15(JPEG, inst_idx, regUVD_JRBC_RB_CNTL, (0x00000001L | 0x00000002L));

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

465

WREG32_SOC15(JPEG, inst_idx, regUVD_LMI_JRBC_RB_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

467

WREG32_SOC15(JPEG, inst_idx, regUVD_LMI_JRBC_RB_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

469

WREG32_SOC15(JPEG, inst_idx, regUVD_JRBC_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

470

WREG32_SOC15(JPEG, inst_idx, regUVD_JRBC_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

471

WREG32_SOC15(JPEG, inst_idx, regUVD_JRBC_RB_CNTL, 0x00000002L);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

472

WREG32_SOC15(JPEG, inst_idx, regUVD_JRBC_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

490

WREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS, reg_data);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

518

WREG32_SOC15(VCN, i, regVCN_JPEG_DB_CTRL,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

536

WREG32_SOC15(JPEG, i, regJPEG_DEC_GFX10_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

548

WREG32_SOC15(JPEG, i, regUVD_LMI_JRBC_RB_VMID, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

549

WREG32_SOC15(JPEG, i, regUVD_JRBC_RB_CNTL, (0x00000001L | 0x00000002L));

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

550

WREG32_SOC15(JPEG, i, regUVD_LMI_JRBC_RB_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

552

WREG32_SOC15(JPEG, i, regUVD_LMI_JRBC_RB_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

554

WREG32_SOC15(JPEG, i, regUVD_JRBC_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

555

WREG32_SOC15(JPEG, i, regUVD_JRBC_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

556

WREG32_SOC15(JPEG, i, regUVD_JRBC_RB_CNTL, 0x00000002L);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

557

WREG32_SOC15(JPEG, i, regUVD_JRBC_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

648

WREG32_SOC15(JPEG, ring->me, regUVD_JRBC_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

244

WREG32_SOC15(JPEG, 0, regJPEG_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

249

WREG32_SOC15(JPEG, 0, regJPEG_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

259

WREG32_SOC15(JPEG, 0, regJPEG_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

266

WREG32_SOC15(JPEG, 0, regJPEG_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

274

WREG32_SOC15(JPEG, 0, regUVD_IPX_DLDO_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

351

WREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS, reg_data);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

382

WREG32_SOC15(VCN, 0, regVCN_JPEG_DB_CTRL,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

386

WREG32_SOC15(JPEG, inst_idx, regUVD_LMI_JRBC_RB_VMID, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

387

WREG32_SOC15(JPEG, inst_idx, regUVD_JRBC_RB_CNTL, (0x00000001L | 0x00000002L));

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

388

WREG32_SOC15(JPEG, inst_idx, regUVD_LMI_JRBC_RB_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

390

WREG32_SOC15(JPEG, inst_idx, regUVD_LMI_JRBC_RB_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

392

WREG32_SOC15(JPEG, inst_idx, regUVD_JRBC_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

393

WREG32_SOC15(JPEG, inst_idx, regUVD_JRBC_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

394

WREG32_SOC15(JPEG, inst_idx, regUVD_JRBC_RB_CNTL, 0x00000002L);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

395

WREG32_SOC15(JPEG, inst_idx, regUVD_JRBC_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

415

WREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS, reg_data);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

447

WREG32_SOC15(JPEG, 0, regJPEG_DEC_GFX10_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

459

WREG32_SOC15(VCN, 0, regVCN_JPEG_DB_CTRL,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

463

WREG32_SOC15(JPEG, 0, regUVD_LMI_JRBC_RB_VMID, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

464

WREG32_SOC15(JPEG, 0, regUVD_JRBC_RB_CNTL, (0x00000001L | 0x00000002L));

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

465

WREG32_SOC15(JPEG, 0, regUVD_LMI_JRBC_RB_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

467

WREG32_SOC15(JPEG, 0, regUVD_LMI_JRBC_RB_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

469

WREG32_SOC15(JPEG, 0, regUVD_JRBC_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

470

WREG32_SOC15(JPEG, 0, regUVD_JRBC_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

471

WREG32_SOC15(JPEG, 0, regUVD_JRBC_RB_CNTL, 0x00000002L);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

472

WREG32_SOC15(JPEG, 0, regUVD_JRBC_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

558

WREG32_SOC15(JPEG, 0, regUVD_JRBC_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

379

WREG32_SOC15(JPEG, 0, regJPEG_DEC_GFX10_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

517

WREG32_SOC15(VCN, jpeg_inst, regMMSCH_VF_CTX_ADDR_LO, lower_32_bits(ctx_addr));

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

518

WREG32_SOC15(VCN, jpeg_inst, regMMSCH_VF_CTX_ADDR_HI, upper_32_bits(ctx_addr));

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

523

WREG32_SOC15(VCN, jpeg_inst, regMMSCH_VF_VMID, tmp);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

526

WREG32_SOC15(VCN, jpeg_inst, regMMSCH_VF_CTX_SIZE, size);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

528

WREG32_SOC15(VCN, jpeg_inst, regMMSCH_VF_MAILBOX_RESP, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

531

WREG32_SOC15(VCN, jpeg_inst, regMMSCH_VF_MAILBOX_HOST, param);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

833

WREG32_SOC15(JPEG, jpeg_inst, regJPEG_CORE_RST_CTRL, 1 << ring->pipe);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

840

WREG32_SOC15(JPEG, jpeg_inst, regJPEG_CORE_RST_CTRL, 0x00);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

227

WREG32_SOC15(JPEG, 0, regJPEG_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

232

WREG32_SOC15(JPEG, 0, regJPEG_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

242

WREG32_SOC15(JPEG, 0, regJPEG_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

249

WREG32_SOC15(JPEG, 0, regJPEG_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

257

WREG32_SOC15(JPEG, 0, regUVD_IPX_DLDO_CONFIG_ONO1, data);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

334

WREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS, reg_data);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

365

WREG32_SOC15(VCN, 0, regVCN_JPEG_DB_CTRL,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

369

WREG32_SOC15(JPEG, inst_idx, regUVD_LMI_JRBC_RB_VMID, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

370

WREG32_SOC15(JPEG, inst_idx, regUVD_JRBC0_UVD_JRBC_RB_CNTL, (0x00000001L | 0x00000002L));

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

371

WREG32_SOC15(JPEG, inst_idx, regUVD_LMI_JRBC_RB_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

373

WREG32_SOC15(JPEG, inst_idx, regUVD_LMI_JRBC_RB_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

375

WREG32_SOC15(JPEG, inst_idx, regUVD_JRBC0_UVD_JRBC_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

376

WREG32_SOC15(JPEG, inst_idx, regUVD_JRBC0_UVD_JRBC_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

377

WREG32_SOC15(JPEG, inst_idx, regUVD_JRBC0_UVD_JRBC_RB_CNTL, 0x00000002L);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

378

WREG32_SOC15(JPEG, inst_idx, regUVD_JRBC0_UVD_JRBC_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

398

WREG32_SOC15(JPEG, inst_idx, regUVD_JPEG_POWER_STATUS, reg_data);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

430

WREG32_SOC15(JPEG, 0, regJPEG_DEC_GFX10_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

442

WREG32_SOC15(VCN, 0, regVCN_JPEG_DB_CTRL,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

446

WREG32_SOC15(JPEG, 0, regUVD_LMI_JRBC_RB_VMID, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

447

WREG32_SOC15(JPEG, 0, regUVD_JRBC0_UVD_JRBC_RB_CNTL, (0x00000001L | 0x00000002L));

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

448

WREG32_SOC15(JPEG, 0, regUVD_LMI_JRBC_RB_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

450

WREG32_SOC15(JPEG, 0, regUVD_LMI_JRBC_RB_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

452

WREG32_SOC15(JPEG, 0, regUVD_JRBC0_UVD_JRBC_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

453

WREG32_SOC15(JPEG, 0, regUVD_JRBC0_UVD_JRBC_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

454

WREG32_SOC15(JPEG, 0, regUVD_JRBC0_UVD_JRBC_RB_CNTL, 0x00000002L);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

455

WREG32_SOC15(JPEG, 0, regUVD_JRBC0_UVD_JRBC_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

541

WREG32_SOC15(JPEG, 0, regUVD_JRBC0_UVD_JRBC_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/lsdma_v6_0.c

111

WREG32_SOC15(LSDMA, 0, regLSDMA_MEM_POWER_CTRL, tmp);

drivers/gpu/drm/amd/amdgpu/lsdma_v6_0.c

114

WREG32_SOC15(LSDMA, 0, regLSDMA_MEM_POWER_CTRL, tmp);

drivers/gpu/drm/amd/amdgpu/lsdma_v6_0.c

47

WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_SRC_ADDR_LO, lower_32_bits(src_addr));

drivers/gpu/drm/amd/amdgpu/lsdma_v6_0.c

48

WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_SRC_ADDR_HI, upper_32_bits(src_addr));

drivers/gpu/drm/amd/amdgpu/lsdma_v6_0.c

50

WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_DST_ADDR_LO, lower_32_bits(dst_addr));

drivers/gpu/drm/amd/amdgpu/lsdma_v6_0.c

51

WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_DST_ADDR_HI, upper_32_bits(dst_addr));

drivers/gpu/drm/amd/amdgpu/lsdma_v6_0.c

53

WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_CONTROL, 0x0);

drivers/gpu/drm/amd/amdgpu/lsdma_v6_0.c

63

WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_COMMAND, tmp);

drivers/gpu/drm/amd/amdgpu/lsdma_v6_0.c

80

WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_CONSTFILL_DATA, data);

drivers/gpu/drm/amd/amdgpu/lsdma_v6_0.c

82

WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_DST_ADDR_LO, lower_32_bits(dst_addr));

drivers/gpu/drm/amd/amdgpu/lsdma_v6_0.c

83

WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_DST_ADDR_HI, upper_32_bits(dst_addr));

drivers/gpu/drm/amd/amdgpu/lsdma_v6_0.c

85

WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_CONTROL, 0x0);

drivers/gpu/drm/amd/amdgpu/lsdma_v6_0.c

95

WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_COMMAND, tmp);

drivers/gpu/drm/amd/amdgpu/lsdma_v7_0.c

111

WREG32_SOC15(LSDMA, 0, regLSDMA_MEM_POWER_CTRL, tmp);

drivers/gpu/drm/amd/amdgpu/lsdma_v7_0.c

114

WREG32_SOC15(LSDMA, 0, regLSDMA_MEM_POWER_CTRL, tmp);

drivers/gpu/drm/amd/amdgpu/lsdma_v7_0.c

47

WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_SRC_ADDR_LO, lower_32_bits(src_addr));

drivers/gpu/drm/amd/amdgpu/lsdma_v7_0.c

48

WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_SRC_ADDR_HI, upper_32_bits(src_addr));

drivers/gpu/drm/amd/amdgpu/lsdma_v7_0.c

50

WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_DST_ADDR_LO, lower_32_bits(dst_addr));

drivers/gpu/drm/amd/amdgpu/lsdma_v7_0.c

51

WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_DST_ADDR_HI, upper_32_bits(dst_addr));

drivers/gpu/drm/amd/amdgpu/lsdma_v7_0.c

53

WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_CONTROL, 0x0);

drivers/gpu/drm/amd/amdgpu/lsdma_v7_0.c

63

WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_COMMAND, tmp);

drivers/gpu/drm/amd/amdgpu/lsdma_v7_0.c

80

WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_CONSTFILL_DATA, data);

drivers/gpu/drm/amd/amdgpu/lsdma_v7_0.c

82

WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_DST_ADDR_LO, lower_32_bits(dst_addr));

drivers/gpu/drm/amd/amdgpu/lsdma_v7_0.c

83

WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_DST_ADDR_HI, upper_32_bits(dst_addr));

drivers/gpu/drm/amd/amdgpu/lsdma_v7_0.c

85

WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_CONTROL, 0x0);

drivers/gpu/drm/amd/amdgpu/lsdma_v7_0.c

95

WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_COMMAND, tmp);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1008

WREG32_SOC15(GC, 0, regCP_MES_CNTL, data);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1039

WREG32_SOC15(GC, 0, regCP_MES_IC_BASE_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1043

WREG32_SOC15(GC, 0, regCP_MES_PRGRM_CNTR_START,

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1045

WREG32_SOC15(GC, 0, regCP_MES_PRGRM_CNTR_START_HI,

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1049

WREG32_SOC15(GC, 0, regCP_MES_IC_BASE_LO,

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1051

WREG32_SOC15(GC, 0, regCP_MES_IC_BASE_HI,

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1055

WREG32_SOC15(GC, 0, regCP_MES_MIBOUND_LO, 0x1FFFFF);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1058

WREG32_SOC15(GC, 0, regCP_MES_MDBASE_LO,

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1060

WREG32_SOC15(GC, 0, regCP_MES_MDBASE_HI,

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1064

WREG32_SOC15(GC, 0, regCP_MES_MDBOUND_LO, 0x7FFFF);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1071

WREG32_SOC15(GC, 0, regCP_MES_IC_OP_CNTL, data);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1076

WREG32_SOC15(GC, 0, regCP_MES_IC_OP_CNTL, data);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1226

WREG32_SOC15(GC, 0, regCP_HQD_VMID, data);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1232

WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, data);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1235

WREG32_SOC15(GC, 0, regCP_MQD_BASE_ADDR, mqd->cp_mqd_base_addr_lo);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1236

WREG32_SOC15(GC, 0, regCP_MQD_BASE_ADDR_HI, mqd->cp_mqd_base_addr_hi);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1241

WREG32_SOC15(GC, 0, regCP_MQD_CONTROL, 0);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1244

WREG32_SOC15(GC, 0, regCP_HQD_PQ_BASE, mqd->cp_hqd_pq_base_lo);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1245

WREG32_SOC15(GC, 0, regCP_HQD_PQ_BASE_HI, mqd->cp_hqd_pq_base_hi);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1248

WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR_REPORT_ADDR,

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1250

WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR_REPORT_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1254

WREG32_SOC15(GC, 0, regCP_HQD_PQ_CONTROL, mqd->cp_hqd_pq_control);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1257

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR,

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1259

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1263

WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL,

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1267

WREG32_SOC15(GC, 0, regCP_HQD_PERSISTENT_STATE, mqd->cp_hqd_persistent_state);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1270

WREG32_SOC15(GC, 0, regCP_HQD_ACTIVE, mqd->cp_hqd_active);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1524

WREG32_SOC15(GC, 0, regCP_HQD_DEQUEUE_REQUEST, 1);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1536

WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, data);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1538

WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, 0);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1540

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_LO, 0);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1541

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_HI, 0);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1542

WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1557

WREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS, tmp | 0x80);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

1567

WREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS, tmp);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

410

WREG32_SOC15(GC, 0, regGRBM_GFX_INDEX,

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

417

WREG32_SOC15(GC, 0, regCP_VMID_RESET, value);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

441

WREG32_SOC15(GC, 0, regCP_HQD_DEQUEUE_REQUEST, 0x2);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

442

WREG32_SOC15(GC, 0, regSPI_COMPUTE_QUEUE_RESET, 0x1);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

956

WREG32_SOC15(GC, 0, regCP_MES_MSCRATCH_LO,

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

958

WREG32_SOC15(GC, 0, regCP_MES_MSCRATCH_HI,

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

969

WREG32_SOC15(GC, 0, regCP_MES_CNTL, data);

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

980

WREG32_SOC15(GC, 0, regCP_MES_PRGRM_CNTR_START,

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

982

WREG32_SOC15(GC, 0, regCP_MES_PRGRM_CNTR_START_HI,

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

992

WREG32_SOC15(GC, 0, regCP_MES_CNTL, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1100

WREG32_SOC15(GC, 0, regCP_MES_MSCRATCH_LO,

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1103

WREG32_SOC15(GC, 0, regCP_MES_MSCRATCH_HI,

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1117

WREG32_SOC15(GC, 0, regCP_MES_CNTL, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1120

WREG32_SOC15(GC, 0, regCP_MES_PRGRM_CNTR_START,

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1122

WREG32_SOC15(GC, 0, regCP_MES_PRGRM_CNTR_START_HI,

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1131

WREG32_SOC15(GC, 0, regCP_MES_CNTL, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1152

WREG32_SOC15(GC, 0, regCP_MES_CNTL, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1170

WREG32_SOC15(GC, 0, regCP_MES_PRGRM_CNTR_START,

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1172

WREG32_SOC15(GC, 0, regCP_MES_PRGRM_CNTR_START_HI,

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1206

WREG32_SOC15(GC, 0, regCP_MES_IC_BASE_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1209

WREG32_SOC15(GC, 0, regCP_MES_IC_BASE_LO,

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1211

WREG32_SOC15(GC, 0, regCP_MES_IC_BASE_HI,

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1215

WREG32_SOC15(GC, 0, regCP_MES_MIBOUND_LO, 0x1FFFFF);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1218

WREG32_SOC15(GC, 0, regCP_MES_MDBASE_LO,

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1220

WREG32_SOC15(GC, 0, regCP_MES_MDBASE_HI,

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1224

WREG32_SOC15(GC, 0, regCP_MES_MDBOUND_LO, 0x7FFFF);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1231

WREG32_SOC15(GC, 0, regCP_MES_IC_OP_CNTL, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1236

WREG32_SOC15(GC, 0, regCP_MES_IC_OP_CNTL, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1391

WREG32_SOC15(GC, 0, regCP_HQD_VMID, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1397

WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1400

WREG32_SOC15(GC, 0, regCP_MQD_BASE_ADDR, mqd->cp_mqd_base_addr_lo);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1401

WREG32_SOC15(GC, 0, regCP_MQD_BASE_ADDR_HI, mqd->cp_mqd_base_addr_hi);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1406

WREG32_SOC15(GC, 0, regCP_MQD_CONTROL, 0);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1409

WREG32_SOC15(GC, 0, regCP_HQD_PQ_BASE, mqd->cp_hqd_pq_base_lo);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1410

WREG32_SOC15(GC, 0, regCP_HQD_PQ_BASE_HI, mqd->cp_hqd_pq_base_hi);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1413

WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR_REPORT_ADDR,

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1415

WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR_REPORT_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1419

WREG32_SOC15(GC, 0, regCP_HQD_PQ_CONTROL, mqd->cp_hqd_pq_control);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1422

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR,

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1424

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1428

WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL,

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1432

WREG32_SOC15(GC, 0, regCP_HQD_PERSISTENT_STATE, mqd->cp_hqd_persistent_state);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1435

WREG32_SOC15(GC, 0, regCP_HQD_ACTIVE, mqd->cp_hqd_active);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1702

WREG32_SOC15(GC, 0, regCP_HQD_DEQUEUE_REQUEST, 1);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1714

WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1716

WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, 0);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1718

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_LO, 0);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1719

WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_HI, 0);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1720

WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

1737

WREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS, tmp | 0x80);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

393

WREG32_SOC15(GC, 0, regCP_GFX_INDEX_MUTEX, tmp);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

433

WREG32_SOC15(GC, 0, regGRBM_GFX_INDEX,

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

440

WREG32_SOC15(GC, 0, regCP_VMID_RESET, value);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

464

WREG32_SOC15(GC, 0, regCP_HQD_DEQUEUE_REQUEST, 0x2);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

465

WREG32_SOC15(GC, 0, regSPI_COMPUTE_QUEUE_RESET, 0x1);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

820

WREG32_SOC15(GC, 0, regCP_MES_DOORBELL_CONTROL1, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

829

WREG32_SOC15(GC, 0, regCP_MES_DOORBELL_CONTROL2, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

838

WREG32_SOC15(GC, 0, regCP_MES_DOORBELL_CONTROL3, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

847

WREG32_SOC15(GC, 0, regCP_MES_DOORBELL_CONTROL4, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

856

WREG32_SOC15(GC, 0, regCP_MES_DOORBELL_CONTROL5, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

859

WREG32_SOC15(GC, 0, regCP_HQD_GFX_CONTROL, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

880

WREG32_SOC15(GC, 0, regCP_UNMAPPED_DOORBELL, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1013

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MES_CNTL, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1021

WREG32_SOC15(GC, GET_INST(GC, xcc_id),

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1024

WREG32_SOC15(GC, GET_INST(GC, xcc_id),

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1034

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MES_CNTL, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1051

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MES_CNTL, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1070

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MES_PRGRM_CNTR_START,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1072

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MES_PRGRM_CNTR_START_HI,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1107

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MES_IC_BASE_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1110

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MES_IC_BASE_LO,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1112

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MES_IC_BASE_HI,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1116

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MES_MIBOUND_LO, 0x1FFFFF);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1119

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MES_MDBASE_LO,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1121

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MES_MDBASE_HI,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1125

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MES_MDBOUND_LO, 0x7FFFF);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1132

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MES_IC_OP_CNTL, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1137

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MES_IC_OP_CNTL, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1317

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_VMID, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1323

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1326

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MQD_BASE_ADDR, mqd->cp_mqd_base_addr_lo);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1327

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MQD_BASE_ADDR_HI, mqd->cp_mqd_base_addr_hi);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1332

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MQD_CONTROL, 0);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1335

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_BASE, mqd->cp_hqd_pq_base_lo);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1336

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_BASE_HI, mqd->cp_hqd_pq_base_hi);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1339

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_RPTR_REPORT_ADDR,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1341

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_RPTR_REPORT_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1345

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_CONTROL, mqd->cp_hqd_pq_control);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1348

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_WPTR_POLL_ADDR,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1350

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_WPTR_POLL_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1354

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL,

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1358

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PERSISTENT_STATE, mqd->cp_hqd_persistent_state);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1361

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_ACTIVE, mqd->cp_hqd_active);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1657

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_DEQUEUE_REQUEST, 1);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1669

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1671

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_DOORBELL_CONTROL, 0);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1673

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_WPTR_LO, 0);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1674

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_WPTR_HI, 0);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1675

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1692

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CP_SCHEDULERS, tmp);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

1694

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CP_SCHEDULERS, tmp);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

754

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MES_DOORBELL_CONTROL1, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

763

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MES_DOORBELL_CONTROL2, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

772

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MES_DOORBELL_CONTROL3, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

781

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MES_DOORBELL_CONTROL4, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

790

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MES_DOORBELL_CONTROL5, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

793

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_GFX_CONTROL, data);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

814

WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_UNMAPPED_DOORBELL, data);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

108

WREG32_SOC15(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

112

WREG32_SOC15(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

120

WREG32_SOC15(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

122

WREG32_SOC15(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

126

WREG32_SOC15(MMHUB, 0, mmVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

128

WREG32_SOC15(MMHUB, 0, mmVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

134

WREG32_SOC15(MMHUB, 0, mmVM_L2_PROTECTION_FAULT_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

154

WREG32_SOC15(MMHUB, 0, mmMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

174

WREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

179

WREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

191

WREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL3, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

196

WREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL4, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

208

WREG32_SOC15(MMHUB, 0, mmVM_CONTEXT0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

216

WREG32_SOC15(MMHUB, 0, mmVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

218

WREG32_SOC15(MMHUB, 0, mmVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

221

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

223

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

226

WREG32_SOC15(MMHUB, 0, mmVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

228

WREG32_SOC15(MMHUB, 0, mmVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

238

WREG32_SOC15(MMHUB, 0, mmVM_L2_SAW_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

242

WREG32_SOC15(MMHUB, 0, mmVM_L2_SAW_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

246

WREG32_SOC15(MMHUB, 0, mmVM_L2_SAW_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

250

WREG32_SOC15(MMHUB, 0, mmVM_L2_SAW_CONTEXT0_PAGE_TABLE_START_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

254

WREG32_SOC15(MMHUB, 0, mmVM_L2_SAW_CONTEXT0_PAGE_TABLE_END_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

258

WREG32_SOC15(MMHUB, 0, mmVM_L2_SAW_CONTEXT0_PAGE_TABLE_END_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

265

WREG32_SOC15(MMHUB, 0, mmVM_L2_SAW_CONTEXT0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

269

WREG32_SOC15(MMHUB, 0, mmVM_L2_SAW_CONTEXTS_DISABLE, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

275

WREG32_SOC15(MMHUB, 0, mmVM_L2_SAW_CNTL4, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

370

WREG32_SOC15(MMHUB, 0, mmMC_VM_FB_LOCATION_BASE,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

372

WREG32_SOC15(MMHUB, 0, mmMC_VM_FB_LOCATION_TOP,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

408

WREG32_SOC15(MMHUB, 0, mmMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

414

WREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

415

WREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL3, 0);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

464

WREG32_SOC15(MMHUB, 0, mmVM_L2_PROTECTION_FAULT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

548

WREG32_SOC15(MMHUB, 0, mmATC_L2_MISC_CG, data);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

552

WREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2, data1);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

554

WREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2_RV, data1);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

558

WREG32_SOC15(MMHUB, 0, mmDAGB1_CNTL_MISC2, data2);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

574

WREG32_SOC15(MMHUB, 0, mmATC_L2_MISC_CG, data);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

74

WREG32_SOC15(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

76

WREG32_SOC15(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

79

WREG32_SOC15(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

81

WREG32_SOC15(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

91

WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BASE, 0);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

92

WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

93

WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

96

WREG32_SOC15(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

110

WREG32_SOC15(MMHUB, 0, regMC_VM_AGP_BASE, 0);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

111

WREG32_SOC15(MMHUB, 0, regMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

112

WREG32_SOC15(MMHUB, 0, regMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

118

WREG32_SOC15(MMHUB, 0, regMC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

121

WREG32_SOC15(MMHUB, 0, regMC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

128

WREG32_SOC15(MMHUB, 0, regMC_VM_AGP_BOT, 0xFFFFFF);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

129

WREG32_SOC15(MMHUB, 0, regMC_VM_AGP_TOP, 0);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

130

WREG32_SOC15(MMHUB, 0, regMC_VM_FB_LOCATION_TOP, 0);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

131

WREG32_SOC15(MMHUB, 0, regMC_VM_FB_LOCATION_BASE, 0x00FFFFFF);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

132

WREG32_SOC15(MMHUB, 0, regMC_VM_SYSTEM_APERTURE_LOW_ADDR, 0x3FFFFFFF);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

133

WREG32_SOC15(MMHUB, 0, regMC_VM_SYSTEM_APERTURE_HIGH_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

138

WREG32_SOC15(MMHUB, 0, regMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

140

WREG32_SOC15(MMHUB, 0, regMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

144

WREG32_SOC15(MMHUB, 0, regVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

146

WREG32_SOC15(MMHUB, 0, regVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

152

WREG32_SOC15(MMHUB, 0, regVM_L2_PROTECTION_FAULT_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

172

WREG32_SOC15(MMHUB, 0, regMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

216

WREG32_SOC15(MMHUB, 0, regVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

221

WREG32_SOC15(MMHUB, 0, regVM_L2_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

233

WREG32_SOC15(MMHUB, 0, regVM_L2_CNTL3, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

247

WREG32_SOC15(MMHUB, 0, regVM_L2_CNTL4, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

262

WREG32_SOC15(MMHUB, 0, regVM_CONTEXT0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

270

WREG32_SOC15(MMHUB, 0, regVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

272

WREG32_SOC15(MMHUB, 0, regVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

275

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

277

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

280

WREG32_SOC15(MMHUB, 0, regVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

282

WREG32_SOC15(MMHUB, 0, regVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

392

WREG32_SOC15(MMHUB, 0, regMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

398

WREG32_SOC15(MMHUB, 0, regVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

399

WREG32_SOC15(MMHUB, 0, regVM_L2_CNTL3, 0);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

448

WREG32_SOC15(MMHUB, 0, regVM_L2_PROTECTION_FAULT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

526

WREG32_SOC15(MMHUB, 0, regATC_L2_MISC_CG, data);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

529

WREG32_SOC15(MMHUB, 0, regDAGB0_CNTL_MISC2, data1);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

532

WREG32_SOC15(MMHUB, 0, regDAGB1_CNTL_MISC2, data2);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

548

WREG32_SOC15(MMHUB, 0, regATC_L2_MISC_CG, data);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

81

WREG32_SOC15(MMHUB, 0, regVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

83

WREG32_SOC15(MMHUB, 0, regVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

86

WREG32_SOC15(MMHUB, 0, regVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

88

WREG32_SOC15(MMHUB, 0, regVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

92

WREG32_SOC15(MMHUB, 0, regVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

94

WREG32_SOC15(MMHUB, 0, regVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

97

WREG32_SOC15(MMHUB, 0, regVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

99

WREG32_SOC15(MMHUB, 0, regVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

101

WREG32_SOC15(MMHUB, i,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

105

WREG32_SOC15(MMHUB, i,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

108

WREG32_SOC15(MMHUB, i,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

113

WREG32_SOC15(MMHUB, i,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

116

WREG32_SOC15(MMHUB, i,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

120

WREG32_SOC15(MMHUB, i,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

123

WREG32_SOC15(MMHUB, i,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

142

WREG32_SOC15(MMHUB, i, regMC_VM_AGP_BASE, 0);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

143

WREG32_SOC15(MMHUB, i, regMC_VM_AGP_BOT,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

145

WREG32_SOC15(MMHUB, i, regMC_VM_AGP_TOP,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

149

WREG32_SOC15(MMHUB, i, regMC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

152

WREG32_SOC15(MMHUB, i, regMC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

159

WREG32_SOC15(MMHUB, i, regMC_VM_AGP_BOT, 0xFFFFFF);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

160

WREG32_SOC15(MMHUB, i, regMC_VM_AGP_TOP, 0);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

161

WREG32_SOC15(MMHUB, i, regMC_VM_FB_LOCATION_TOP, 0);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

162

WREG32_SOC15(MMHUB, i, regMC_VM_FB_LOCATION_BASE,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

164

WREG32_SOC15(MMHUB, i,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

167

WREG32_SOC15(MMHUB, i,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

173

WREG32_SOC15(MMHUB, i, regMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

175

WREG32_SOC15(MMHUB, i, regMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

179

WREG32_SOC15(MMHUB, i,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

182

WREG32_SOC15(MMHUB, i,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

189

WREG32_SOC15(MMHUB, i, regVM_L2_PROTECTION_FAULT_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

231

WREG32_SOC15(MMHUB, i, regMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

289

WREG32_SOC15(MMHUB, i, regVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

295

WREG32_SOC15(MMHUB, i, regVM_L2_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

307

WREG32_SOC15(MMHUB, i, regVM_L2_CNTL3, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

322

WREG32_SOC15(MMHUB, i, regVM_L2_CNTL4, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

342

WREG32_SOC15(MMHUB, i, regVM_CONTEXT0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

356

WREG32_SOC15(MMHUB, i,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

359

WREG32_SOC15(MMHUB, i,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

363

WREG32_SOC15(MMHUB, i,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

366

WREG32_SOC15(MMHUB, i,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

370

WREG32_SOC15(MMHUB, i,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

372

WREG32_SOC15(MMHUB, i,

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

499

WREG32_SOC15(MMHUB, i, regMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

522

WREG32_SOC15(MMHUB, j, regVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

523

WREG32_SOC15(MMHUB, j, regVM_L2_CNTL3, 0);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

577

WREG32_SOC15(MMHUB, i, regVM_L2_PROTECTION_FAULT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

98

WREG32_SOC15(MMHUB, i,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

233

WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

235

WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

241

WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

243

WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

247

WREG32_SOC15(MMHUB, 0, mmMMVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

249

WREG32_SOC15(MMHUB, 0, mmMMVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

255

WREG32_SOC15(MMHUB, 0, mmMMVM_L2_PROTECTION_FAULT_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

274

WREG32_SOC15(MMHUB, 0, mmMMMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

299

WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

304

WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

316

WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL3, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

321

WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL4, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

325

WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL5, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

348

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

351

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

355

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

357

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

360

WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

362

WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

461

WREG32_SOC15(MMHUB, 0, mmMMMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

466

WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

467

WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL3, 0);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

516

WREG32_SOC15(MMHUB, 0, mmMMVM_L2_PROTECTION_FAULT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

612

WREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2_Sienna_Cichlid, data1);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

616

WREG32_SOC15(MMHUB, 0, mmMM_ATC_L2_MISC_CG, data);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

618

WREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2, data1);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

648

WREG32_SOC15(MMHUB, 0, mmMM_ATC_L2_MISC_CG, data);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

140

WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

142

WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

145

WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

147

WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

157

WREG32_SOC15(MMHUB, 0, mmMMMC_VM_AGP_BASE, 0);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

158

WREG32_SOC15(MMHUB, 0, mmMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

159

WREG32_SOC15(MMHUB, 0, mmMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

162

WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

164

WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

169

WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

171

WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

175

WREG32_SOC15(MMHUB, 0, mmMMVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

177

WREG32_SOC15(MMHUB, 0, mmMMVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

183

WREG32_SOC15(MMHUB, 0, mmMMVM_L2_PROTECTION_FAULT_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

202

WREG32_SOC15(MMHUB, 0, mmMMMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

221

WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

226

WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

238

WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL3, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

243

WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL4, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

247

WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL5, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

259

WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

264

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

267

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

271

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

273

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

276

WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

278

WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

355

WREG32_SOC15(MMHUB, 0, mmMMMC_VM_FB_LOCATION_BASE,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

357

WREG32_SOC15(MMHUB, 0, mmMMMC_VM_FB_LOCATION_TOP,

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

391

WREG32_SOC15(MMHUB, 0, mmMMMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

396

WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

397

WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL3, 0);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

441

WREG32_SOC15(MMHUB, 0, mmMMVM_L2_PROTECTION_FAULT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

521

WREG32_SOC15(MMHUB, 0, mmMM_ATC_L2_CGTT_CLK_CTRL, data);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

523

WREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2, data1);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

563

WREG32_SOC15(MMHUB, 0, mmMM_ATC_L2_CGTT_CLK_CTRL, data);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

565

WREG32_SOC15(MMHUB, 0, mmDAGB0_WR_CGTT_CLK_CTRL, data1);

drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c

567

WREG32_SOC15(MMHUB, 0, mmDAGB0_RD_CGTT_CLK_CTRL, data2);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

157

WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

159

WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

162

WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

164

WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

182

WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

183

WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

184

WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

187

WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

189

WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

194

WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

196

WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

200

WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

202

WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

208

WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

228

WREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

253

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

258

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

270

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL3, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

275

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL4, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

279

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL5, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

291

WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

302

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

305

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

309

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

311

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

314

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

316

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

415

WREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

420

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

421

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL3, 0);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

470

WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

594

WREG32_SOC15(MMHUB, 0, regMM_ATC_L2_MISC_CG, data);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

597

WREG32_SOC15(MMHUB, 0, regDAGB0_CNTL_MISC2, data1);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

600

WREG32_SOC15(MMHUB, 0, regDAGB1_CNTL_MISC2, data2);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c

617

WREG32_SOC15(MMHUB, 0, regMM_ATC_L2_MISC_CG, data);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

166

WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

168

WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

171

WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

173

WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

183

WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

184

WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

185

WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

193

WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

195

WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

200

WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

202

WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

206

WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

208

WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

214

WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

234

WREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

253

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

258

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

270

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL3, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

275

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL4, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

279

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL5, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

291

WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

296

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

299

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

303

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

305

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

308

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

310

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

409

WREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

414

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

415

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL3, 0);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

459

WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

538

WREG32_SOC15(MMHUB, 0, regMM_ATC_L2_MISC_CG, data);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c

554

WREG32_SOC15(MMHUB, 0, regMM_ATC_L2_MISC_CG, data);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

150

WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

152

WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

155

WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

157

WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

167

WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

168

WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

169

WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

178

WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

180

WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

186

WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

188

WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

192

WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

194

WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

200

WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

220

WREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

245

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

250

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

262

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL3, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

267

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL4, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

271

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL5, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

283

WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

294

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

297

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

301

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

303

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

306

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

308

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

407

WREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

412

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

413

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL3, 0);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c

462

WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

292

WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

294

WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

297

WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

299

WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

309

WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

310

WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

311

WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

319

WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

321

WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

326

WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

328

WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

332

WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

334

WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

340

WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

360

WREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

379

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

384

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

396

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL3, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

401

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL4, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

405

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL5, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

418

WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

423

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

426

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

430

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

432

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

435

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

437

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

510

WREG32_SOC15(MMHUB, 0, regMMVM_L2_SAW_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

512

WREG32_SOC15(MMHUB, 0, regMMVM_L2_SAW_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

515

WREG32_SOC15(MMHUB, 0, regMMVM_L2_SAW_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

517

WREG32_SOC15(MMHUB, 0, regMMVM_L2_SAW_CONTEXT0_PAGE_TABLE_START_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

520

WREG32_SOC15(MMHUB, 0, regMMVM_L2_SAW_CONTEXT0_PAGE_TABLE_END_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

522

WREG32_SOC15(MMHUB, 0, regMMVM_L2_SAW_CONTEXT0_PAGE_TABLE_END_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

528

WREG32_SOC15(MMHUB, 0, regMMVM_L2_SAW_CONTEXT0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

532

WREG32_SOC15(MMHUB, 0, regMMVM_L2_SAW_CONTEXTS_DISABLE, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

538

WREG32_SOC15(MMHUB, 0, regMMVM_L2_SAW_CNTL4, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

543

WREG32_SOC15(MMHUB, 0, regDAGB0_L1TLB_REG_RW_3_3, 0);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

544

WREG32_SOC15(MMHUB, 0, regDAGB1_L1TLB_REG_RW_3_3, 3);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

585

WREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

590

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

591

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL3, 0);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

635

WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

720

WREG32_SOC15(MMHUB, 0, regMM_ATC_L2_MISC_CG, data);

drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c

736

WREG32_SOC15(MMHUB, 0, regMM_ATC_L2_MISC_CG, data);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

149

WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

151

WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

154

WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

156

WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

174

WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

175

WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

176

WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

179

WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

181

WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

187

WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

189

WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

193

WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

195

WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

201

WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

221

WREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

246

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

251

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

263

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL3, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

268

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL4, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

272

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL5, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

284

WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

295

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

298

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

302

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

304

WREG32_SOC15(MMHUB, 0,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

307

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

309

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32,

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

408

WREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

413

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

414

WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL3, 0);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

464

WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

573

WREG32_SOC15(MMHUB, 0, regMM_ATC_L2_MISC_CG, data);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

576

WREG32_SOC15(MMHUB, 0, regDAGB0_CNTL_MISC2, data1);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

579

WREG32_SOC15(MMHUB, 0, regDAGB1_CNTL_MISC2, data2);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

597

WREG32_SOC15(MMHUB, 0, regMM_ATC_L2_MISC_CG, data);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

146

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

149

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

153

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

156

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

160

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

163

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

167

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

170

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

194

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

196

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

198

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

201

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

204

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

207

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

212

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

216

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

220

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

224

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

231

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

234

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

239

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

242

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

252

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

260

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

262

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

264

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

266

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

268

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

270

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

272

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

274

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

276

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

279

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

282

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

284

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

310

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

343

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i), regMMVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

350

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i), regMMVM_L2_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

362

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i), regMMVM_L2_CNTL3, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

377

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i), regMMVM_L2_CNTL4, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

382

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i), regMMVM_L2_CNTL5, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

404

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

421

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

424

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

428

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

431

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

435

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

438

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

566

WREG32_SOC15(MMHUB, GET_INST(MMHUB, j),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

572

WREG32_SOC15(MMHUB, GET_INST(MMHUB, j), regMMVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

573

WREG32_SOC15(MMHUB, GET_INST(MMHUB, j), regMMVM_L2_CNTL3, 0);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

628

WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

817

WREG32_SOC15(MMHUB, GET_INST(MMHUB, 0), regMM_ATC_L2_MISC_CG, data);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

819

WREG32_SOC15(MMHUB, GET_INST(MMHUB, 0), regDAGB0_CNTL_MISC2, data1);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

822

WREG32_SOC15(MMHUB, GET_INST(MMHUB, 0), regDAGB1_CNTL_MISC2, data2);

drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

839

WREG32_SOC15(MMHUB, GET_INST(MMHUB, 0), regMM_ATC_L2_MISC_CG, data);

drivers/gpu/drm/amd/amdgpu/navi10_ih.c

127

WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1, ih_rb_cntl);

drivers/gpu/drm/amd/amdgpu/navi10_ih.c

137

WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING2, ih_rb_cntl);

drivers/gpu/drm/amd/amdgpu/navi10_ih.c

140

WREG32_SOC15(OSSSYS, 0, mmIH_CNTL2, ih_cntl);

drivers/gpu/drm/amd/amdgpu/navi10_ih.c

340

WREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN_Sienna_Cichlid, ih_chicken);

drivers/gpu/drm/amd/amdgpu/navi10_ih.c

346

WREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN, ih_chicken);

drivers/gpu/drm/amd/amdgpu/navi10_ih.c

665

WREG32_SOC15(OSSSYS, 0, mmIH_CLK_CTRL, data);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

127

WREG32_SOC15(NBIO, 0, regGDC_S2A0_S2A_DOORBELL_ENTRY_2_CTRL_nbif_4_10, doorbell_range);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

129

WREG32_SOC15(NBIO, 0, regGDC_S2A0_S2A_DOORBELL_ENTRY_2_CTRL, doorbell_range);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

174

WREG32_SOC15(NBIO, 0, regGDC_S2A0_S2A_DOORBELL_ENTRY_5_CTRL_nbif_4_10, doorbell_range);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

176

WREG32_SOC15(NBIO, 0, regGDC_S2A0_S2A_DOORBELL_ENTRY_4_CTRL_nbif_4_10, doorbell_range);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

179

WREG32_SOC15(NBIO, 0, regGDC_S2A0_S2A_DOORBELL_ENTRY_5_CTRL, doorbell_range);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

181

WREG32_SOC15(NBIO, 0, regGDC_S2A0_S2A_DOORBELL_ENTRY_4_CTRL, doorbell_range);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

188

WREG32_SOC15(NBIO, 0, regGDC_S2A0_S2A_DOORBELL_ENTRY_0_CTRL_nbif_4_10, 0x30000007);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

189

WREG32_SOC15(NBIO, 0, regGDC_S2A0_S2A_DOORBELL_ENTRY_3_CTRL_nbif_4_10, 0x3000000d);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

191

WREG32_SOC15(NBIO, 0, regGDC_S2A0_S2A_DOORBELL_ENTRY_0_CTRL, 0x30000007);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

192

WREG32_SOC15(NBIO, 0, regGDC_S2A0_S2A_DOORBELL_ENTRY_3_CTRL, 0x3000000d);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

217

WREG32_SOC15(NBIO, 0, regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_LOW,

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

219

WREG32_SOC15(NBIO, 0, regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_HIGH,

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

223

WREG32_SOC15(NBIO, 0, regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

259

WREG32_SOC15(NBIO, 0, regGDC_S2A0_S2A_DOORBELL_ENTRY_1_CTRL_nbif_4_10, ih_doorbell_range);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

261

WREG32_SOC15(NBIO, 0, regGDC_S2A0_S2A_DOORBELL_ENTRY_1_CTRL, ih_doorbell_range);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

270

WREG32_SOC15(NBIO, 0, regBIF_BX0_INTERRUPT_CNTL2, adev->dummy_page_addr >> 8);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

284

WREG32_SOC15(NBIO, 0, regBIF_BX0_INTERRUPT_CNTL, interrupt_cntl);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

354

WREG32_SOC15(NBIO, 0, regRCC_DEV0_EPF2_STRAP2, data);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

378

WREG32_SOC15(NBIO, 0, regRCC_EP_DEV0_0_EP_PCIE_TX_LTR_CNTL, data);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

383

WREG32_SOC15(NBIO, 0, regRCC_STRAP0_RCC_BIF_STRAP2, data);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

408

WREG32_SOC15(PCIE, 0, regPCIE_LC_CNTL, data);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

413

WREG32_SOC15(PCIE, 0, regPCIE_LC_CNTL7, data);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

418

WREG32_SOC15(PCIE, 0, regPCIE_LC_CNTL3, data);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

424

WREG32_SOC15(NBIO, 0, regRCC_STRAP0_RCC_BIF_STRAP3, data);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

429

WREG32_SOC15(NBIO, 0, regRCC_STRAP0_RCC_BIF_STRAP5, data);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

450

WREG32_SOC15(NBIO, 0, regPSWUSP0_PCIE_LC_CNTL2, data);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

455

WREG32_SOC15(PCIE, 0, regPCIE_LC_CNTL4, data);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

460

WREG32_SOC15(PCIE, 0, regPCIE_LC_RXRECOVER_RXSTANDBY_CNTL, data);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

468

WREG32_SOC15(NBIO, 0, regRCC_STRAP0_RCC_BIF_STRAP3, data);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

473

WREG32_SOC15(NBIO, 0, regRCC_STRAP0_RCC_BIF_STRAP5, data);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

480

WREG32_SOC15(PCIE, 0, regPCIE_LC_CNTL, data);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

485

WREG32_SOC15(PCIE, 0, regPCIE_LC_CNTL3, data);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

545

WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_DOORBELL_INT_CNTL, bif_doorbell_int_cntl);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

578

WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_DOORBELL_INT_CNTL, bif_doorbell_int_cntl);

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

60

WREG32_SOC15(NBIO, 0, regBIF_BX0_REMAP_HDP_MEM_FLUSH_CNTL,

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

62

WREG32_SOC15(NBIO, 0, regBIF_BX0_REMAP_HDP_REG_FLUSH_CNTL,

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

79

WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_FB_EN,

drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

83

WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_FB_EN, 0);

drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c

100

WREG32_SOC15(NBIO, 0, mmBIF_FB_EN, 0);

drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c

175

WREG32_SOC15(NBIO, 0, mmBIF_BX_PF_DOORBELL_SELFRING_GPA_APER_BASE_LOW,

drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c

177

WREG32_SOC15(NBIO, 0, mmBIF_BX_PF_DOORBELL_SELFRING_GPA_APER_BASE_HIGH,

drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c

181

WREG32_SOC15(NBIO, 0, mmBIF_BX_PF_DOORBELL_SELFRING_GPA_APER_CNTL,

drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c

203

WREG32_SOC15(NBIO, 0, mmBIF_IH_DOORBELL_RANGE, ih_doorbell_range);

drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c

211

WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8);

drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c

225

WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL, interrupt_cntl);

drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c

389

WREG32_SOC15(NBIO, 0, mmRCC_BIF_STRAP2, data);

drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c

434

WREG32_SOC15(NBIO, 0, mmRCC_BIF_STRAP3, data);

drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c

439

WREG32_SOC15(NBIO, 0, mmRCC_BIF_STRAP5, data);

drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c

470

WREG32_SOC15(NBIO, 0, mmRCC_BIF_STRAP3, data);

drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c

475

WREG32_SOC15(NBIO, 0, mmRCC_BIF_STRAP5, data);

drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c

546

WREG32_SOC15(NBIO, 0, mmBIF_DOORBELL_INT_CNTL, reg_data);

drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c

68

WREG32_SOC15(NBIO, 0, mmREMAP_HDP_MEM_FLUSH_CNTL,

drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c

70

WREG32_SOC15(NBIO, 0, mmREMAP_HDP_REG_FLUSH_CNTL,

drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c

96

WREG32_SOC15(NBIO, 0, mmBIF_FB_EN,

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

140

WREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_5_CTRL, doorbell_range);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

142

WREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_4_CTRL, doorbell_range);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

147

WREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_0_CTRL, 0x30000007);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

148

WREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_3_CTRL, 0x3000000d);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

171

WREG32_SOC15(NBIO, 0, regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_LOW,

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

173

WREG32_SOC15(NBIO, 0, regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_HIGH,

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

177

WREG32_SOC15(NBIO, 0, regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_CNTL,

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

213

WREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_1_CTRL, ih_doorbell_range);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

221

WREG32_SOC15(NBIO, 0, regBIF_BX0_INTERRUPT_CNTL2, adev->dummy_page_addr >> 8);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

235

WREG32_SOC15(NBIO, 0, regBIF_BX0_INTERRUPT_CNTL, interrupt_cntl);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

264

WREG32_SOC15(NBIO, 0, regCPM_CONTROL, data);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

284

WREG32_SOC15(NBIO, 0, regPCIE_CNTL2, data);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

33

WREG32_SOC15(NBIO, 0, regBIF_BX0_REMAP_HDP_MEM_FLUSH_CNTL,

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

345

WREG32_SOC15(NBIO, 0, regRCC_DEV0_EPF2_STRAP2, data);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

35

WREG32_SOC15(NBIO, 0, regBIF_BX0_REMAP_HDP_REG_FLUSH_CNTL,

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

369

WREG32_SOC15(NBIO, 0, regRCC_EP_DEV0_0_EP_PCIE_TX_LTR_CNTL, data);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

374

WREG32_SOC15(NBIO, 0, regRCC_STRAP0_RCC_BIF_STRAP2, data);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

382

WREG32_SOC15(NBIO, 0, regBIF_CFG_DEV0_EPF0_DEVICE_CNTL2, data);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

400

WREG32_SOC15(NBIO, 0, regPCIE_LC_CNTL, data);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

405

WREG32_SOC15(NBIO, 0, regPCIE_LC_CNTL7, data);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

410

WREG32_SOC15(NBIO, 0, regPCIE_LC_CNTL3, data);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

416

WREG32_SOC15(NBIO, 0, regRCC_STRAP0_RCC_BIF_STRAP3, data);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

421

WREG32_SOC15(NBIO, 0, regRCC_STRAP0_RCC_BIF_STRAP5, data);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

426

WREG32_SOC15(NBIO, 0, regBIF_CFG_DEV0_EPF0_DEVICE_CNTL2, data);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

428

WREG32_SOC15(NBIO, 0, regBIF_CFG_DEV0_EPF0_PCIE_LTR_CAP, 0x10011001);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

435

WREG32_SOC15(NBIO, 0, regPSWUSP0_PCIE_LC_CNTL2, data);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

440

WREG32_SOC15(NBIO, 0, regPCIE_LC_CNTL4, data);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

445

WREG32_SOC15(NBIO, 0, regPCIE_LC_RXRECOVER_RXSTANDBY_CNTL, data);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

453

WREG32_SOC15(NBIO, 0, regRCC_STRAP0_RCC_BIF_STRAP3, data);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

458

WREG32_SOC15(NBIO, 0, regRCC_STRAP0_RCC_BIF_STRAP5, data);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

465

WREG32_SOC15(NBIO, 0, regPCIE_LC_CNTL, data);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

470

WREG32_SOC15(NBIO, 0, regPCIE_LC_CNTL3, data);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

52

WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_FB_EN,

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

56

WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_FB_EN, 0);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

574

WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_DOORBELL_INT_CNTL, bif_doorbell_int_cntl);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

607

WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_DOORBELL_INT_CNTL, bif_doorbell_int_cntl);

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

98

WREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_2_CTRL, doorbell_range);

drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c

122

WREG32_SOC15(NBIO, 0, mmBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_LOW,

drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c

124

WREG32_SOC15(NBIO, 0, mmBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_HIGH,

drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c

128

WREG32_SOC15(NBIO, 0, mmBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c

144

WREG32_SOC15(NBIO, 0, mmBIF_IH_DOORBELL_RANGE, ih_doorbell_range);

drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c

152

WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8);

drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c

160

WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL, interrupt_cntl);

drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c

57

WREG32_SOC15(NBIO, 0, mmREMAP_HDP_MEM_FLUSH_CNTL,

drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c

59

WREG32_SOC15(NBIO, 0, mmREMAP_HDP_REG_FLUSH_CNTL,

drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c

76

WREG32_SOC15(NBIO, 0, mmBIF_FB_EN,

drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c

80

WREG32_SOC15(NBIO, 0, mmBIF_FB_EN, 0);

drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c

127

WREG32_SOC15(NBIO, 0, mmBIF_IH_DOORBELL_RANGE, ih_doorbell_range);

drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c

134

WREG32_SOC15(NBIO, 0, mmSYSHUB_INDEX, offset);

drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c

143

WREG32_SOC15(NBIO, 0, mmSYSHUB_INDEX, offset);

drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c

144

WREG32_SOC15(NBIO, 0, mmSYSHUB_DATA, data);

drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c

227

WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8);

drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c

235

WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL, interrupt_cntl);

drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c

283

WREG32_SOC15(NBIO, 0, regRCC_DEV0_EPF6_STRAP4, data);

drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c

37

WREG32_SOC15(NBIO, 0, mmREMAP_HDP_MEM_FLUSH_CNTL,

drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c

39

WREG32_SOC15(NBIO, 0, mmREMAP_HDP_REG_FLUSH_CNTL,

drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c

56

WREG32_SOC15(NBIO, 0, mmBIF_FB_EN,

drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c

59

WREG32_SOC15(NBIO, 0, mmBIF_FB_EN, 0);

drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c

146

WREG32_SOC15(NBIO, 0, regRCC_DEV0_EPF0_0_RCC_DOORBELL_APER_EN, reg);

drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c

162

WREG32_SOC15(NBIO, 0,

drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c

165

WREG32_SOC15(NBIO, 0,

drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c

170

WREG32_SOC15(NBIO, 0, regBIF_BX_PF1_DOORBELL_SELFRING_GPA_APER_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c

192

WREG32_SOC15(NBIO, 0, regGDC0_BIF_IH_DOORBELL_RANGE,

drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c

201

WREG32_SOC15(NBIO, 0, regBIF_BX1_INTERRUPT_CNTL2,

drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c

216

WREG32_SOC15(NBIO, 0, regBIF_BX1_INTERRUPT_CNTL, interrupt_cntl);

drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c

275

WREG32_SOC15(NBIO, 0, regBIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3, data);

drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c

284

WREG32_SOC15(NBIO, 0, regRCC_DEV0_EPF5_STRAP4, data);

drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c

315

WREG32_SOC15(NBIO, 0, regBIF_BIF256_CI256_RC3X4_USB4_CPM_CONTROL, data);

drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c

32

WREG32_SOC15(NBIO, 0, regBIF_BX0_REMAP_HDP_MEM_FLUSH_CNTL,

drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c

333

WREG32_SOC15(NBIO, 0, regBIF_BIF256_CI256_RC3X4_USB4_PCIE_CNTL2, data);

drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c

34

WREG32_SOC15(NBIO, 0, regBIF_BX0_REMAP_HDP_REG_FLUSH_CNTL,

drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c

345

WREG32_SOC15(NBIO, 0, regBIF_BIF256_CI256_RC3X4_USB4_PCIE_TX_POWER_CTRL_1, data);

drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c

52

WREG32_SOC15(NBIO, 0, regBIF_BX1_BIF_FB_EN,

drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c

56

WREG32_SOC15(NBIO, 0, regBIF_BX1_BIF_FB_EN, 0);

drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c

159

WREG32_SOC15(NBIO, 0, regRCC_DEV0_EPF0_0_RCC_DOORBELL_APER_EN, reg);

drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c

175

WREG32_SOC15(NBIO, 0,

drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c

178

WREG32_SOC15(NBIO, 0,

drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c

183

WREG32_SOC15(NBIO, 0, regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_CNTL,

drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c

215

WREG32_SOC15(NBIO, 0, regBIF_BX0_INTERRUPT_CNTL2,

drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c

230

WREG32_SOC15(NBIO, 0, regBIF_BX0_INTERRUPT_CNTL, interrupt_cntl);

drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c

401

WREG32_SOC15(NBIO, 0, regRCC_DEV2_EPF0_STRAP2, data);

drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c

51

WREG32_SOC15(NBIO, 0, regBIF_BX0_REMAP_HDP_MEM_FLUSH_CNTL,

drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c

53

WREG32_SOC15(NBIO, 0, regBIF_BX0_REMAP_HDP_REG_FLUSH_CNTL,

drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c

85

WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_FB_EN_YC,

drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c

89

WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_FB_EN_YC, 0);

drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c

93

WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_FB_EN,

drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c

97

WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_FB_EN, 0);

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

103

WREG32_SOC15(NBIO, 0, mmREMAP_HDP_MEM_FLUSH_CNTL,

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

105

WREG32_SOC15(NBIO, 0, mmREMAP_HDP_REG_FLUSH_CNTL,

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

127

WREG32_SOC15(NBIO, 0, mmBIF_FB_EN,

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

130

WREG32_SOC15(NBIO, 0, mmBIF_FB_EN, 0);

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

224

WREG32_SOC15(NBIO, 0, mmDOORBELL_SELFRING_GPA_APER_BASE_LOW,

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

226

WREG32_SOC15(NBIO, 0, mmDOORBELL_SELFRING_GPA_APER_BASE_HIGH,

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

230

WREG32_SOC15(NBIO, 0, mmDOORBELL_SELFRING_GPA_APER_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

244

WREG32_SOC15(NBIO, 0, mmBIF_IH_DOORBELL_RANGE, ih_doorbell_range);

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

295

WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8);

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

303

WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL, interrupt_cntl);

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

354

WREG32_SOC15(NBIO, 0, mmBACO_CNTL, baco_cntl);

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

381

WREG32_SOC15(NBIO, 0, mmBIF_DOORBELL_INT_CNTL_ALDE, bif_doorbell_intr_cntl);

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

383

WREG32_SOC15(NBIO, 0, mmBIF_DOORBELL_INT_CNTL, bif_doorbell_intr_cntl);

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

439

WREG32_SOC15(NBIO, 0, mmBIF_DOORBELL_INT_CNTL_ALDE, bif_doorbell_intr_cntl);

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

441

WREG32_SOC15(NBIO, 0, mmBIF_DOORBELL_INT_CNTL, bif_doorbell_intr_cntl);

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

472

WREG32_SOC15(NBIO, 0, mmBIF_INTR_CNTL_ALDE, bif_intr_cntl);

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

474

WREG32_SOC15(NBIO, 0, mmBIF_INTR_CNTL, bif_intr_cntl);

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

517

WREG32_SOC15(NBIO, 0, mmBIF_INTR_CNTL_ALDE, bif_intr_cntl);

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

519

WREG32_SOC15(NBIO, 0, mmBIF_INTR_CNTL, bif_intr_cntl);

drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c

116

WREG32_SOC15(NBIO, 0, regRCC_DEV0_EPF0_0_RCC_DOORBELL_APER_EN, reg);

drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c

132

WREG32_SOC15(NBIO, 0,

drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c

135

WREG32_SOC15(NBIO, 0,

drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c

140

WREG32_SOC15(NBIO, 0, regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_CNTL,

drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c

164

WREG32_SOC15(NBIO, 0, regGDC0_BIF_IH_DOORBELL_RANGE,

drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c

173

WREG32_SOC15(NBIO, 0, regBIF_BX1_INTERRUPT_CNTL2,

drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c

188

WREG32_SOC15(NBIO, 0, regBIF_BX1_INTERRUPT_CNTL, interrupt_cntl);

drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c

247

WREG32_SOC15(NBIO, 0, regBIF0_PCIE_MST_CTRL_3, data);

drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c

252

WREG32_SOC15(NBIO, 0, regRCC_DEV0_EPF5_STRAP4, data);

drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c

283

WREG32_SOC15(NBIO, 0, regBIF0_CPM_CONTROL, data);

drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c

301

WREG32_SOC15(NBIO, 0, regBIF0_PCIE_CNTL2, data);

drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c

313

WREG32_SOC15(NBIO, 0, regBIF0_PCIE_TX_POWER_CTRL_1, data);

drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c

32

WREG32_SOC15(NBIO, 0, regBIF_BX0_REMAP_HDP_MEM_FLUSH_CNTL,

drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c

34

WREG32_SOC15(NBIO, 0, regBIF_BX0_REMAP_HDP_REG_FLUSH_CNTL,

drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c

52

WREG32_SOC15(NBIO, 0, regBIF_BX1_BIF_FB_EN,

drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c

56

WREG32_SOC15(NBIO, 0, regBIF_BX1_BIF_FB_EN, 0);

drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c

238

WREG32_SOC15(NBIO, 0, regBIFC_DOORBELL_ACCESS_EN_PF, 0xfffff);

drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c

256

WREG32_SOC15(NBIO, 0, regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_LOW,

drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c

258

WREG32_SOC15(NBIO, 0, regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_HIGH,

drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c

262

WREG32_SOC15(NBIO, 0, regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c

304

WREG32_SOC15(NBIO, 0, regDOORBELL0_CTRL_ENTRY_0, ih_doorbell_range);

drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c

305

WREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_3_CTRL, ih_doorbell_ctrl);

drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c

329

WREG32_SOC15(NBIO, 0, regBIF_BX0_INTERRUPT_CNTL2, adev->dummy_page_addr >> 8);

drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c

339

WREG32_SOC15(NBIO, 0, regBIF_BX0_INTERRUPT_CNTL, interrupt_cntl);

drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c

36

WREG32_SOC15(NBIO, 0, regBIF_BX0_REMAP_HDP_MEM_FLUSH_CNTL,

drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c

38

WREG32_SOC15(NBIO, 0, regBIF_BX0_REMAP_HDP_REG_FLUSH_CNTL,

drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c

438

WREG32_SOC15(NBIO, 0, regXCC_DOORBELL_FENCE,

drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c

441

WREG32_SOC15(NBIO, 0, regBIFC_GFX_INT_MONITOR_MASK, 0x7ff);

drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c

462

WREG32_SOC15(NBIO, i, regBIF_BX0_BACO_CNTL,

drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c

536

WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_DOORBELL_INT_CNTL, bif_doorbell_intr_cntl);

drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c

583

WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_DOORBELL_INT_CNTL, bif_doorbell_intr_cntl);

drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c

64

WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_FB_EN,

drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c

67

WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_FB_EN, 0);

drivers/gpu/drm/amd/amdgpu/nv.c

326

WREG32_SOC15(GC, 0, mmGRBM_GFX_CNTL, grbm_gfx_cntl);

drivers/gpu/drm/amd/amdgpu/psp_v10_0.c

111

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v10_0.c

158

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_67, value);

drivers/gpu/drm/amd/amdgpu/psp_v10_0.c

80

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v10_0.c

83

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v10_0.c

86

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_71, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v10_0.c

90

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v11_0.c

223

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36,

drivers/gpu/drm/amd/amdgpu/psp_v11_0.c

226

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35,

drivers/gpu/drm/amd/amdgpu/psp_v11_0.c

269

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36,

drivers/gpu/drm/amd/amdgpu/psp_v11_0.c

272

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35,

drivers/gpu/drm/amd/amdgpu/psp_v11_0.c

292

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101,

drivers/gpu/drm/amd/amdgpu/psp_v11_0.c

295

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64,

drivers/gpu/drm/amd/amdgpu/psp_v11_0.c

332

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v11_0.c

335

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_103, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v11_0.c

338

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101,

drivers/gpu/drm/amd/amdgpu/psp_v11_0.c

361

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v11_0.c

364

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v11_0.c

367

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_71, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v11_0.c

371

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v11_0.c

437

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, data_32);

drivers/gpu/drm/amd/amdgpu/psp_v11_0.c

438

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, msg);

drivers/gpu/drm/amd/amdgpu/psp_v11_0.c

602

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, value);

drivers/gpu/drm/amd/amdgpu/psp_v11_0.c

603

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, GFX_CTRL_CMD_ID_CONSUME_CMD);

drivers/gpu/drm/amd/amdgpu/psp_v11_0.c

606

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_67, value);

drivers/gpu/drm/amd/amdgpu/psp_v11_0.c

620

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, (fw_pri_mc_addr >> 20));

drivers/gpu/drm/amd/amdgpu/psp_v11_0.c

628

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, (GFX_CMD_USB_PD_USE_LFB << 16));

drivers/gpu/drm/amd/amdgpu/psp_v11_0.c

657

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, C2PMSG_CMD_GFX_USB_PD_FW_VER);

drivers/gpu/drm/amd/amdgpu/psp_v11_0_8.c

108

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v11_0_8.c

111

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v11_0_8.c

114

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_71, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v11_0_8.c

118

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v11_0_8.c

168

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, value);

drivers/gpu/drm/amd/amdgpu/psp_v11_0_8.c

169

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101,

drivers/gpu/drm/amd/amdgpu/psp_v11_0_8.c

172

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_67, value);

drivers/gpu/drm/amd/amdgpu/psp_v11_0_8.c

39

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101,

drivers/gpu/drm/amd/amdgpu/psp_v11_0_8.c

49

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64,

drivers/gpu/drm/amd/amdgpu/psp_v11_0_8.c

79

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v11_0_8.c

82

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_103, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v11_0_8.c

85

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101,

drivers/gpu/drm/amd/amdgpu/psp_v12_0.c

129

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36,

drivers/gpu/drm/amd/amdgpu/psp_v12_0.c

132

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35,

drivers/gpu/drm/amd/amdgpu/psp_v12_0.c

152

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v12_0.c

155

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v12_0.c

158

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_71, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v12_0.c

162

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v12_0.c

179

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101,

drivers/gpu/drm/amd/amdgpu/psp_v12_0.c

182

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64,

drivers/gpu/drm/amd/amdgpu/psp_v12_0.c

270

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, value);

drivers/gpu/drm/amd/amdgpu/psp_v12_0.c

271

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, GFX_CTRL_CMD_ID_CONSUME_CMD);

drivers/gpu/drm/amd/amdgpu/psp_v12_0.c

273

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_67, value);

drivers/gpu/drm/amd/amdgpu/psp_v12_0.c

93

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36,

drivers/gpu/drm/amd/amdgpu/psp_v12_0.c

96

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35,

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

280

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_36,

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

283

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_35,

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

362

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_36,

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

365

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_35,

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

388

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_101,

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

398

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_64,

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

428

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_102, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

431

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_103, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

434

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_101,

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

457

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_69, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

460

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_70, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

463

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_71, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

467

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_64, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

517

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_102, value);

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

518

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_101,

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

521

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_67, value);

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

533

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_36, data_32);

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

534

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_35, msg);

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

689

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_36, (fw_pri_mc_addr >> 20));

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

697

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_35, (GFX_CMD_USB_PD_USE_LFB << 16));

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

726

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_35, C2PMSG_CMD_GFX_USB_PD_FW_VER);

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

744

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_115, reg_val);

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

747

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_73, 1);

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

786

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_116, lower_32_bits(fw_pri_mc_addr));

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

792

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_116, upper_32_bits(fw_pri_mc_addr));

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

821

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_116, lower_32_bits(fw_pri_mc_addr));

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

827

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_116, upper_32_bits(fw_pri_mc_addr));

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

855

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_67, reg_data + 0x10);

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

939

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_101, GFX_CTRL_CMD_ID_GBR_IH_SET);

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

940

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_102, id);

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

941

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_103, val);

drivers/gpu/drm/amd/amdgpu/psp_v13_0_4.c

114

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_36,

drivers/gpu/drm/amd/amdgpu/psp_v13_0_4.c

117

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_35,

drivers/gpu/drm/amd/amdgpu/psp_v13_0_4.c

177

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_36,

drivers/gpu/drm/amd/amdgpu/psp_v13_0_4.c

180

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_35,

drivers/gpu/drm/amd/amdgpu/psp_v13_0_4.c

200

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_101,

drivers/gpu/drm/amd/amdgpu/psp_v13_0_4.c

210

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_64,

drivers/gpu/drm/amd/amdgpu/psp_v13_0_4.c

240

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_102, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v13_0_4.c

243

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_103, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v13_0_4.c

246

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_101,

drivers/gpu/drm/amd/amdgpu/psp_v13_0_4.c

269

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_69, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v13_0_4.c

272

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_70, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v13_0_4.c

275

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_71, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v13_0_4.c

279

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_64, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v13_0_4.c

329

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_102, value);

drivers/gpu/drm/amd/amdgpu/psp_v13_0_4.c

330

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_101,

drivers/gpu/drm/amd/amdgpu/psp_v13_0_4.c

333

WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_67, value);

drivers/gpu/drm/amd/amdgpu/psp_v14_0.c

149

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_36,

drivers/gpu/drm/amd/amdgpu/psp_v14_0.c

152

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_35,

drivers/gpu/drm/amd/amdgpu/psp_v14_0.c

223

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_36,

drivers/gpu/drm/amd/amdgpu/psp_v14_0.c

226

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_35,

drivers/gpu/drm/amd/amdgpu/psp_v14_0.c

247

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_101,

drivers/gpu/drm/amd/amdgpu/psp_v14_0.c

257

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_64,

drivers/gpu/drm/amd/amdgpu/psp_v14_0.c

287

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_102, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v14_0.c

290

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_103, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v14_0.c

293

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_101,

drivers/gpu/drm/amd/amdgpu/psp_v14_0.c

316

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_69, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v14_0.c

319

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_70, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v14_0.c

322

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_71, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v14_0.c

326

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_64, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v14_0.c

376

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_102, value);

drivers/gpu/drm/amd/amdgpu/psp_v14_0.c

377

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_101,

drivers/gpu/drm/amd/amdgpu/psp_v14_0.c

380

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_67, value);

drivers/gpu/drm/amd/amdgpu/psp_v14_0.c

392

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_36, data_32);

drivers/gpu/drm/amd/amdgpu/psp_v14_0.c

393

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_35, msg);

drivers/gpu/drm/amd/amdgpu/psp_v14_0.c

548

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_36, (fw_pri_mc_addr >> 20));

drivers/gpu/drm/amd/amdgpu/psp_v14_0.c

557

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_35, (GFX_CMD_USB_PD_USE_LFB << 16));

drivers/gpu/drm/amd/amdgpu/psp_v14_0.c

586

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_35, C2PMSG_CMD_GFX_USB_PD_FW_VER);

drivers/gpu/drm/amd/amdgpu/psp_v14_0.c

605

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_115, reg_val);

drivers/gpu/drm/amd/amdgpu/psp_v14_0.c

608

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_73, 1);

drivers/gpu/drm/amd/amdgpu/psp_v14_0.c

651

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_116, lower_32_bits(fw_pri_mc_addr));

drivers/gpu/drm/amd/amdgpu/psp_v14_0.c

657

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_116, upper_32_bits(fw_pri_mc_addr));

drivers/gpu/drm/amd/amdgpu/psp_v15_0.c

101

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_102, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v15_0.c

104

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_103, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v15_0.c

107

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_101,

drivers/gpu/drm/amd/amdgpu/psp_v15_0.c

128

WREG32_SOC15(MP0, 0, regMPASP_PCRU1_MPASP_C2PMSG_69, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v15_0.c

131

WREG32_SOC15(MP0, 0, regMPASP_PCRU1_MPASP_C2PMSG_70, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v15_0.c

134

WREG32_SOC15(MP0, 0, regMPASP_PCRU1_MPASP_C2PMSG_71, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v15_0.c

138

WREG32_SOC15(MP0, 0, regMPASP_PCRU1_MPASP_C2PMSG_64, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v15_0.c

187

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_102, value);

drivers/gpu/drm/amd/amdgpu/psp_v15_0.c

188

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_101,

drivers/gpu/drm/amd/amdgpu/psp_v15_0.c

191

WREG32_SOC15(MP0, 0, regMPASP_PCRU1_MPASP_C2PMSG_67, value);

drivers/gpu/drm/amd/amdgpu/psp_v15_0.c

63

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_101,

drivers/gpu/drm/amd/amdgpu/psp_v15_0.c

72

WREG32_SOC15(MP0, 0, regMPASP_PCRU1_MPASP_C2PMSG_64,

drivers/gpu/drm/amd/amdgpu/psp_v15_0_8.c

100

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_103, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v15_0_8.c

103

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_101,

drivers/gpu/drm/amd/amdgpu/psp_v15_0_8.c

124

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_69, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v15_0_8.c

127

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_70, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v15_0_8.c

130

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_71, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v15_0_8.c

134

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_64, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v15_0_8.c

183

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_102, value);

drivers/gpu/drm/amd/amdgpu/psp_v15_0_8.c

184

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_101,

drivers/gpu/drm/amd/amdgpu/psp_v15_0_8.c

187

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_67, value);

drivers/gpu/drm/amd/amdgpu/psp_v15_0_8.c

59

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_101,

drivers/gpu/drm/amd/amdgpu/psp_v15_0_8.c

68

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_64,

drivers/gpu/drm/amd/amdgpu/psp_v15_0_8.c

97

WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_102, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

102

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36,

drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

105

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35,

drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

141

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36,

drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

144

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35,

drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

165

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 3);

drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

166

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp);

drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

167

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET);

drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

177

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 4);

drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

178

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp);

drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

179

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET);

drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

206

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

209

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_103, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

214

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

227

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

230

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

233

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_71, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

237

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg);

drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

258

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101,

drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

261

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64,

drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

358

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, value);

drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

360

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101,

drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

364

WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_67, value);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

1343

WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

1349

WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

779

WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

785

WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

782

WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

787

WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

774

WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

779

WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

765

WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

770

WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, 0);

drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c

132

WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_CON, reg);

drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c

153

WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_FS_SPKLEN, 2);

drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c

154

WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_SS_SCL_HCNT, 120);

drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c

155

WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_SS_SCL_LCNT, 130);

drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c

156

WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_SDA_HOLD, 20);

drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c

168

WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_TAR, address & 0x3FF);

drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c

331

WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_DATA_CMD, reg);

drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c

406

WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_DATA_CMD, reg);

drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c

451

WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_ENABLE, reg);

drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c

455

WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_ENABLE, reg);

drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c

54

WREG32_SOC15(SMUIO, 0, mmSMUIO_PWRMGT, reg);

drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c

81

WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_ENABLE, enable ? 1 : 0);

drivers/gpu/drm/amd/amdgpu/smuio_v11_0.c

59

WREG32_SOC15(SMUIO, 0, mmCGTT_ROM_CLK_CTRL0, data);

drivers/gpu/drm/amd/amdgpu/smuio_v11_0_6.c

56

WREG32_SOC15(SMUIO, 0, mmCGTT_ROM_CLK_CTRL0, data);

drivers/gpu/drm/amd/amdgpu/smuio_v13_0.c

58

WREG32_SOC15(SMUIO, 0, regCGTT_ROM_CLK_CTRL0, data);

drivers/gpu/drm/amd/amdgpu/smuio_v9_0.c

56

WREG32_SOC15(SMUIO, 0, mmCGTT_ROM_CLK_CTRL0, data);

drivers/gpu/drm/amd/amdgpu/soc15.c

302

WREG32_SOC15(GC, 0, mmGC_CAC_IND_INDEX, (reg));

drivers/gpu/drm/amd/amdgpu/soc15.c

313

WREG32_SOC15(GC, 0, mmGC_CAC_IND_INDEX, (reg));

drivers/gpu/drm/amd/amdgpu/soc15.c

314

WREG32_SOC15(GC, 0, mmGC_CAC_IND_DATA, (v));

drivers/gpu/drm/amd/amdgpu/soc15.c

324

WREG32_SOC15(GC, 0, mmSE_CAC_IND_INDEX, (reg));

drivers/gpu/drm/amd/amdgpu/soc15.c

335

WREG32_SOC15(GC, 0, mmSE_CAC_IND_INDEX, (reg));

drivers/gpu/drm/amd/amdgpu/soc15.c

336

WREG32_SOC15(GC, 0, mmSE_CAC_IND_DATA, (v));

drivers/gpu/drm/amd/amdgpu/soc21.c

278

WREG32_SOC15(GC, 0, regGRBM_GFX_CNTL, grbm_gfx_cntl);

drivers/gpu/drm/amd/amdgpu/soc24.c

110

WREG32_SOC15(GC, 0, regGRBM_GFX_CNTL, grbm_gfx_cntl);

drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c

193

WREG32_SOC15(VCN, 0, regVCN_AGDB_CTRL0, data);

drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c

199

WREG32_SOC15(VCN, 0, regVCN_AGDB_CTRL1, data);

drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c

205

WREG32_SOC15(VCN, 0, regVCN_AGDB_CTRL2, data);

drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c

211

WREG32_SOC15(VCN, 0, regVCN_AGDB_CTRL3, data);

drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c

223

WREG32_SOC15(VCN, 0, regVCN_UMSCH_RB_DB_CTRL, data);

drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c

228

WREG32_SOC15(VCN, 0, regVCN_UMSCH_RB_BASE_LO, lower_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c

229

WREG32_SOC15(VCN, 0, regVCN_UMSCH_RB_BASE_HI, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c

231

WREG32_SOC15(VCN, 0, regVCN_UMSCH_RB_SIZE, ring->ring_size);

drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c

237

WREG32_SOC15(VCN, 0, regVCN_RB_ENABLE, data);

drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c

252

WREG32_SOC15(VCN, 0, regVCN_RB_ENABLE, data);

drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c

256

WREG32_SOC15(VCN, 0, regVCN_UMSCH_RB_DB_CTRL, data);

drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c

259

WREG32_SOC15(VCN, 0, regUVD_IPX_DLDO_CONFIG,

drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c

65

WREG32_SOC15(VCN, 0, regUVD_IPX_DLDO_CONFIG,

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1007

WREG32_SOC15(UVD, k, mmUVD_LMI_CTRL,

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1020

WREG32_SOC15(UVD, k, mmUVD_LMI_SWAP_CNTL, lmi_swap_cntl);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1021

WREG32_SOC15(UVD, k, mmUVD_MP_SWAP_CNTL, mp_swap_cntl);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1023

WREG32_SOC15(UVD, k, mmUVD_MPC_SET_MUXA0, 0x40c2040);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1024

WREG32_SOC15(UVD, k, mmUVD_MPC_SET_MUXA1, 0x0);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1025

WREG32_SOC15(UVD, k, mmUVD_MPC_SET_MUXB0, 0x40c2040);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1026

WREG32_SOC15(UVD, k, mmUVD_MPC_SET_MUXB1, 0x0);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1027

WREG32_SOC15(UVD, k, mmUVD_MPC_SET_ALU, 0);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1028

WREG32_SOC15(UVD, k, mmUVD_MPC_SET_MUX, 0x88);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1031

WREG32_SOC15(UVD, k, mmUVD_SOFT_RESET,

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1036

WREG32_SOC15(UVD, k, mmUVD_VCPU_CNTL,

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1044

WREG32_SOC15(UVD, k, mmUVD_SOFT_RESET, 0);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1092

WREG32_SOC15(UVD, k, mmUVD_RBC_RB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1095

WREG32_SOC15(UVD, k, mmUVD_RBC_RB_WPTR_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1098

WREG32_SOC15(UVD, k, mmUVD_RBC_RB_RPTR_ADDR,

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1102

WREG32_SOC15(UVD, k, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1104

WREG32_SOC15(UVD, k, mmUVD_LMI_RBC_RB_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1108

WREG32_SOC15(UVD, k, mmUVD_RBC_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1111

WREG32_SOC15(UVD, k, mmUVD_RBC_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1118

WREG32_SOC15(UVD, k, mmUVD_RB_RPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1119

WREG32_SOC15(UVD, k, mmUVD_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1120

WREG32_SOC15(UVD, k, mmUVD_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1121

WREG32_SOC15(UVD, k, mmUVD_RB_BASE_HI, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1122

WREG32_SOC15(UVD, k, mmUVD_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1125

WREG32_SOC15(UVD, k, mmUVD_RB_RPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1126

WREG32_SOC15(UVD, k, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1127

WREG32_SOC15(UVD, k, mmUVD_RB_BASE_LO2, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1128

WREG32_SOC15(UVD, k, mmUVD_RB_BASE_HI2, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1129

WREG32_SOC15(UVD, k, mmUVD_RB_SIZE2, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1149

WREG32_SOC15(UVD, i, mmUVD_RBC_RB_CNTL, 0x11010101);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1158

WREG32_SOC15(UVD, i, mmUVD_SOFT_RESET,

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1163

WREG32_SOC15(UVD, i, mmUVD_VCPU_CNTL, 0x0);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1259

WREG32_SOC15(UVD, ring->me, mmUVD_CONTEXT_ID, 0xCAFEDEAD);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

140

WREG32_SOC15(UVD, ring->me, mmUVD_RBC_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

162

WREG32_SOC15(UVD, ring->me, mmUVD_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

165

WREG32_SOC15(UVD, ring->me, mmUVD_RB_WPTR2,

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

684

WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

688

WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

692

WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_OFFSET0, 0);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

695

WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

697

WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

700

WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_OFFSET0,

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

704

WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_SIZE0, size);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

706

WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

708

WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

710

WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_OFFSET1, (1 << 21));

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

711

WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_SIZE1, AMDGPU_UVD_HEAP_SIZE);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

713

WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

715

WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

717

WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_OFFSET2, (2 << 21));

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

718

WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_SIZE2,

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

721

WREG32_SOC15(UVD, i, mmUVD_UDEC_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

723

WREG32_SOC15(UVD, i, mmUVD_UDEC_DB_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

725

WREG32_SOC15(UVD, i, mmUVD_UDEC_DBW_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

728

WREG32_SOC15(UVD, i, mmUVD_GP_SCRATCH4, adev->uvd.max_handles);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

744

WREG32_SOC15(VCE, 0, mmVCE_MMSCH_VF_CTX_ADDR_LO, lower_32_bits(addr));

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

745

WREG32_SOC15(VCE, 0, mmVCE_MMSCH_VF_CTX_ADDR_HI, upper_32_bits(addr));

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

751

WREG32_SOC15(VCE, 0, mmVCE_MMSCH_VF_VMID, data);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

754

WREG32_SOC15(VCE, 0, mmVCE_MMSCH_VF_CTX_SIZE, size);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

757

WREG32_SOC15(VCE, 0, mmVCE_MMSCH_VF_MAILBOX_RESP, 0);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

768

WREG32_SOC15(VCE, 0, mmVCE_MMSCH_VF_MAILBOX_HOST, 0x10000001);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

995

WREG32_SOC15(UVD, k, mmUVD_SOFT_RESET,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1000

WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_HI, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1001

WREG32_SOC15(UVD, 0, mmUVD_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1004

WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1005

WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1006

WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO2, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1007

WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_HI2, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1008

WREG32_SOC15(UVD, 0, mmUVD_RB_SIZE2, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1036

WREG32_SOC15(UVD, 0, mmUVD_POWER_STATUS, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1133

WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1136

WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1139

WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_RPTR_ADDR,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1143

WREG32_SOC15(UVD, 0, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1145

WREG32_SOC15(UVD, 0, mmUVD_LMI_RBC_RB_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1149

WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1151

WREG32_SOC15(UVD, 0, mmUVD_SCRATCH2, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1154

WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1225

WREG32_SOC15(UVD, 0, mmUVD_STATUS, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1321

WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1328

WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1329

WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_HI, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1330

WREG32_SOC15(UVD, 0, mmUVD_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1331

WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1332

WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1335

WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO2, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1336

WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_HI2, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1337

WREG32_SOC15(UVD, 0, mmUVD_RB_SIZE2, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1338

WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1339

WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1341

WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1350

WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1377

WREG32_SOC15(UVD, 0, mmUVD_POWER_STATUS, reg_data2);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1381

WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1388

WREG32_SOC15(UVD, 0, mmUVD_LMI_JRBC_RB_VMID, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1389

WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_CNTL,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1392

WREG32_SOC15(UVD, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1394

WREG32_SOC15(UVD, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1396

WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_RPTR, ring->wptr);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1397

WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_WPTR, ring->wptr);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1398

WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_CNTL,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1401

WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1410

WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1495

WREG32_SOC15(UVD, 0, mmUVD_SCRATCH2,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1498

WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1707

WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1710

WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

356

WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

358

WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

360

WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

363

WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

365

WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

368

WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

372

WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE0, size);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

375

WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

377

WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

379

WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET1, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

380

WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE1, AMDGPU_VCN_STACK_SIZE);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

383

WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

385

WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

387

WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET2, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

388

WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

390

WREG32_SOC15(UVD, 0, mmUVD_UDEC_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

392

WREG32_SOC15(UVD, 0, mmUVD_UDEC_DB_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

394

WREG32_SOC15(UVD, 0, mmUVD_UDEC_DBW_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

396

WREG32_SOC15(UVD, 0, mmUVD_UDEC_DBW_UV_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

398

WREG32_SOC15(UVD, 0, mmUVD_MIF_CURR_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

400

WREG32_SOC15(UVD, 0, mmUVD_MIF_CURR_UV_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

402

WREG32_SOC15(UVD, 0, mmUVD_MIF_RECON1_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

404

WREG32_SOC15(UVD, 0, mmUVD_MIF_RECON1_UV_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

406

WREG32_SOC15(UVD, 0, mmUVD_MIF_REF_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

408

WREG32_SOC15(UVD, 0, mmUVD_MIF_REF_UV_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

410

WREG32_SOC15(UVD, 0, mmUVD_JPEG_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

412

WREG32_SOC15(UVD, 0, mmUVD_JPEG_UV_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

511

WREG32_SOC15(VCN, 0, mmJPEG_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

515

WREG32_SOC15(VCN, 0, mmJPEG_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

526

WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

549

WREG32_SOC15(VCN, 0, mmUVD_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

572

WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

600

WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

613

WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

636

WREG32_SOC15(VCN, 0, mmJPEG_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

640

WREG32_SOC15(VCN, 0, mmJPEG_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

650

WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

673

WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

686

WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

763

WREG32_SOC15(VCN, 0, mmUVD_PGFSM_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

777

WREG32_SOC15(VCN, 0, mmUVD_PGFSM_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

788

WREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS, data);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

801

WREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS, data);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

816

WREG32_SOC15(VCN, 0, mmUVD_PGFSM_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

854

WREG32_SOC15(UVD, 0, mmUVD_STATUS, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

865

WREG32_SOC15(UVD, 0, mmUVD_LMI_CTRL, tmp |

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

875

WREG32_SOC15(UVD, 0, mmUVD_LMI_SWAP_CNTL, lmi_swap_cntl);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

880

WREG32_SOC15(UVD, 0, mmUVD_MPC_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

882

WREG32_SOC15(UVD, 0, mmUVD_MPC_SET_MUXA0,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

888

WREG32_SOC15(UVD, 0, mmUVD_MPC_SET_MUXB0,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

894

WREG32_SOC15(UVD, 0, mmUVD_MPC_SET_MUX,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

901

WREG32_SOC15(UVD, 0, mmUVD_REG_XX_MASK_1_0, 0x10);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

902

WREG32_SOC15(UVD, 0, mmUVD_RBC_XX_IB_REG_CHECK_1_0,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

906

WREG32_SOC15(UVD, 0, mmUVD_VCPU_CNTL, UVD_VCPU_CNTL__CLK_EN_MASK);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

919

WREG32_SOC15(UVD, 0, mmUVD_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

960

WREG32_SOC15(UVD, 0, mmUVD_STATUS, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

969

WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

972

WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

975

WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_RPTR_ADDR,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

979

WREG32_SOC15(UVD, 0, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

981

WREG32_SOC15(UVD, 0, mmUVD_LMI_RBC_RB_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

985

WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

987

WREG32_SOC15(UVD, 0, mmUVD_SCRATCH2, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

990

WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

997

WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

998

WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

999

WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1020

WREG32_SOC15(UVD, 0, mmUVD_STATUS, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1035

WREG32_SOC15(UVD, 0, mmUVD_LMI_CTRL, tmp |

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1045

WREG32_SOC15(VCN, 0, mmUVD_MPC_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1048

WREG32_SOC15(UVD, 0, mmUVD_MPC_SET_MUXA0,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1055

WREG32_SOC15(UVD, 0, mmUVD_MPC_SET_MUXB0,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1062

WREG32_SOC15(UVD, 0, mmUVD_MPC_SET_MUX,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1080

WREG32_SOC15(VCN, 0, mmUVD_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1088

WREG32_SOC15(UVD, 0, mmUVD_LMI_SWAP_CNTL, lmi_swap_cntl);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1128

WREG32_SOC15(UVD, 0, mmUVD_LMI_RBC_RB_VMID, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1137

WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1141

WREG32_SOC15(UVD, 0, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1143

WREG32_SOC15(UVD, 0, mmUVD_LMI_RBC_RB_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1147

WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1150

WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1156

WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1157

WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1158

WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1159

WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_HI, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1160

WREG32_SOC15(UVD, 0, mmUVD_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1165

WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1166

WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1167

WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO2, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1168

WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_HI2, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1169

WREG32_SOC15(UVD, 0, mmUVD_RB_SIZE2, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1245

WREG32_SOC15(VCN, 0, mmUVD_LMI_CTRL2, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1273

WREG32_SOC15(VCN, 0, mmUVD_STATUS, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1314

WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1329

WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1330

WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_HI, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1331

WREG32_SOC15(UVD, 0, mmUVD_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1332

WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1333

WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1339

WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO2, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1340

WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_HI2, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1341

WREG32_SOC15(UVD, 0, mmUVD_RB_SIZE2, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1342

WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1343

WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1347

WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1361

WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1461

WREG32_SOC15(UVD, 0, mmUVD_SCRATCH2,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1468

WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1700

WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1707

WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1905

WREG32_SOC15(UVD, 0, mmMMSCH_VF_CTX_ADDR_LO, lower_32_bits(addr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1906

WREG32_SOC15(UVD, 0, mmMMSCH_VF_CTX_ADDR_HI, upper_32_bits(addr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1913

WREG32_SOC15(UVD, 0, mmMMSCH_VF_VMID, data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1916

WREG32_SOC15(UVD, 0, mmMMSCH_VF_CTX_SIZE, size);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1919

WREG32_SOC15(UVD, 0, mmMMSCH_VF_MAILBOX_RESP, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1934

WREG32_SOC15(UVD, 0, mmMMSCH_VF_MAILBOX_HOST, 0x10000001);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

392

WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

394

WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

396

WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

399

WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

401

WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

404

WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

408

WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE0, size);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

411

WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

413

WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

415

WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET1, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

416

WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE1, AMDGPU_VCN_STACK_SIZE);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

419

WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

421

WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

423

WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET2, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

424

WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

427

WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_NC0_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

429

WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_NC0_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

431

WREG32_SOC15(UVD, 0, mmUVD_VCPU_NONCACHE_OFFSET0, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

432

WREG32_SOC15(UVD, 0, mmUVD_VCPU_NONCACHE_SIZE0,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

435

WREG32_SOC15(UVD, 0, mmUVD_GFX10_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

559

WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

582

WREG32_SOC15(VCN, 0, mmUVD_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

605

WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

633

WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

646

WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

721

WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

744

WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

757

WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

780

WREG32_SOC15(VCN, 0, mmUVD_PGFSM_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

794

WREG32_SOC15(VCN, 0, mmUVD_PGFSM_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

807

WREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS, data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

823

WREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS, data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

837

WREG32_SOC15(VCN, 0, mmUVD_PGFSM_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

867

WREG32_SOC15(UVD, 0, mmUVD_POWER_STATUS, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

958

WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

967

WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

970

WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_RPTR_ADDR,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

974

WREG32_SOC15(UVD, 0, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

976

WREG32_SOC15(UVD, 0, mmUVD_LMI_RBC_RB_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

980

WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

982

WREG32_SOC15(UVD, 0, mmUVD_SCRATCH2, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

985

WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1015

WREG32_SOC15(VCN, inst_idx, mmUVD_POWER_STATUS, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1113

WREG32_SOC15(VCN, inst_idx, mmUVD_RBC_RB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1122

WREG32_SOC15(VCN, inst_idx, mmUVD_RBC_RB_WPTR_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1125

WREG32_SOC15(VCN, inst_idx, mmUVD_RBC_RB_RPTR_ADDR,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1129

WREG32_SOC15(VCN, inst_idx, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1131

WREG32_SOC15(VCN, inst_idx, mmUVD_LMI_RBC_RB_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1135

WREG32_SOC15(VCN, inst_idx, mmUVD_RBC_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1137

WREG32_SOC15(VCN, inst_idx, mmUVD_SCRATCH2, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1140

WREG32_SOC15(VCN, inst_idx, mmUVD_RBC_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1181

WREG32_SOC15(VCN, i, mmUVD_STATUS, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1200

WREG32_SOC15(VCN, i, mmUVD_LMI_CTRL, tmp | 0x8|

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1210

WREG32_SOC15(VCN, i, mmUVD_MPC_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1213

WREG32_SOC15(VCN, i, mmUVD_MPC_SET_MUXA0,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1220

WREG32_SOC15(VCN, i, mmUVD_MPC_SET_MUXB0,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1227

WREG32_SOC15(VCN, i, mmUVD_MPC_SET_MUX,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1235

WREG32_SOC15(VCN, i, mmUVD_GFX8_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1237

WREG32_SOC15(VCN, i, mmUVD_GFX8_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1293

WREG32_SOC15(VCN, i, mmUVD_LMI_RBC_RB_VMID, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1303

WREG32_SOC15(VCN, i, mmUVD_RBC_RB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1307

WREG32_SOC15(VCN, i, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1309

WREG32_SOC15(VCN, i, mmUVD_LMI_RBC_RB_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1313

WREG32_SOC15(VCN, i, mmUVD_RBC_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1316

WREG32_SOC15(VCN, i, mmUVD_RBC_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1322

WREG32_SOC15(VCN, i, mmUVD_RB_RPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1323

WREG32_SOC15(VCN, i, mmUVD_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1324

WREG32_SOC15(VCN, i, mmUVD_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1325

WREG32_SOC15(VCN, i, mmUVD_RB_BASE_HI, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1326

WREG32_SOC15(VCN, i, mmUVD_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1331

WREG32_SOC15(VCN, i, mmUVD_RB_RPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1332

WREG32_SOC15(VCN, i, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1333

WREG32_SOC15(VCN, i, mmUVD_RB_BASE_LO2, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1334

WREG32_SOC15(VCN, i, mmUVD_RB_BASE_HI2, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1335

WREG32_SOC15(VCN, i, mmUVD_RB_SIZE2, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1360

WREG32_SOC15(VCN, 0, mmMMSCH_VF_CTX_ADDR_LO, lower_32_bits(addr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1361

WREG32_SOC15(VCN, 0, mmMMSCH_VF_CTX_ADDR_HI, upper_32_bits(addr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1368

WREG32_SOC15(VCN, 0, mmMMSCH_VF_VMID, data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1371

WREG32_SOC15(VCN, 0, mmMMSCH_VF_CTX_SIZE, size);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1374

WREG32_SOC15(VCN, 0, mmMMSCH_VF_MAILBOX_RESP, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1380

WREG32_SOC15(VCN, 0, mmMMSCH_VF_MAILBOX_HOST, 0x10000001);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1608

WREG32_SOC15(VCN, i, mmUVD_LMI_CTRL2, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1631

WREG32_SOC15(VCN, i, mmUVD_STATUS, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1676

WREG32_SOC15(VCN, inst_idx, mmUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1692

WREG32_SOC15(VCN, inst_idx, mmUVD_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1693

WREG32_SOC15(VCN, inst_idx, mmUVD_RB_BASE_HI, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1694

WREG32_SOC15(VCN, inst_idx, mmUVD_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1695

WREG32_SOC15(VCN, inst_idx, mmUVD_RB_RPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1696

WREG32_SOC15(VCN, inst_idx, mmUVD_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1702

WREG32_SOC15(VCN, inst_idx, mmUVD_RB_BASE_LO2, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1703

WREG32_SOC15(VCN, inst_idx, mmUVD_RB_BASE_HI2, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1704

WREG32_SOC15(VCN, inst_idx, mmUVD_RB_SIZE2, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1705

WREG32_SOC15(VCN, inst_idx, mmUVD_RB_RPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1706

WREG32_SOC15(VCN, inst_idx, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1718

WREG32_SOC15(VCN, inst_idx, mmUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1774

WREG32_SOC15(VCN, ring->me, mmUVD_RBC_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1866

WREG32_SOC15(VCN, ring->me, mmUVD_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1873

WREG32_SOC15(VCN, ring->me, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

601

WREG32_SOC15(VCN, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

603

WREG32_SOC15(VCN, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

605

WREG32_SOC15(VCN, i, mmUVD_VCPU_CACHE_OFFSET0, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

608

WREG32_SOC15(VCN, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

610

WREG32_SOC15(VCN, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

613

WREG32_SOC15(VCN, i, mmUVD_VCPU_CACHE_OFFSET0,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

616

WREG32_SOC15(VCN, i, mmUVD_VCPU_CACHE_SIZE0, size);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

619

WREG32_SOC15(VCN, i, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

621

WREG32_SOC15(VCN, i, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

623

WREG32_SOC15(VCN, i, mmUVD_VCPU_CACHE_OFFSET1, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

624

WREG32_SOC15(VCN, i, mmUVD_VCPU_CACHE_SIZE1, AMDGPU_VCN_STACK_SIZE);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

627

WREG32_SOC15(VCN, i, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

629

WREG32_SOC15(VCN, i, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

631

WREG32_SOC15(VCN, i, mmUVD_VCPU_CACHE_OFFSET2, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

632

WREG32_SOC15(VCN, i, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

635

WREG32_SOC15(VCN, i, mmUVD_LMI_VCPU_NC0_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

637

WREG32_SOC15(VCN, i, mmUVD_LMI_VCPU_NC0_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

639

WREG32_SOC15(VCN, i, mmUVD_VCPU_NONCACHE_OFFSET0, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

640

WREG32_SOC15(VCN, i, mmUVD_VCPU_NONCACHE_SIZE0,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

766

WREG32_SOC15(VCN, i, mmUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

790

WREG32_SOC15(VCN, i, mmUVD_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

815

WREG32_SOC15(VCN, i, mmUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

843

WREG32_SOC15(VCN, i, mmUVD_SUVD_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

856

WREG32_SOC15(VCN, i, mmUVD_SUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

932

WREG32_SOC15(VCN, i, mmUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

954

WREG32_SOC15(VCN, i, mmUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

967

WREG32_SOC15(VCN, i, mmUVD_SUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1003

WREG32_SOC15(VCN, inst, mmUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1025

WREG32_SOC15(VCN, inst, mmUVD_SUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1044

WREG32_SOC15(VCN, inst_idx, mmUVD_POWER_STATUS, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1144

WREG32_SOC15(VCN, inst_idx, mmUVD_RBC_RB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1153

WREG32_SOC15(VCN, inst_idx, mmUVD_RBC_RB_WPTR_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1156

WREG32_SOC15(VCN, inst_idx, mmUVD_RBC_RB_RPTR_ADDR,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1160

WREG32_SOC15(VCN, inst_idx, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1162

WREG32_SOC15(VCN, inst_idx, mmUVD_LMI_RBC_RB_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1166

WREG32_SOC15(VCN, inst_idx, mmUVD_RBC_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1168

WREG32_SOC15(VCN, inst_idx, mmUVD_SCRATCH2, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1171

WREG32_SOC15(VCN, inst_idx, mmUVD_RBC_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1216

WREG32_SOC15(VCN, i, mmUVD_STATUS, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1236

WREG32_SOC15(VCN, i, mmUVD_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1240

WREG32_SOC15(VCN, i, mmUVD_LMI_CTRL, tmp |

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1250

WREG32_SOC15(VCN, i, mmUVD_MPC_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1253

WREG32_SOC15(VCN, i, mmUVD_MPC_SET_MUXA0,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1260

WREG32_SOC15(VCN, i, mmUVD_MPC_SET_MUXB0,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1267

WREG32_SOC15(VCN, i, mmUVD_MPC_SET_MUX,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1275

WREG32_SOC15(VCN, i, mmUVD_GFX10_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1325

WREG32_SOC15(VCN, i, mmUVD_LMI_RBC_RB_VMID, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1335

WREG32_SOC15(VCN, i, mmUVD_RBC_RB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1341

WREG32_SOC15(VCN, i, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1343

WREG32_SOC15(VCN, i, mmUVD_LMI_RBC_RB_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1347

WREG32_SOC15(VCN, i, mmUVD_RBC_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1349

WREG32_SOC15(VCN, i, mmUVD_SCRATCH2, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1351

WREG32_SOC15(VCN, i, mmUVD_RBC_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1360

WREG32_SOC15(VCN, i, mmUVD_RB_RPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1361

WREG32_SOC15(VCN, i, mmUVD_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1362

WREG32_SOC15(VCN, i, mmUVD_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1363

WREG32_SOC15(VCN, i, mmUVD_RB_BASE_HI, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1364

WREG32_SOC15(VCN, i, mmUVD_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1369

WREG32_SOC15(VCN, i, mmUVD_RB_RPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1370

WREG32_SOC15(VCN, i, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1371

WREG32_SOC15(VCN, i, mmUVD_RB_BASE_LO2, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1372

WREG32_SOC15(VCN, i, mmUVD_RB_BASE_HI2, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1373

WREG32_SOC15(VCN, i, mmUVD_RB_SIZE2, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1549

WREG32_SOC15(VCN, 0, mmMMSCH_VF_CTX_ADDR_LO, lower_32_bits(ctx_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1550

WREG32_SOC15(VCN, 0, mmMMSCH_VF_CTX_ADDR_HI, upper_32_bits(ctx_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1557

WREG32_SOC15(VCN, 0, mmMMSCH_VF_VMID, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1561

WREG32_SOC15(VCN, 0, mmMMSCH_VF_CTX_SIZE, size);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1564

WREG32_SOC15(VCN, 0, mmMMSCH_VF_MAILBOX_RESP, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1570

WREG32_SOC15(VCN, 0, mmMMSCH_VF_MAILBOX_HOST, param);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1663

WREG32_SOC15(VCN, i, mmUVD_LMI_CTRL2, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1687

WREG32_SOC15(VCN, i, mmUVD_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1690

WREG32_SOC15(VCN, i, mmUVD_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1693

WREG32_SOC15(VCN, i, mmUVD_STATUS, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1737

WREG32_SOC15(VCN, inst_idx, mmUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1756

WREG32_SOC15(VCN, inst_idx, mmUVD_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1757

WREG32_SOC15(VCN, inst_idx, mmUVD_RB_BASE_HI, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1758

WREG32_SOC15(VCN, inst_idx, mmUVD_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1759

WREG32_SOC15(VCN, inst_idx, mmUVD_RB_RPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1760

WREG32_SOC15(VCN, inst_idx, mmUVD_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1766

WREG32_SOC15(VCN, inst_idx, mmUVD_RB_BASE_LO2, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1767

WREG32_SOC15(VCN, inst_idx, mmUVD_RB_BASE_HI2, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1768

WREG32_SOC15(VCN, inst_idx, mmUVD_RB_SIZE2, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1769

WREG32_SOC15(VCN, inst_idx, mmUVD_RB_RPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1770

WREG32_SOC15(VCN, inst_idx, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1774

WREG32_SOC15(VCN, inst_idx, mmUVD_RBC_RB_RPTR, fw_shared->rb.rptr);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1775

WREG32_SOC15(VCN, inst_idx, mmUVD_RBC_RB_WPTR, fw_shared->rb.wptr);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1788

WREG32_SOC15(VCN, inst_idx, mmUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1843

WREG32_SOC15(VCN, ring->me, mmUVD_SCRATCH2,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1851

WREG32_SOC15(VCN, ring->me, mmUVD_RBC_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

2110

WREG32_SOC15(VCN, ring->me, mmUVD_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

2117

WREG32_SOC15(VCN, ring->me, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

529

WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

531

WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

533

WREG32_SOC15(VCN, inst, mmUVD_VCPU_CACHE_OFFSET0, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

536

WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

538

WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

541

WREG32_SOC15(VCN, inst, mmUVD_VCPU_CACHE_OFFSET0,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

544

WREG32_SOC15(VCN, inst, mmUVD_VCPU_CACHE_SIZE0, size);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

547

WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

549

WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

551

WREG32_SOC15(VCN, inst, mmUVD_VCPU_CACHE_OFFSET1, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

552

WREG32_SOC15(VCN, inst, mmUVD_VCPU_CACHE_SIZE1, AMDGPU_VCN_STACK_SIZE);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

555

WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

557

WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

559

WREG32_SOC15(VCN, inst, mmUVD_VCPU_CACHE_OFFSET2, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

560

WREG32_SOC15(VCN, inst, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

563

WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_NC0_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

565

WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_NC0_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

567

WREG32_SOC15(VCN, inst, mmUVD_VCPU_NONCACHE_OFFSET0, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

568

WREG32_SOC15(VCN, inst, mmUVD_VCPU_NONCACHE_SIZE0,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

693

WREG32_SOC15(VCN, inst, mmUVD_PGFSM_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

711

WREG32_SOC15(VCN, inst, mmUVD_PGFSM_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

721

WREG32_SOC15(VCN, inst, mmUVD_POWER_STATUS, data);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

735

WREG32_SOC15(VCN, inst, mmUVD_POWER_STATUS, data);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

751

WREG32_SOC15(VCN, inst, mmUVD_PGFSM_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

792

WREG32_SOC15(VCN, inst, mmUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

816

WREG32_SOC15(VCN, inst, mmUVD_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

841

WREG32_SOC15(VCN, inst, mmUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

875

WREG32_SOC15(VCN, inst, mmUVD_SUVD_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

883

WREG32_SOC15(VCN, inst, mmUVD_SUVD_CGC_GATE2, data);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

905

WREG32_SOC15(VCN, inst, mmUVD_SUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

980

WREG32_SOC15(VCN, inst, mmUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1012

WREG32_SOC15(VCN, inst_idx, regUVD_POWER_STATUS, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1096

WREG32_SOC15(VCN, inst_idx, regUVD_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1097

WREG32_SOC15(VCN, inst_idx, regUVD_RB_BASE_HI, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1098

WREG32_SOC15(VCN, inst_idx, regUVD_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1102

WREG32_SOC15(VCN, inst_idx, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1104

WREG32_SOC15(VCN, inst_idx, regUVD_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1105

WREG32_SOC15(VCN, inst_idx, regUVD_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1108

WREG32_SOC15(VCN, inst_idx, regUVD_RB_WPTR, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1113

WREG32_SOC15(VCN, inst_idx, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1116

WREG32_SOC15(VCN, inst_idx, regVCN_RB1_DB_CTRL,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1161

WREG32_SOC15(VCN, i, regUVD_STATUS, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1181

WREG32_SOC15(VCN, i, regUVD_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1185

WREG32_SOC15(VCN, i, regUVD_LMI_CTRL, tmp |

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1195

WREG32_SOC15(VCN, i, regUVD_MPC_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1198

WREG32_SOC15(VCN, i, regUVD_MPC_SET_MUXA0,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1205

WREG32_SOC15(VCN, i, regUVD_MPC_SET_MUXB0,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1212

WREG32_SOC15(VCN, i, regUVD_MPC_SET_MUX,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1220

WREG32_SOC15(VCN, i, regUVD_GFX10_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1282

WREG32_SOC15(VCN, i, regVCN_RB1_DB_CTRL,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1286

WREG32_SOC15(VCN, i, regUVD_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1287

WREG32_SOC15(VCN, i, regUVD_RB_BASE_HI, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1288

WREG32_SOC15(VCN, i, regUVD_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1292

WREG32_SOC15(VCN, i, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1294

WREG32_SOC15(VCN, i, regUVD_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1295

WREG32_SOC15(VCN, i, regUVD_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1298

WREG32_SOC15(VCN, i, regUVD_RB_WPTR, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1303

WREG32_SOC15(VCN, i, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1511

WREG32_SOC15(VCN, 0, regMMSCH_VF_CTX_ADDR_LO, lower_32_bits(ctx_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1512

WREG32_SOC15(VCN, 0, regMMSCH_VF_CTX_ADDR_HI, upper_32_bits(ctx_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1519

WREG32_SOC15(VCN, 0, regMMSCH_VF_VMID, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1523

WREG32_SOC15(VCN, 0, regMMSCH_VF_CTX_SIZE, size);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1526

WREG32_SOC15(VCN, 0, regMMSCH_VF_MAILBOX_RESP, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1532

WREG32_SOC15(VCN, 0, regMMSCH_VF_MAILBOX_HOST, param);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1640

WREG32_SOC15(VCN, i, regUVD_LMI_CTRL2, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1664

WREG32_SOC15(VCN, i, regUVD_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1667

WREG32_SOC15(VCN, i, regUVD_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1670

WREG32_SOC15(VCN, i, regUVD_STATUS, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1720

WREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1733

WREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1796

WREG32_SOC15(VCN, ring->me, regUVD_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

459

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

461

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

463

WREG32_SOC15(VCN, inst, regUVD_VCPU_CACHE_OFFSET0, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

466

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

468

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

471

WREG32_SOC15(VCN, inst, regUVD_VCPU_CACHE_OFFSET0, AMDGPU_UVD_FIRMWARE_OFFSET >> 3);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

473

WREG32_SOC15(VCN, inst, regUVD_VCPU_CACHE_SIZE0, size);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

476

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

478

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

480

WREG32_SOC15(VCN, inst, regUVD_VCPU_CACHE_OFFSET1, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

481

WREG32_SOC15(VCN, inst, regUVD_VCPU_CACHE_SIZE1, AMDGPU_VCN_STACK_SIZE);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

484

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_CACHE2_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

486

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

488

WREG32_SOC15(VCN, inst, regUVD_VCPU_CACHE_OFFSET2, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

489

WREG32_SOC15(VCN, inst, regUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

492

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_NC0_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

494

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_NC0_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

496

WREG32_SOC15(VCN, inst, regUVD_VCPU_NONCACHE_OFFSET0, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

497

WREG32_SOC15(VCN, inst, regUVD_VCPU_NONCACHE_SIZE0,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

640

WREG32_SOC15(VCN, inst, regUVD_PGFSM_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

662

WREG32_SOC15(VCN, inst, regUVD_PGFSM_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

672

WREG32_SOC15(VCN, inst, regUVD_POWER_STATUS, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

695

WREG32_SOC15(VCN, inst, regUVD_POWER_STATUS, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

711

WREG32_SOC15(VCN, inst, regUVD_PGFSM_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

754

WREG32_SOC15(VCN, inst, regUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

778

WREG32_SOC15(VCN, inst, regUVD_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

802

WREG32_SOC15(VCN, inst, regUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

829

WREG32_SOC15(VCN, inst, regUVD_SUVD_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

842

WREG32_SOC15(VCN, inst, regUVD_SUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

925

WREG32_SOC15(VCN, inst, regUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

948

WREG32_SOC15(VCN, inst, regUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

961

WREG32_SOC15(VCN, inst, regUVD_SUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1136

WREG32_SOC15(VCN, vcn_inst, regMMSCH_VF_CTX_ADDR_LO, lower_32_bits(ctx_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1137

WREG32_SOC15(VCN, vcn_inst, regMMSCH_VF_CTX_ADDR_HI, upper_32_bits(ctx_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1142

WREG32_SOC15(VCN, vcn_inst, regMMSCH_VF_VMID, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1145

WREG32_SOC15(VCN, vcn_inst, regMMSCH_VF_CTX_SIZE, size);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1147

WREG32_SOC15(VCN, vcn_inst, regMMSCH_VF_MAILBOX_RESP, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1150

WREG32_SOC15(VCN, vcn_inst, regMMSCH_VF_MAILBOX_HOST, param);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1206

WREG32_SOC15(VCN, vcn_inst, regUVD_STATUS, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1227

WREG32_SOC15(VCN, vcn_inst, regUVD_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1231

WREG32_SOC15(VCN, vcn_inst, regUVD_LMI_CTRL,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1241

WREG32_SOC15(VCN, vcn_inst, regUVD_MPC_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1244

WREG32_SOC15(VCN, vcn_inst, regUVD_MPC_SET_MUXA0,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1251

WREG32_SOC15(VCN, vcn_inst, regUVD_MPC_SET_MUXB0,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1258

WREG32_SOC15(VCN, vcn_inst, regUVD_MPC_SET_MUX,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1266

WREG32_SOC15(VCN, vcn_inst, regUVD_GFX8_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1268

WREG32_SOC15(VCN, vcn_inst, regUVD_GFX10_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1326

WREG32_SOC15(VCN, vcn_inst, regUVD_RB_BASE_LO,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1328

WREG32_SOC15(VCN, vcn_inst, regUVD_RB_BASE_HI,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1331

WREG32_SOC15(VCN, vcn_inst, regUVD_RB_SIZE,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1337

WREG32_SOC15(VCN, vcn_inst, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1340

WREG32_SOC15(VCN, vcn_inst, regUVD_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1341

WREG32_SOC15(VCN, vcn_inst, regUVD_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1345

WREG32_SOC15(VCN, vcn_inst, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1440

WREG32_SOC15(VCN, vcn_inst, regUVD_LMI_CTRL2, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1465

WREG32_SOC15(VCN, vcn_inst, regUVD_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1469

WREG32_SOC15(VCN, vcn_inst, regUVD_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1472

WREG32_SOC15(VCN, vcn_inst, regUVD_STATUS, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1516

WREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1526

WREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1635

WREG32_SOC15(VCN, GET_INST(VCN, ring->me), regUVD_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

306

WREG32_SOC15(VCN, vcn_inst, regVCN_RB1_DB_CTRL,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

465

WREG32_SOC15(

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

469

WREG32_SOC15(

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

473

WREG32_SOC15(VCN, vcn_inst, regUVD_VCPU_CACHE_OFFSET0, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

476

WREG32_SOC15(VCN, vcn_inst, regUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

478

WREG32_SOC15(VCN, vcn_inst,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

482

WREG32_SOC15(VCN, vcn_inst, regUVD_VCPU_CACHE_OFFSET0,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

485

WREG32_SOC15(VCN, vcn_inst, regUVD_VCPU_CACHE_SIZE0, size);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

488

WREG32_SOC15(VCN, vcn_inst, regUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

490

WREG32_SOC15(VCN, vcn_inst, regUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

492

WREG32_SOC15(VCN, vcn_inst, regUVD_VCPU_CACHE_OFFSET1, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

493

WREG32_SOC15(VCN, vcn_inst, regUVD_VCPU_CACHE_SIZE1,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

497

WREG32_SOC15(VCN, vcn_inst, regUVD_LMI_VCPU_CACHE2_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

500

WREG32_SOC15(VCN, vcn_inst, regUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

503

WREG32_SOC15(VCN, vcn_inst, regUVD_VCPU_CACHE_OFFSET2, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

504

WREG32_SOC15(VCN, vcn_inst, regUVD_VCPU_CACHE_SIZE2,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

508

WREG32_SOC15(

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

511

WREG32_SOC15(

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

514

WREG32_SOC15(VCN, vcn_inst, regUVD_VCPU_NONCACHE_OFFSET0, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

515

WREG32_SOC15(

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

660

WREG32_SOC15(VCN, vcn_inst, regUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

676

WREG32_SOC15(VCN, vcn_inst, regUVD_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

692

WREG32_SOC15(VCN, vcn_inst, regUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

716

WREG32_SOC15(VCN, vcn_inst, regUVD_SUVD_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

727

WREG32_SOC15(VCN, vcn_inst, regUVD_SUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

807

WREG32_SOC15(VCN, vcn_inst, regUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

821

WREG32_SOC15(VCN, vcn_inst, regUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

832

WREG32_SOC15(VCN, vcn_inst, regUVD_SUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

863

WREG32_SOC15(VCN, vcn_inst, regUVD_POWER_STATUS, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

959

WREG32_SOC15(VCN, vcn_inst, regUVD_RB_BASE_LO,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

961

WREG32_SOC15(VCN, vcn_inst, regUVD_RB_BASE_HI,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

964

WREG32_SOC15(VCN, vcn_inst, regUVD_RB_SIZE,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

970

WREG32_SOC15(VCN, vcn_inst, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

974

WREG32_SOC15(VCN, vcn_inst, regUVD_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

975

WREG32_SOC15(VCN, vcn_inst, regUVD_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

980

WREG32_SOC15(VCN, vcn_inst, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1009

WREG32_SOC15(VCN, inst_idx, regUVD_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1010

WREG32_SOC15(VCN, inst_idx, regUVD_RB_BASE_HI, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1011

WREG32_SOC15(VCN, inst_idx, regUVD_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1015

WREG32_SOC15(VCN, inst_idx, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1017

WREG32_SOC15(VCN, inst_idx, regUVD_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1018

WREG32_SOC15(VCN, inst_idx, regUVD_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1021

WREG32_SOC15(VCN, inst_idx, regUVD_RB_WPTR, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1026

WREG32_SOC15(VCN, inst_idx, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1029

WREG32_SOC15(VCN, inst_idx, regVCN_RB1_DB_CTRL,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1073

WREG32_SOC15(VCN, i, regUVD_STATUS, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1093

WREG32_SOC15(VCN, i, regUVD_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1097

WREG32_SOC15(VCN, i, regUVD_LMI_CTRL, tmp |

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1107

WREG32_SOC15(VCN, i, regUVD_MPC_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1110

WREG32_SOC15(VCN, i, regUVD_MPC_SET_MUXA0,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1117

WREG32_SOC15(VCN, i, regUVD_MPC_SET_MUXB0,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1124

WREG32_SOC15(VCN, i, regUVD_MPC_SET_MUX,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1132

WREG32_SOC15(VCN, i, regUVD_GFX10_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1195

WREG32_SOC15(VCN, i, regVCN_RB1_DB_CTRL,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1199

WREG32_SOC15(VCN, i, regUVD_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1200

WREG32_SOC15(VCN, i, regUVD_RB_BASE_HI, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1201

WREG32_SOC15(VCN, i, regUVD_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1205

WREG32_SOC15(VCN, i, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1207

WREG32_SOC15(VCN, i, regUVD_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1208

WREG32_SOC15(VCN, i, regUVD_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1211

WREG32_SOC15(VCN, i, regUVD_RB_WPTR, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1216

WREG32_SOC15(VCN, i, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1303

WREG32_SOC15(VCN, i, regUVD_LMI_CTRL2, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1327

WREG32_SOC15(VCN, i, regUVD_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1330

WREG32_SOC15(VCN, i, regUVD_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1333

WREG32_SOC15(VCN, i, regUVD_STATUS, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1383

WREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1397

WREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1460

WREG32_SOC15(VCN, ring->me, regUVD_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

410

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

412

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

414

WREG32_SOC15(VCN, inst, regUVD_VCPU_CACHE_OFFSET0, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

417

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

419

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

422

WREG32_SOC15(VCN, inst, regUVD_VCPU_CACHE_OFFSET0, AMDGPU_UVD_FIRMWARE_OFFSET >> 3);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

424

WREG32_SOC15(VCN, inst, regUVD_VCPU_CACHE_SIZE0, size);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

427

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

429

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

431

WREG32_SOC15(VCN, inst, regUVD_VCPU_CACHE_OFFSET1, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

432

WREG32_SOC15(VCN, inst, regUVD_VCPU_CACHE_SIZE1, AMDGPU_VCN_STACK_SIZE);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

435

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_CACHE2_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

437

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

439

WREG32_SOC15(VCN, inst, regUVD_VCPU_CACHE_OFFSET2, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

440

WREG32_SOC15(VCN, inst, regUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

443

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_NC0_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

445

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_NC0_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

447

WREG32_SOC15(VCN, inst, regUVD_VCPU_NONCACHE_OFFSET0, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

448

WREG32_SOC15(VCN, inst, regUVD_VCPU_NONCACHE_SIZE0,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

582

WREG32_SOC15(VCN, inst, regUVD_IPX_DLDO_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

586

WREG32_SOC15(VCN, inst, regUVD_IPX_DLDO_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

591

WREG32_SOC15(VCN, inst, regUVD_IPX_DLDO_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

596

WREG32_SOC15(VCN, inst, regUVD_IPX_DLDO_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

602

WREG32_SOC15(VCN, inst, regUVD_IPX_DLDO_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

606

WREG32_SOC15(VCN, inst, regUVD_IPX_DLDO_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

610

WREG32_SOC15(VCN, inst, regUVD_IPX_DLDO_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

614

WREG32_SOC15(VCN, inst, regUVD_IPX_DLDO_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

625

WREG32_SOC15(VCN, inst, regUVD_POWER_STATUS, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

646

WREG32_SOC15(VCN, inst, regUVD_POWER_STATUS, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

648

WREG32_SOC15(VCN, inst, regUVD_IPX_DLDO_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

653

WREG32_SOC15(VCN, inst, regUVD_IPX_DLDO_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

658

WREG32_SOC15(VCN, inst, regUVD_IPX_DLDO_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

663

WREG32_SOC15(VCN, inst, regUVD_IPX_DLDO_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

692

WREG32_SOC15(VCN, inst, regUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

716

WREG32_SOC15(VCN, inst, regUVD_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

740

WREG32_SOC15(VCN, inst, regUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

767

WREG32_SOC15(VCN, inst, regUVD_SUVD_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

780

WREG32_SOC15(VCN, inst, regUVD_SUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

863

WREG32_SOC15(VCN, inst, regUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

886

WREG32_SOC15(VCN, inst, regUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

899

WREG32_SOC15(VCN, inst, regUVD_SUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

927

WREG32_SOC15(VCN, inst_idx, regUVD_POWER_STATUS, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

1034

WREG32_SOC15(VCN, i, regUVD_LMI_CTRL2, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

1058

WREG32_SOC15(VCN, i, regUVD_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

1061

WREG32_SOC15(VCN, i, regUVD_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

1064

WREG32_SOC15(VCN, i, regUVD_STATUS, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

1111

WREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

1121

WREG32_SOC15(VCN, inst_idx, regUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

1184

WREG32_SOC15(VCN, ring->me, regUVD_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

374

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

376

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

378

WREG32_SOC15(VCN, inst, regUVD_VCPU_CACHE_OFFSET0, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

381

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

383

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

386

WREG32_SOC15(VCN, inst, regUVD_VCPU_CACHE_OFFSET0, AMDGPU_UVD_FIRMWARE_OFFSET >> 3);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

388

WREG32_SOC15(VCN, inst, regUVD_VCPU_CACHE_SIZE0, size);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

391

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

393

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

395

WREG32_SOC15(VCN, inst, regUVD_VCPU_CACHE_OFFSET1, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

396

WREG32_SOC15(VCN, inst, regUVD_VCPU_CACHE_SIZE1, AMDGPU_VCN_STACK_SIZE);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

399

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_CACHE2_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

401

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

403

WREG32_SOC15(VCN, inst, regUVD_VCPU_CACHE_OFFSET2, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

404

WREG32_SOC15(VCN, inst, regUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

407

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_NC0_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

409

WREG32_SOC15(VCN, inst, regUVD_LMI_VCPU_NC0_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

411

WREG32_SOC15(VCN, inst, regUVD_VCPU_NONCACHE_OFFSET0, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

412

WREG32_SOC15(VCN, inst, regUVD_VCPU_NONCACHE_SIZE0,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

544

WREG32_SOC15(VCN, inst, regUVD_IPX_DLDO_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

549

WREG32_SOC15(VCN, inst, regUVD_IPX_DLDO_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

555

WREG32_SOC15(VCN, inst, regUVD_IPX_DLDO_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

561

WREG32_SOC15(VCN, inst, regUVD_IPX_DLDO_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

567

WREG32_SOC15(VCN, inst, regUVD_IPX_DLDO_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

572

WREG32_SOC15(VCN, inst, regUVD_IPX_DLDO_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

577

WREG32_SOC15(VCN, inst, regUVD_IPX_DLDO_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

582

WREG32_SOC15(VCN, inst, regUVD_IPX_DLDO_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

593

WREG32_SOC15(VCN, inst, regUVD_POWER_STATUS, data);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

615

WREG32_SOC15(VCN, inst, regUVD_POWER_STATUS, data);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

618

WREG32_SOC15(VCN, inst, regUVD_IPX_DLDO_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

624

WREG32_SOC15(VCN, inst, regUVD_IPX_DLDO_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

630

WREG32_SOC15(VCN, inst, regUVD_IPX_DLDO_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

636

WREG32_SOC15(VCN, inst, regUVD_IPX_DLDO_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

712

WREG32_SOC15(VCN, inst_idx, regUVD_POWER_STATUS, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

766

WREG32_SOC15(VCN, inst_idx, regUVD_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

767

WREG32_SOC15(VCN, inst_idx, regUVD_RB_BASE_HI, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

768

WREG32_SOC15(VCN, inst_idx, regUVD_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

772

WREG32_SOC15(VCN, inst_idx, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

774

WREG32_SOC15(VCN, inst_idx, regUVD_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

775

WREG32_SOC15(VCN, inst_idx, regUVD_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

778

WREG32_SOC15(VCN, inst_idx, regUVD_RB_WPTR, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

783

WREG32_SOC15(VCN, inst_idx, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

786

WREG32_SOC15(VCN, inst_idx, regVCN_RB1_DB_CTRL,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

830

WREG32_SOC15(VCN, i, regUVD_STATUS, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

847

WREG32_SOC15(VCN, i, regUVD_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

851

WREG32_SOC15(VCN, i, regUVD_LMI_CTRL, tmp |

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

860

WREG32_SOC15(VCN, i, regUVD_GFX10_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

923

WREG32_SOC15(VCN, i, regVCN_RB1_DB_CTRL,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

927

WREG32_SOC15(VCN, i, regUVD_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

928

WREG32_SOC15(VCN, i, regUVD_RB_BASE_HI, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

929

WREG32_SOC15(VCN, i, regUVD_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

933

WREG32_SOC15(VCN, i, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

935

WREG32_SOC15(VCN, i, regUVD_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

936

WREG32_SOC15(VCN, i, regUVD_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

939

WREG32_SOC15(VCN, i, regUVD_RB_WPTR, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

944

WREG32_SOC15(VCN, i, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1013

WREG32_SOC15(VCN, vcn_inst, regUVD_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1017

WREG32_SOC15(VCN, vcn_inst, regUVD_LMI_CTRL, tmp |

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1026

WREG32_SOC15(VCN, vcn_inst, regUVD_GFX10_ADDR_CONFIG,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1090

WREG32_SOC15(VCN, vcn_inst, regVCN_RB1_DB_CTRL,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1097

WREG32_SOC15(VCN, vcn_inst, regUVD_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1098

WREG32_SOC15(VCN, vcn_inst, regUVD_RB_BASE_HI, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1099

WREG32_SOC15(VCN, vcn_inst, regUVD_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1103

WREG32_SOC15(VCN, vcn_inst, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1105

WREG32_SOC15(VCN, vcn_inst, regUVD_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1106

WREG32_SOC15(VCN, vcn_inst, regUVD_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1109

WREG32_SOC15(VCN, vcn_inst, regUVD_RB_WPTR, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1114

WREG32_SOC15(VCN, vcn_inst, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1204

WREG32_SOC15(VCN, vcn_inst, regUVD_LMI_CTRL2, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1228

WREG32_SOC15(VCN, vcn_inst, regUVD_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1231

WREG32_SOC15(VCN, vcn_inst, regUVD_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1234

WREG32_SOC15(VCN, vcn_inst, regUVD_STATUS, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1299

WREG32_SOC15(VCN, GET_INST(VCN, ring->me), regUVD_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

433

WREG32_SOC15(VCN, vcn_inst, regUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

435

WREG32_SOC15(VCN, vcn_inst, regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

437

WREG32_SOC15(VCN, vcn_inst, regUVD_VCPU_CACHE_OFFSET0, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

440

WREG32_SOC15(VCN, vcn_inst, regUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

442

WREG32_SOC15(VCN, vcn_inst, regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

445

WREG32_SOC15(VCN, vcn_inst, regUVD_VCPU_CACHE_OFFSET0,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

448

WREG32_SOC15(VCN, vcn_inst, regUVD_VCPU_CACHE_SIZE0, size);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

451

WREG32_SOC15(VCN, vcn_inst, regUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

453

WREG32_SOC15(VCN, vcn_inst, regUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

455

WREG32_SOC15(VCN, vcn_inst, regUVD_VCPU_CACHE_OFFSET1, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

456

WREG32_SOC15(VCN, vcn_inst, regUVD_VCPU_CACHE_SIZE1, AMDGPU_VCN_STACK_SIZE);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

459

WREG32_SOC15(VCN, vcn_inst, regUVD_LMI_VCPU_CACHE2_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

461

WREG32_SOC15(VCN, vcn_inst, regUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

463

WREG32_SOC15(VCN, vcn_inst, regUVD_VCPU_CACHE_OFFSET2, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

464

WREG32_SOC15(VCN, vcn_inst, regUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

467

WREG32_SOC15(VCN, vcn_inst, regUVD_LMI_VCPU_NC0_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

469

WREG32_SOC15(VCN, vcn_inst, regUVD_LMI_VCPU_NC0_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

471

WREG32_SOC15(VCN, vcn_inst, regUVD_VCPU_NONCACHE_OFFSET0, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

472

WREG32_SOC15(VCN, vcn_inst, regUVD_VCPU_NONCACHE_SIZE0,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

640

WREG32_SOC15(VCN, vcn_inst, regUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

649

WREG32_SOC15(VCN, vcn_inst, regUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

687

WREG32_SOC15(VCN, vcn_inst, regUVD_POWER_STATUS, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

752

WREG32_SOC15(VCN, vcn_inst, regUVD_RB_BASE_LO, lower_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

753

WREG32_SOC15(VCN, vcn_inst, regUVD_RB_BASE_HI, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

754

WREG32_SOC15(VCN, vcn_inst, regUVD_RB_SIZE, ring->ring_size / sizeof(uint32_t));

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

758

WREG32_SOC15(VCN, vcn_inst, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

760

WREG32_SOC15(VCN, vcn_inst, regUVD_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

761

WREG32_SOC15(VCN, vcn_inst, regUVD_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

764

WREG32_SOC15(VCN, vcn_inst, regUVD_RB_WPTR, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

769

WREG32_SOC15(VCN, vcn_inst, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

773

WREG32_SOC15(VCN, vcn_inst, regVCN_RB1_DB_CTRL,

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

924

WREG32_SOC15(VCN, vcn_inst, regMMSCH_VF_CTX_ADDR_LO, lower_32_bits(ctx_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

925

WREG32_SOC15(VCN, vcn_inst, regMMSCH_VF_CTX_ADDR_HI, upper_32_bits(ctx_addr));

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

930

WREG32_SOC15(VCN, vcn_inst, regMMSCH_VF_VMID, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

933

WREG32_SOC15(VCN, vcn_inst, regMMSCH_VF_CTX_SIZE, size);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

935

WREG32_SOC15(VCN, vcn_inst, regMMSCH_VF_MAILBOX_RESP, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

938

WREG32_SOC15(VCN, vcn_inst, regMMSCH_VF_MAILBOX_HOST, param);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

996

WREG32_SOC15(VCN, vcn_inst, regUVD_STATUS, tmp);

drivers/gpu/drm/amd/amdgpu/vega10_ih.c

281

WREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN, ih_chicken);

drivers/gpu/drm/amd/amdgpu/vega10_ih.c

603

WREG32_SOC15(OSSSYS, 0, mmIH_CLK_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vega20_ih.c

329

WREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN, ih_chicken);

drivers/gpu/drm/amd/amdgpu/vega20_ih.c

343

WREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN_ALDEBARAN, ih_chicken);

drivers/gpu/drm/amd/amdgpu/vega20_ih.c

364

WREG32_SOC15(OSSSYS, 0, mmIH_DOORBELL_RETRY_CAM,

drivers/gpu/drm/amd/amdgpu/vega20_ih.c

700

WREG32_SOC15(OSSSYS, 0, mmIH_CLK_CTRL, data);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

1008

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

1019

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xE0000000);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

1058

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

1067

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xE0000000);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

1117

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xE0000000);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

896

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

911

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xE0000000);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

947

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

956

WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xE0000000);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_thermal.c

140

WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_thermal.c

143

WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_thermal.c

160

WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_thermal.c

164

WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_thermal.c

273

WREG32_SOC15(THM, 0, mmCG_FDO_CTRL0,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_thermal.c

321

WREG32_SOC15(THM, 0, mmCG_TACH_CTRL,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_thermal.c

399

WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_thermal.c

414

WREG32_SOC15(THM, 0, mmCG_TACH_CTRL,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_thermal.c

420

WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_thermal.c

454

WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, val);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_thermal.c

481

WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, 0);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_thermal.c

199

WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_thermal.c

218

WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, val);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_thermal.c

231

WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, 0);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c

89

WREG32_SOC15(THM, 0, mmTHM_BACO_CNTL, data);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_thermal.c

162

WREG32_SOC15(THM, 0, mmCG_FDO_CTRL0,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_thermal.c

205

WREG32_SOC15(THM, 0, mmCG_TACH_CTRL,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_thermal.c

270

WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_thermal.c

289

WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, val);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_thermal.c

302

WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, 0);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_thermal.c

94

WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_thermal.c

97

WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2,

drivers/gpu/drm/amd/pm/powerplay/smumgr/smu10_smumgr.c

103

WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0);

drivers/gpu/drm/amd/pm/powerplay/smumgr/smu10_smumgr.c

105

WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82, parameter);

drivers/gpu/drm/amd/pm/powerplay/smumgr/smu10_smumgr.c

67

WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_66, msg);

drivers/gpu/drm/amd/pm/powerplay/smumgr/smu10_smumgr.c

85

WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0);

drivers/gpu/drm/amd/pm/powerplay/smumgr/smu9_smumgr.c

101

WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_66, msg);

drivers/gpu/drm/amd/pm/powerplay/smumgr/smu9_smumgr.c

121

WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_103, 0);

drivers/gpu/drm/amd/pm/powerplay/smumgr/smu9_smumgr.c

123

WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0);

drivers/gpu/drm/amd/pm/powerplay/smumgr/smu9_smumgr.c

150

WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_103, 0);

drivers/gpu/drm/amd/pm/powerplay/smumgr/smu9_smumgr.c

151

WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_102, parameter);

drivers/gpu/drm/amd/pm/powerplay/smumgr/smu9_smumgr.c

153

WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0);

drivers/gpu/drm/amd/pm/powerplay/smumgr/smu9_smumgr.c

154

WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82, parameter);

drivers/gpu/drm/amd/pm/powerplay/smumgr/smu9_smumgr.c

99

WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_101, msg);

drivers/gpu/drm/amd/pm/powerplay/smumgr/vega20_smumgr.c

112

WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0);

drivers/gpu/drm/amd/pm/powerplay/smumgr/vega20_smumgr.c

138

WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0);

drivers/gpu/drm/amd/pm/powerplay/smumgr/vega20_smumgr.c

140

WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82, parameter);

drivers/gpu/drm/amd/pm/powerplay/smumgr/vega20_smumgr.c

94

WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_66, msg);

drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c

1114

WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2_ARCT,

drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c

1117

WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2_ARCT,

drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c

1187

WREG32_SOC15(THM, 0, mmCG_FDO_CTRL0_ARCT,

drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c

1209

WREG32_SOC15(THM, 0, mmCG_TACH_CTRL_ARCT,

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

1165

WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2,

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

1168

WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2,

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

1193

WREG32_SOC15(THM, 0, mmCG_FDO_CTRL0,

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

1222

WREG32_SOC15(THM, 0, mmCG_TACH_CTRL,

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

1349

WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val);

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

1351

WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, 0);

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

1356

WREG32_SOC15(MP1, 0, mmMP1_SMN_IH_SW_INT_CTRL, val);

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

1374

WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val);

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

1379

WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, val);

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

1385

WREG32_SOC15(MP1, 0, mmMP1_SMN_IH_SW_INT, val);

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

1389

WREG32_SOC15(MP1, 0, mmMP1_SMN_IH_SW_INT_CTRL, val);

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

1444

WREG32_SOC15(MP1, 0, mmMP1_SMN_IH_SW_INT_CTRL, data);

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

1634

WREG32_SOC15(THM, 0, mmTHM_BACO_CNTL_ARCT, data);

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

1638

WREG32_SOC15(THM, 0, mmTHM_BACO_CNTL, data);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

1086

WREG32_SOC15(THM, 0, regCG_FDO_CTRL2,

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

1089

WREG32_SOC15(THM, 0, regCG_FDO_CTRL2,

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

1117

WREG32_SOC15(THM, 0, regCG_FDO_CTRL0,

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

1168

WREG32_SOC15(THM, 0, regCG_TACH_CTRL,

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

1202

WREG32_SOC15(THM, 0, regTHM_THERMAL_INT_CTRL, val);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

1204

WREG32_SOC15(THM, 0, regTHM_THERMAL_INT_ENA, 0);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

1209

WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL, val);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

1227

WREG32_SOC15(THM, 0, regTHM_THERMAL_INT_CTRL, val);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

1232

WREG32_SOC15(THM, 0, regTHM_THERMAL_INT_ENA, val);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

1238

WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT, val);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

1242

WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL, val);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

1304

WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL, data);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

1345

WREG32_SOC15(THM, 0, regTHM_THERMAL_INT_CTRL, data);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

1358

WREG32_SOC15(THM, 0, regTHM_THERMAL_INT_CTRL, data);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

1809

WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL, data);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

1859

WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL, val);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

1867

WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT, val);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

1871

WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL, val);

drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c

1000

WREG32_SOC15(THM, 0, regTHM_THERMAL_INT_CTRL, data);

drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c

1013

WREG32_SOC15(THM, 0, regTHM_THERMAL_INT_CTRL, data);

drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c

878

WREG32_SOC15(THM, 0, regTHM_THERMAL_INT_CTRL, val);

drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c

880

WREG32_SOC15(THM, 0, regTHM_THERMAL_INT_ENA, 0);

drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c

886

WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL_mp1_14_0_0, val);

drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c

890

WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL, val);

drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c

908

WREG32_SOC15(THM, 0, regTHM_THERMAL_INT_CTRL, val);

drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c

913

WREG32_SOC15(THM, 0, regTHM_THERMAL_INT_ENA, val);

drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c

920

WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_mp1_14_0_0, val);

drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c

924

WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL_mp1_14_0_0, val);

drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c

929

WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT, val);

drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c

933

WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL, val);

drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c

982

WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL, data);

drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c

843

WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL_mp1_15_0_0, val);

drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c

847

WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL, val);

drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c

857

WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_mp1_15_0_0, val);

drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c

861

WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL_mp1_15_0_0, val);

drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c

866

WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT, val);

drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c

870

WREG32_SOC15(MP1, 0, regMP1_SMN_IH_SW_INT_CTRL, val);