Symbol: WREG32_SMC
drivers/gpu/drm/amd/amdgpu/amdgpu.h
1419
WREG32_SMC(_Reg, tmp); \
drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
94
return WREG32_SMC(index, value);
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
838
WREG32_SMC(*pos, value);
drivers/gpu/drm/amd/amdgpu/cik.c
1008
WREG32_SMC(ixROM_CNTL, rom_cntl);
drivers/gpu/drm/amd/amdgpu/cik.c
1468
WREG32_SMC(cntl_reg, tmp);
drivers/gpu/drm/amd/amdgpu/cik.c
1517
WREG32_SMC(ixCG_ECLK_CNTL, tmp);
drivers/gpu/drm/amd/amdgpu/cik.c
1797
WREG32_SMC(ixTHM_CLK_CNTL, data);
drivers/gpu/drm/amd/amdgpu/cik.c
1805
WREG32_SMC(ixMISC_CLK_CTRL, data);
drivers/gpu/drm/amd/amdgpu/cik.c
1810
WREG32_SMC(ixCG_CLKPIN_CNTL, data);
drivers/gpu/drm/amd/amdgpu/cik.c
1815
WREG32_SMC(ixCG_CLKPIN_CNTL_2, data);
drivers/gpu/drm/amd/amdgpu/cik.c
1821
WREG32_SMC(ixMPLL_BYPASSCLK_SEL, data);
drivers/gpu/drm/amd/amdgpu/cik.c
997
WREG32_SMC(ixROM_CNTL, rom_cntl | ROM_CNTL__SCK_OVERWRITE_MASK);
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
802
WREG32_SMC(ixCG_ACLK_CNTL, data);
drivers/gpu/drm/amd/amdgpu/vi.c
1001
WREG32_SMC(cntl_reg, tmp);
drivers/gpu/drm/amd/amdgpu/vi.c
1091
WREG32_SMC(reg_ctrl, tmp);
drivers/gpu/drm/amd/amdgpu/vi.c
1191
WREG32_SMC(ixTHM_CLK_CNTL, data);
drivers/gpu/drm/amd/amdgpu/vi.c
1200
WREG32_SMC(ixMISC_CLK_CTRL, data);
drivers/gpu/drm/amd/amdgpu/vi.c
1205
WREG32_SMC(ixCG_CLKPIN_CNTL, data);
drivers/gpu/drm/amd/amdgpu/vi.c
1210
WREG32_SMC(ixCG_CLKPIN_CNTL, data);
drivers/gpu/drm/amd/amdgpu/vi.c
1216
WREG32_SMC(ixMPLL_BYPASSCLK_SEL, data);
drivers/gpu/drm/amd/amdgpu/vi.c
1822
WREG32_SMC(ixCGTT_ROM_CLK_CTRL0, data);
drivers/gpu/drm/amd/amdgpu/vi.c
619
WREG32_SMC(ixROM_CNTL, rom_cntl | ROM_CNTL__SCK_OVERWRITE_MASK);
drivers/gpu/drm/amd/amdgpu/vi.c
630
WREG32_SMC(ixROM_CNTL, rom_cntl);
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
2508
WREG32_SMC(ixNB_DPM_CONFIG_1, nbdpmconfig1);
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
2533
WREG32_SMC(ixCG_THERMAL_INT_CTRL, tmp);
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
3129
WREG32_SMC(ixCG_THERMAL_INT_CTRL, cg_thermal_int);
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
3134
WREG32_SMC(ixCG_THERMAL_INT_CTRL, cg_thermal_int);
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
3146
WREG32_SMC(ixCG_THERMAL_INT_CTRL, cg_thermal_int);
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
3151
WREG32_SMC(ixCG_THERMAL_INT_CTRL, cg_thermal_int);
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
393
WREG32_SMC(local_cac_reg->cntl, data);
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
433
WREG32_SMC(config_regs->offset, data);
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
524
WREG32_SMC(ixLCAC_SX0_OVR_SEL, 0);
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
525
WREG32_SMC(ixLCAC_SX0_OVR_VAL, 0);
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
528
WREG32_SMC(ixLCAC_MC0_OVR_SEL, 0);
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
529
WREG32_SMC(ixLCAC_MC0_OVR_VAL, 0);
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
532
WREG32_SMC(ixLCAC_MC1_OVR_SEL, 0);
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
533
WREG32_SMC(ixLCAC_MC1_OVR_VAL, 0);
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
536
WREG32_SMC(ixLCAC_MC2_OVR_SEL, 0);
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
537
WREG32_SMC(ixLCAC_MC2_OVR_VAL, 0);
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
540
WREG32_SMC(ixLCAC_MC3_OVR_SEL, 0);
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
541
WREG32_SMC(ixLCAC_MC3_OVR_VAL, 0);
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
544
WREG32_SMC(ixLCAC_CPL_OVR_SEL, 0);
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
545
WREG32_SMC(ixLCAC_CPL_OVR_VAL, 0);
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
643
WREG32_SMC(ixCG_FREQ_TRAN_VOTING_0, 0x3FFFC100);
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
648
WREG32_SMC(ixCG_FREQ_TRAN_VOTING_0, 0);
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
720
WREG32_SMC(ixGENERAL_PWRMGT, tmp);
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
738
WREG32_SMC(ixSCLK_PWRMGT_CNTL, sclk_pwrmgt_cntl);
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
748
WREG32_SMC(ixSCLK_PWRMGT_CNTL, sclk_pwrmgt_cntl);
drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
2870
WREG32_SMC(offset, data);
drivers/gpu/drm/amd/pm/legacy-dpm/si_smc.c
123
WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp);
drivers/gpu/drm/amd/pm/legacy-dpm/si_smc.c
137
WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp);
drivers/gpu/drm/amd/pm/legacy-dpm/si_smc.c
156
WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
1098
WREG32_SMC(CG_FDO_CTRL0, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
1175
WREG32_SMC(CG_TACH_CTRL, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
1191
WREG32_SMC(CG_FDO_CTRL2, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
1195
WREG32_SMC(CG_FDO_CTRL2, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
1215
WREG32_SMC(CG_TACH_CTRL, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
1220
WREG32_SMC(CG_FDO_CTRL2, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
1379
WREG32_SMC(GENERAL_PWRMGT, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
1383
WREG32_SMC(GENERAL_PWRMGT, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
1457
WREG32_SMC(LCAC_MC0_CNTL, 0x05);
drivers/gpu/drm/radeon/ci_dpm.c
1458
WREG32_SMC(LCAC_MC1_CNTL, 0x05);
drivers/gpu/drm/radeon/ci_dpm.c
1459
WREG32_SMC(LCAC_CPL_CNTL, 0x100005);
drivers/gpu/drm/radeon/ci_dpm.c
1463
WREG32_SMC(LCAC_MC0_CNTL, 0x400005);
drivers/gpu/drm/radeon/ci_dpm.c
1464
WREG32_SMC(LCAC_MC1_CNTL, 0x400005);
drivers/gpu/drm/radeon/ci_dpm.c
1465
WREG32_SMC(LCAC_CPL_CNTL, 0x500005);
drivers/gpu/drm/radeon/ci_dpm.c
1493
WREG32_SMC(GENERAL_PWRMGT, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
1497
WREG32_SMC(SCLK_PWRMGT_CNTL, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
1554
WREG32_SMC(GENERAL_PWRMGT, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
1558
WREG32_SMC(SCLK_PWRMGT_CNTL, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
1585
WREG32_SMC(SCLK_PWRMGT_CNTL, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
1871
WREG32_SMC(GENERAL_PWRMGT, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
1880
WREG32_SMC(GENERAL_PWRMGT, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
1957
WREG32_SMC(CG_DISPLAY_GAP_CNTL, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
1968
WREG32_SMC(CG_DISPLAY_GAP_CNTL2, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
1986
WREG32_SMC(GENERAL_PWRMGT, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
1991
WREG32_SMC(CG_SPLL_SPREAD_SPECTRUM, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
1995
WREG32_SMC(GENERAL_PWRMGT, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
2001
WREG32_SMC(CG_SSP, (SSTU(R600_SSTU_DFLT) | SST(R600_SST_DFLT)));
drivers/gpu/drm/radeon/ci_dpm.c
2012
WREG32_SMC(CG_DISPLAY_GAP_CNTL, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
2021
WREG32_SMC(SCLK_PWRMGT_CNTL, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
2023
WREG32_SMC(CG_FTV_0, CISLANDS_VRC_DFLT0);
drivers/gpu/drm/radeon/ci_dpm.c
2024
WREG32_SMC(CG_FTV_1, CISLANDS_VRC_DFLT1);
drivers/gpu/drm/radeon/ci_dpm.c
2025
WREG32_SMC(CG_FTV_2, CISLANDS_VRC_DFLT2);
drivers/gpu/drm/radeon/ci_dpm.c
2026
WREG32_SMC(CG_FTV_3, CISLANDS_VRC_DFLT3);
drivers/gpu/drm/radeon/ci_dpm.c
2027
WREG32_SMC(CG_FTV_4, CISLANDS_VRC_DFLT4);
drivers/gpu/drm/radeon/ci_dpm.c
2028
WREG32_SMC(CG_FTV_5, CISLANDS_VRC_DFLT5);
drivers/gpu/drm/radeon/ci_dpm.c
2029
WREG32_SMC(CG_FTV_6, CISLANDS_VRC_DFLT6);
drivers/gpu/drm/radeon/ci_dpm.c
2030
WREG32_SMC(CG_FTV_7, CISLANDS_VRC_DFLT7);
drivers/gpu/drm/radeon/ci_dpm.c
2039
WREG32_SMC(SCLK_PWRMGT_CNTL, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
2041
WREG32_SMC(CG_FTV_0, 0);
drivers/gpu/drm/radeon/ci_dpm.c
2042
WREG32_SMC(CG_FTV_1, 0);
drivers/gpu/drm/radeon/ci_dpm.c
2043
WREG32_SMC(CG_FTV_2, 0);
drivers/gpu/drm/radeon/ci_dpm.c
2044
WREG32_SMC(CG_FTV_3, 0);
drivers/gpu/drm/radeon/ci_dpm.c
2045
WREG32_SMC(CG_FTV_4, 0);
drivers/gpu/drm/radeon/ci_dpm.c
2046
WREG32_SMC(CG_FTV_5, 0);
drivers/gpu/drm/radeon/ci_dpm.c
2047
WREG32_SMC(CG_FTV_6, 0);
drivers/gpu/drm/radeon/ci_dpm.c
2048
WREG32_SMC(CG_FTV_7, 0);
drivers/gpu/drm/radeon/ci_dpm.c
2060
WREG32_SMC(SMC_SYSCON_MISC_CNTL, 1);
drivers/gpu/drm/radeon/ci_dpm.c
3535
WREG32_SMC(CG_ULV_PARAMETER, ulv->cg_ulv_parameter);
drivers/gpu/drm/radeon/ci_dpm.c
4043
WREG32_SMC(DPM_TABLE_475, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
4081
WREG32_SMC(DPM_TABLE_475, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
4111
WREG32_SMC(DPM_TABLE_475, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
4744
WREG32_SMC(GENERAL_PWRMGT, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
570
WREG32_SMC(config_regs->offset, data);
drivers/gpu/drm/radeon/ci_dpm.c
5825
WREG32_SMC(CNB_PWRMGT_CNTL, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
860
WREG32_SMC(CG_THERMAL_INT, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
867
WREG32_SMC(CG_THERMAL_CTRL, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
884
WREG32_SMC(CG_THERMAL_INT, thermal_int);
drivers/gpu/drm/radeon/ci_dpm.c
893
WREG32_SMC(CG_THERMAL_INT, thermal_int);
drivers/gpu/drm/radeon/ci_dpm.c
920
WREG32_SMC(CG_FDO_CTRL2, tmp);
drivers/gpu/drm/radeon/ci_dpm.c
924
WREG32_SMC(CG_FDO_CTRL2, tmp);
drivers/gpu/drm/radeon/ci_smc.c
119
WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp);
drivers/gpu/drm/radeon/ci_smc.c
127
WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp);
drivers/gpu/drm/radeon/ci_smc.c
143
WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp);
drivers/gpu/drm/radeon/ci_smc.c
152
WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp);
drivers/gpu/drm/radeon/cik.c
9440
WREG32_SMC(cntl_reg, tmp);
drivers/gpu/drm/radeon/cik.c
9487
WREG32_SMC(CG_ECLK_CNTL, tmp);
drivers/gpu/drm/radeon/cik.c
9760
WREG32_SMC(THM_CLK_CNTL, data);
drivers/gpu/drm/radeon/cik.c
9766
WREG32_SMC(MISC_CLK_CTRL, data);
drivers/gpu/drm/radeon/cik.c
9771
WREG32_SMC(CG_CLKPIN_CNTL, data);
drivers/gpu/drm/radeon/cik.c
9776
WREG32_SMC(CG_CLKPIN_CNTL_2, data);
drivers/gpu/drm/radeon/cik.c
9782
WREG32_SMC(MPLL_BYPASSCLK_SEL, data);
drivers/gpu/drm/radeon/kv_dpm.c
1023
WREG32_SMC(CG_THERMAL_INT_CTRL, thermal_int);
drivers/gpu/drm/radeon/kv_dpm.c
190
WREG32_SMC(config_regs->offset, data);
drivers/gpu/drm/radeon/kv_dpm.c
2244
WREG32_SMC(NB_DPM_CONFIG_1, nbdpmconfig1);
drivers/gpu/drm/radeon/kv_dpm.c
2268
WREG32_SMC(CG_THERMAL_INT_CTRL, tmp);
drivers/gpu/drm/radeon/kv_dpm.c
367
WREG32_SMC(CG_FTV_0, 0x3FFFC100);
drivers/gpu/drm/radeon/kv_dpm.c
372
WREG32_SMC(CG_FTV_0, 0);
drivers/gpu/drm/radeon/kv_dpm.c
490
WREG32_SMC(GENERAL_PWRMGT, tmp);
drivers/gpu/drm/radeon/kv_dpm.c
507
WREG32_SMC(SCLK_PWRMGT_CNTL, sclk_pwrmgt_cntl);
drivers/gpu/drm/radeon/kv_dpm.c
516
WREG32_SMC(SCLK_PWRMGT_CNTL, sclk_pwrmgt_cntl);
drivers/gpu/drm/radeon/radeon.h
2556
WREG32_SMC(reg, tmp_); \
drivers/gpu/drm/radeon/si.c
5446
WREG32_SMC(SMC_CG_IND_START + CG_CGTT_LOCAL_0, 0);
drivers/gpu/drm/radeon/si.c
5447
WREG32_SMC(SMC_CG_IND_START + CG_CGTT_LOCAL_1, 0);
drivers/gpu/drm/radeon/si.c
5458
WREG32_SMC(SMC_CG_IND_START + CG_CGTT_LOCAL_0, 0xffffffff);
drivers/gpu/drm/radeon/si.c
5459
WREG32_SMC(SMC_CG_IND_START + CG_CGTT_LOCAL_1, 0xffffffff);
drivers/gpu/drm/radeon/si_dpm.c
2700
WREG32_SMC(offset, data);
drivers/gpu/drm/radeon/si_smc.c
119
WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp);
drivers/gpu/drm/radeon/si_smc.c
133
WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp);
drivers/gpu/drm/radeon/si_smc.c
149
WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp);
drivers/gpu/drm/radeon/si_smc.c
158
WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp);
drivers/gpu/drm/radeon/trinity_dpm.c
1149
WREG32_SMC(NB_PSTATE_CONFIG, nbpsconfig);
drivers/gpu/drm/radeon/trinity_dpm.c
1599
WREG32_SMC(DC_CAC_VALUE, dc_cac_value);
drivers/gpu/drm/radeon/trinity_dpm.c
335
WREG32_SMC(GFX_POWER_GATING_CNTL, value);
drivers/gpu/drm/radeon/trinity_dpm.c
459
WREG32_SMC(SMU_SCRATCH_A, (RREG32_SMC(SMU_SCRATCH_A) | 0x01));
drivers/gpu/drm/radeon/trinity_dpm.c
477
WREG32_SMC(PM_I_CNTL_1, value);
drivers/gpu/drm/radeon/trinity_dpm.c
482
WREG32_SMC(SMU_S_PG_CNTL, value);
drivers/gpu/drm/radeon/trinity_dpm.c
486
WREG32_SMC(SMU_S_PG_CNTL, value);
drivers/gpu/drm/radeon/trinity_dpm.c
490
WREG32_SMC(PM_I_CNTL_1, value);
drivers/gpu/drm/radeon/trinity_dpm.c
551
WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value);
drivers/gpu/drm/radeon/trinity_dpm.c
561
WREG32_SMC(SMU_SCLK_DPM_STATE_0_PG_CNTL + ix, value);
drivers/gpu/drm/radeon/trinity_dpm.c
573
WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value);
drivers/gpu/drm/radeon/trinity_dpm.c
585
WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value);
drivers/gpu/drm/radeon/trinity_dpm.c
598
WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value);
drivers/gpu/drm/radeon/trinity_dpm.c
603
WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value);
drivers/gpu/drm/radeon/trinity_dpm.c
615
WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_3 + ix, value);
drivers/gpu/drm/radeon/trinity_dpm.c
627
WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_3 + ix, value);
drivers/gpu/drm/radeon/trinity_dpm.c
639
WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value);
drivers/gpu/drm/radeon/trinity_dpm.c
651
WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value);
drivers/gpu/drm/radeon/trinity_dpm.c
663
WREG32_SMC(SMU_SCLK_DPM_STATE_0_AT + ix, value);
drivers/gpu/drm/radeon/trinity_dpm.c
695
WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value);
drivers/gpu/drm/radeon/trinity_dpm.c
712
WREG32_SMC(SMU_SCLK_DPM_CNTL, value);
drivers/gpu/drm/radeon/trinity_dpm.c
749
WREG32_SMC(SMU_SCLK_DPM_CNTL, sclk_dpm_cntl);
drivers/gpu/drm/radeon/trinity_dpm.c
830
WREG32_SMC(SMU_UVD_DPM_STATES, uvdstates);
drivers/gpu/drm/radeon/trinity_dpm.c
845
WREG32_SMC(SMU_UVD_DPM_CNTL, val);
drivers/gpu/drm/radeon/trinity_dpm.c
965
WREG32_SMC(SMU_SCLK_DPM_TTT, value);
drivers/gpu/drm/radeon/trinity_dpm.c
974
WREG32_SMC(SMU_SCLK_DPM_TT_CNTL, value);
drivers/gpu/drm/radeon/trinity_dpm.c
992
WREG32_SMC(PM_I_CNTL_1, value);
drivers/gpu/drm/radeon/trinity_smc.c
66
WREG32_SMC(SMU_SCRATCH0, 1);
drivers/gpu/drm/radeon/trinity_smc.c
68
WREG32_SMC(SMU_SCRATCH0, 0);
drivers/gpu/drm/radeon/trinity_smc.c
75
WREG32_SMC(SMU_SCRATCH0, n);
drivers/gpu/drm/radeon/trinity_smc.c
82
WREG32_SMC(SMU_SCRATCH0, n);